| Pierre-Louis Bossart | 47fad23 | 2021-05-05 12:02:35 -0500 | [diff] [blame] | 1 | /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) */ |
| 2 | /* |
| 3 | * This file is provided under a dual BSD/GPLv2 license. When using or |
| 4 | * redistributing this file, you may do so under either license. |
| 5 | * |
| 6 | * Copyright(c) 2017-2021 Intel Corporation. All rights reserved. |
| 7 | * |
| 8 | * Author: Liam Girdwood <liam.r.girdwood@linux.intel.com> |
| 9 | */ |
| 10 | |
| 11 | #ifndef __SOF_INTEL_ATOM_H |
| 12 | #define __SOF_INTEL_ATOM_H |
| 13 | |
| 14 | /* DSP memories */ |
| 15 | #define IRAM_OFFSET 0x0C0000 |
| 16 | #define IRAM_SIZE (80 * 1024) |
| 17 | #define DRAM_OFFSET 0x100000 |
| 18 | #define DRAM_SIZE (160 * 1024) |
| 19 | #define SHIM_OFFSET 0x140000 |
| 20 | #define SHIM_SIZE_BYT 0x100 |
| 21 | #define SHIM_SIZE_CHT 0x118 |
| 22 | #define MBOX_OFFSET 0x144000 |
| 23 | #define MBOX_SIZE 0x1000 |
| 24 | #define EXCEPT_OFFSET 0x800 |
| 25 | #define EXCEPT_MAX_HDR_SIZE 0x400 |
| 26 | |
| 27 | /* DSP peripherals */ |
| 28 | #define DMAC0_OFFSET 0x098000 |
| 29 | #define DMAC1_OFFSET 0x09c000 |
| 30 | #define DMAC2_OFFSET 0x094000 |
| 31 | #define DMAC_SIZE 0x420 |
| 32 | #define SSP0_OFFSET 0x0a0000 |
| 33 | #define SSP1_OFFSET 0x0a1000 |
| 34 | #define SSP2_OFFSET 0x0a2000 |
| 35 | #define SSP3_OFFSET 0x0a4000 |
| 36 | #define SSP4_OFFSET 0x0a5000 |
| 37 | #define SSP5_OFFSET 0x0a6000 |
| 38 | #define SSP_SIZE 0x100 |
| 39 | |
| 40 | #define STACK_DUMP_SIZE 32 |
| 41 | |
| 42 | #define PCI_BAR_SIZE 0x200000 |
| 43 | |
| 44 | #define PANIC_OFFSET(x) (((x) & GENMASK_ULL(47, 32)) >> 32) |
| 45 | |
| 46 | /* |
| 47 | * Debug |
| 48 | */ |
| 49 | |
| 50 | #define MBOX_DUMP_SIZE 0x30 |
| 51 | |
| 52 | /* BARs */ |
| 53 | #define DSP_BAR 0 |
| 54 | #define PCI_BAR 1 |
| 55 | #define IMR_BAR 2 |
| 56 | |
| 57 | irqreturn_t atom_irq_handler(int irq, void *context); |
| 58 | irqreturn_t atom_irq_thread(int irq, void *context); |
| 59 | |
| 60 | int atom_send_msg(struct snd_sof_dev *sdev, struct snd_sof_ipc_msg *msg); |
| 61 | int atom_get_mailbox_offset(struct snd_sof_dev *sdev); |
| 62 | int atom_get_window_offset(struct snd_sof_dev *sdev, u32 id); |
| 63 | |
| 64 | int atom_run(struct snd_sof_dev *sdev); |
| 65 | int atom_reset(struct snd_sof_dev *sdev); |
| 66 | void atom_dump(struct snd_sof_dev *sdev, u32 flags); |
| 67 | |
| 68 | void atom_machine_select(struct snd_sof_dev *sdev); |
| 69 | void atom_set_mach_params(const struct snd_soc_acpi_mach *mach, |
| 70 | struct snd_sof_dev *sdev); |
| 71 | |
| 72 | extern struct snd_soc_dai_driver atom_dai[]; |
| 73 | |
| 74 | #endif |