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review.shift-gmbh.com / SHIFTPHONES / mainline / linux / 7f016b35ca7623c71b31facdde080e8ce171a697 / . / sound / soc / mediatek / mt8195 / mt8195-mt6359-rt1011-rt5682.c
blob: e103102d7ef6d5c649a5aeda61997c09463b896c [file] [log] [blame]
Trevor Wu0261e362021-10-20 15:14:27 +0800[diff] [blame]1// SPDX-License-Identifier: GPL-2.0
2//
3// mt8195-mt6359-rt1011-rt5682.c --
4// MT8195-MT6359-RT1011-RT5682 ALSA SoC machine driver
5//
6// Copyright (c) 2021 MediaTek Inc.
7// Author: Trevor Wu <trevor.wu@mediatek.com>
8//
9
10#include <linux/input.h>
11#include <linux/module.h>
12#include <linux/pm_runtime.h>
13#include <sound/jack.h>
14#include <sound/pcm_params.h>
15#include <sound/rt5682.h>
16#include <sound/soc.h>
17#include "../../codecs/mt6359.h"
18#include "../../codecs/rt1011.h"
19#include "../../codecs/rt5682.h"
20#include "../common/mtk-afe-platform-driver.h"
21#include "mt8195-afe-common.h"
22
23#define RT1011_CODEC_DAI "rt1011-aif"
24#define RT1011_DEV0_NAME "rt1011.2-0038"
25#define RT1011_DEV1_NAME "rt1011.2-0039"
26
27#define RT5682_CODEC_DAI "rt5682-aif1"
28#define RT5682_DEV0_NAME "rt5682.2-001a"
29
30struct mt8195_mt6359_rt1011_rt5682_priv {
31 struct device_node *platform_node;
32 struct device_node *hdmi_node;
33 struct device_node *dp_node;
34 struct snd_soc_jack headset_jack;
35 struct snd_soc_jack dp_jack;
36 struct snd_soc_jack hdmi_jack;
37};
38
39static const struct snd_soc_dapm_widget
40mt8195_mt6359_rt1011_rt5682_widgets[] = {
41 SND_SOC_DAPM_SPK("Left Speaker", NULL),
42 SND_SOC_DAPM_SPK("Right Speaker", NULL),
43 SND_SOC_DAPM_HP("Headphone Jack", NULL),
44 SND_SOC_DAPM_MIC("Headset Mic", NULL),
45};
46
47static const struct snd_soc_dapm_route mt8195_mt6359_rt1011_rt5682_routes[] = {
48 /* speaker */
49 { "Left Speaker", NULL, "Left SPO" },
50 { "Right Speaker", NULL, "Right SPO" },
51 /* headset */
52 { "Headphone Jack", NULL, "HPOL" },
53 { "Headphone Jack", NULL, "HPOR" },
54 { "IN1P", NULL, "Headset Mic" },
55};
56
57static const struct snd_kcontrol_new mt8195_mt6359_rt1011_rt5682_controls[] = {
58 SOC_DAPM_PIN_SWITCH("Left Speaker"),
59 SOC_DAPM_PIN_SWITCH("Right Speaker"),
60 SOC_DAPM_PIN_SWITCH("Headphone Jack"),
61 SOC_DAPM_PIN_SWITCH("Headset Mic"),
62};
63
64static int mt8195_rt5682_etdm_hw_params(struct snd_pcm_substream *substream,
65 struct snd_pcm_hw_params *params)
66{
67 struct snd_soc_pcm_runtime *rtd = substream->private_data;
68 struct snd_soc_card *card = rtd->card;
69 struct snd_soc_dai *cpu_dai = asoc_rtd_to_cpu(rtd, 0);
70 struct snd_soc_dai *codec_dai = asoc_rtd_to_codec(rtd, 0);
71 unsigned int rate = params_rate(params);
72 int bitwidth;
73 int ret;
74
75 bitwidth = snd_pcm_format_width(params_format(params));
76 if (bitwidth < 0) {
77 dev_err(card->dev, "invalid bit width: %d\n", bitwidth);
78 return bitwidth;
79 }
80
81 ret = snd_soc_dai_set_tdm_slot(codec_dai, 0x00, 0x0, 0x2, bitwidth);
82 if (ret) {
83 dev_err(card->dev, "failed to set tdm slot\n");
84 return ret;
85 }
86
87 ret = snd_soc_dai_set_pll(codec_dai, RT5682_PLL1, RT5682_PLL1_S_BCLK1,
88 rate * 64, rate * 512);
89 if (ret) {
90 dev_err(card->dev, "failed to set pll\n");
91 return ret;
92 }
93
94 ret = snd_soc_dai_set_sysclk(codec_dai, RT5682_SCLK_S_PLL1,
95 rate * 512, SND_SOC_CLOCK_IN);
96 if (ret) {
97 dev_err(card->dev, "failed to set sysclk\n");
98 return ret;
99 }
100
101 return snd_soc_dai_set_sysclk(cpu_dai, 0, rate * 128,
102 SND_SOC_CLOCK_OUT);
103}
104
105static const struct snd_soc_ops mt8195_rt5682_etdm_ops = {
106 .hw_params = mt8195_rt5682_etdm_hw_params,
107};
108
109static int mt8195_rt1011_etdm_hw_params(struct snd_pcm_substream *substream,
110 struct snd_pcm_hw_params *params)
111{
112 struct snd_soc_pcm_runtime *rtd = asoc_substream_to_rtd(substream);
113 struct snd_soc_dai *codec_dai;
114 struct snd_soc_card *card = rtd->card;
115 int srate, i, ret = 0;
116
117 srate = params_rate(params);
118
119 for_each_rtd_codec_dais(rtd, i, codec_dai) {
120 ret = snd_soc_dai_set_pll(codec_dai, 0, RT1011_PLL1_S_BCLK,
121 64 * srate, 256 * srate);
122 if (ret < 0) {
123 dev_err(card->dev, "codec_dai clock not set\n");
124 return ret;
125 }
126
127 ret = snd_soc_dai_set_sysclk(codec_dai,
128 RT1011_FS_SYS_PRE_S_PLL1,
129 256 * srate, SND_SOC_CLOCK_IN);
130 if (ret < 0) {
131 dev_err(card->dev, "codec_dai clock not set\n");
132 return ret;
133 }
134 }
135 return ret;
136}
137
138static const struct snd_soc_ops mt8195_rt1011_etdm_ops = {
139 .hw_params = mt8195_rt1011_etdm_hw_params,
140};
141
142#define CKSYS_AUD_TOP_CFG 0x032c
143#define CKSYS_AUD_TOP_MON 0x0330
144
145static int mt8195_mt6359_mtkaif_calibration(struct snd_soc_pcm_runtime *rtd)
146{
147 struct snd_soc_component *cmpnt_afe =
148 snd_soc_rtdcom_lookup(rtd, AFE_PCM_NAME);
149 struct snd_soc_component *cmpnt_codec =
150 asoc_rtd_to_codec(rtd, 0)->component;
151 struct mtk_base_afe *afe = snd_soc_component_get_drvdata(cmpnt_afe);
152 struct mt8195_afe_private *afe_priv = afe->platform_priv;
153 struct mtkaif_param *param = &afe_priv->mtkaif_params;
154 int chosen_phase_1, chosen_phase_2, chosen_phase_3;
155 int prev_cycle_1, prev_cycle_2, prev_cycle_3;
156 int test_done_1, test_done_2, test_done_3;
157 int cycle_1, cycle_2, cycle_3;
158 int mtkaif_chosen_phase[MT8195_MTKAIF_MISO_NUM];
159 int mtkaif_phase_cycle[MT8195_MTKAIF_MISO_NUM];
160 int mtkaif_calibration_num_phase;
161 bool mtkaif_calibration_ok;
162 unsigned int monitor;
163 int counter;
164 int phase;
165 int i;
166
167 dev_dbg(afe->dev, "%s(), start\n", __func__);
168
169 param->mtkaif_calibration_ok = false;
170 for (i = 0; i < MT8195_MTKAIF_MISO_NUM; i++) {
171 param->mtkaif_chosen_phase[i] = -1;
172 param->mtkaif_phase_cycle[i] = 0;
173 mtkaif_chosen_phase[i] = -1;
174 mtkaif_phase_cycle[i] = 0;
175 }
176
177 if (IS_ERR(afe_priv->topckgen)) {
178 dev_info(afe->dev, "%s() Cannot find topckgen controller\n",
179 __func__);
180 return 0;
181 }
182
183 pm_runtime_get_sync(afe->dev);
184 mt6359_mtkaif_calibration_enable(cmpnt_codec);
185
186 /* set test type to synchronizer pulse */
187 regmap_update_bits(afe_priv->topckgen,
188 CKSYS_AUD_TOP_CFG, 0xffff, 0x4);
189 mtkaif_calibration_num_phase = 42; /* mt6359: 0 ~ 42 */
190 mtkaif_calibration_ok = true;
191
192 for (phase = 0;
193 phase <= mtkaif_calibration_num_phase && mtkaif_calibration_ok;
194 phase++) {
195 mt6359_set_mtkaif_calibration_phase(cmpnt_codec,
196 phase, phase, phase);
197
198 regmap_update_bits(afe_priv->topckgen,
199 CKSYS_AUD_TOP_CFG, 0x1, 0x1);
200
201 test_done_1 = 0;
202 test_done_2 = 0;
203 test_done_3 = 0;
204 cycle_1 = -1;
205 cycle_2 = -1;
206 cycle_3 = -1;
207 counter = 0;
208 while (!(test_done_1 & test_done_2 & test_done_3)) {
209 regmap_read(afe_priv->topckgen,
210 CKSYS_AUD_TOP_MON, &monitor);
211 test_done_1 = (monitor >> 28) & 0x1;
212 test_done_2 = (monitor >> 29) & 0x1;
213 test_done_3 = (monitor >> 30) & 0x1;
214 if (test_done_1 == 1)
215 cycle_1 = monitor & 0xf;
216
217 if (test_done_2 == 1)
218 cycle_2 = (monitor >> 4) & 0xf;
219
220 if (test_done_3 == 1)
221 cycle_3 = (monitor >> 8) & 0xf;
222
223 /* handle if never test done */
224 if (++counter > 10000) {
225 dev_info(afe->dev, "%s(), test fail, cycle_1 %d, cycle_2 %d, cycle_3 %d, monitor 0x%x\n",
226 __func__,
227 cycle_1, cycle_2, cycle_3, monitor);
228 mtkaif_calibration_ok = false;
229 break;
230 }
231 }
232
233 if (phase == 0) {
234 prev_cycle_1 = cycle_1;
235 prev_cycle_2 = cycle_2;
236 prev_cycle_3 = cycle_3;
237 }
238
239 if (cycle_1 != prev_cycle_1 &&
240 mtkaif_chosen_phase[MT8195_MTKAIF_MISO_0] < 0) {
241 mtkaif_chosen_phase[MT8195_MTKAIF_MISO_0] = phase - 1;
242 mtkaif_phase_cycle[MT8195_MTKAIF_MISO_0] = prev_cycle_1;
243 }
244
245 if (cycle_2 != prev_cycle_2 &&
246 mtkaif_chosen_phase[MT8195_MTKAIF_MISO_1] < 0) {
247 mtkaif_chosen_phase[MT8195_MTKAIF_MISO_1] = phase - 1;
248 mtkaif_phase_cycle[MT8195_MTKAIF_MISO_1] = prev_cycle_2;
249 }
250
251 if (cycle_3 != prev_cycle_3 &&
252 mtkaif_chosen_phase[MT8195_MTKAIF_MISO_2] < 0) {
253 mtkaif_chosen_phase[MT8195_MTKAIF_MISO_2] = phase - 1;
254 mtkaif_phase_cycle[MT8195_MTKAIF_MISO_2] = prev_cycle_3;
255 }
256
257 regmap_update_bits(afe_priv->topckgen,
258 CKSYS_AUD_TOP_CFG, 0x1, 0x0);
259
260 if (mtkaif_chosen_phase[MT8195_MTKAIF_MISO_0] >= 0 &&
261 mtkaif_chosen_phase[MT8195_MTKAIF_MISO_1] >= 0 &&
262 mtkaif_chosen_phase[MT8195_MTKAIF_MISO_2] >= 0)
263 break;
264 }
265
266 if (mtkaif_chosen_phase[MT8195_MTKAIF_MISO_0] < 0) {
267 mtkaif_calibration_ok = false;
268 chosen_phase_1 = 0;
269 } else {
270 chosen_phase_1 = mtkaif_chosen_phase[MT8195_MTKAIF_MISO_0];
271 }
272
273 if (mtkaif_chosen_phase[MT8195_MTKAIF_MISO_1] < 0) {
274 mtkaif_calibration_ok = false;
275 chosen_phase_2 = 0;
276 } else {
277 chosen_phase_2 = mtkaif_chosen_phase[MT8195_MTKAIF_MISO_1];
278 }
279
280 if (mtkaif_chosen_phase[MT8195_MTKAIF_MISO_2] < 0) {
281 mtkaif_calibration_ok = false;
282 chosen_phase_3 = 0;
283 } else {
284 chosen_phase_3 = mtkaif_chosen_phase[MT8195_MTKAIF_MISO_2];
285 }
286
287 mt6359_set_mtkaif_calibration_phase(cmpnt_codec,
288 chosen_phase_1,
289 chosen_phase_2,
290 chosen_phase_3);
291
292 mt6359_mtkaif_calibration_disable(cmpnt_codec);
293 pm_runtime_put(afe->dev);
294
295 param->mtkaif_calibration_ok = mtkaif_calibration_ok;
296 param->mtkaif_chosen_phase[MT8195_MTKAIF_MISO_0] = chosen_phase_1;
297 param->mtkaif_chosen_phase[MT8195_MTKAIF_MISO_1] = chosen_phase_2;
298 param->mtkaif_chosen_phase[MT8195_MTKAIF_MISO_2] = chosen_phase_3;
299 for (i = 0; i < MT8195_MTKAIF_MISO_NUM; i++)
300 param->mtkaif_phase_cycle[i] = mtkaif_phase_cycle[i];
301
302 dev_info(afe->dev, "%s(), end, calibration ok %d\n",
303 __func__, param->mtkaif_calibration_ok);
304
305 return 0;
306}
307
308static int mt8195_mt6359_init(struct snd_soc_pcm_runtime *rtd)
309{
310 struct snd_soc_component *cmpnt_codec =
311 asoc_rtd_to_codec(rtd, 0)->component;
312
313 /* set mtkaif protocol */
314 mt6359_set_mtkaif_protocol(cmpnt_codec,
315 MT6359_MTKAIF_PROTOCOL_2_CLK_P2);
316
317 /* mtkaif calibration */
318 mt8195_mt6359_mtkaif_calibration(rtd);
319
320 return 0;
321}
322
323static int mt8195_rt5682_init(struct snd_soc_pcm_runtime *rtd)
324{
325 struct snd_soc_component *cmpnt_codec =
326 asoc_rtd_to_codec(rtd, 0)->component;
327 struct mt8195_mt6359_rt1011_rt5682_priv *priv =
328 snd_soc_card_get_drvdata(rtd->card);
329 struct snd_soc_jack *jack = &priv->headset_jack;
330 int ret;
331
332 ret = snd_soc_card_jack_new(rtd->card, "Headset Jack",
333 SND_JACK_HEADSET | SND_JACK_BTN_0 |
334 SND_JACK_BTN_1 | SND_JACK_BTN_2 |
335 SND_JACK_BTN_3,
336 jack, NULL, 0);
337 if (ret) {
338 dev_err(rtd->dev, "Headset Jack creation failed: %d\n", ret);
339 return ret;
340 }
341
342 snd_jack_set_key(jack->jack, SND_JACK_BTN_0, KEY_PLAYPAUSE);
343 snd_jack_set_key(jack->jack, SND_JACK_BTN_1, KEY_VOICECOMMAND);
344 snd_jack_set_key(jack->jack, SND_JACK_BTN_2, KEY_VOLUMEUP);
345 snd_jack_set_key(jack->jack, SND_JACK_BTN_3, KEY_VOLUMEDOWN);
346
347 ret = snd_soc_component_set_jack(cmpnt_codec, jack, NULL);
348 if (ret) {
349 dev_err(rtd->dev, "Headset Jack set failed: %d\n", ret);
350 return ret;
351 }
352
353 return 0;
354};
355
356static int mt8195_etdm_hw_params_fixup(struct snd_soc_pcm_runtime *rtd,
357 struct snd_pcm_hw_params *params)
358{
359 /* fix BE i2s format to 32bit, clean param mask first */
360 snd_mask_reset_range(hw_param_mask(params, SNDRV_PCM_HW_PARAM_FORMAT),
361 0, (__force unsigned int)SNDRV_PCM_FORMAT_LAST);
362
363 params_set_format(params, SNDRV_PCM_FORMAT_S24_LE);
364
365 return 0;
366}
367
368static int mt8195_hdmitx_dptx_startup(struct snd_pcm_substream *substream)
369{
370 static const unsigned int rates[] = {
371 48000
372 };
373 static const unsigned int channels[] = {
374 2, 4, 6, 8
375 };
376 static const struct snd_pcm_hw_constraint_list constraints_rates = {
377 .count = ARRAY_SIZE(rates),
378 .list = rates,
379 .mask = 0,
380 };
381 static const struct snd_pcm_hw_constraint_list constraints_channels = {
382 .count = ARRAY_SIZE(channels),
383 .list = channels,
384 .mask = 0,
385 };
386
387 struct snd_soc_pcm_runtime *rtd = asoc_substream_to_rtd(substream);
388 struct snd_pcm_runtime *runtime = substream->runtime;
389 int ret;
390
391 ret = snd_pcm_hw_constraint_list(runtime, 0,
392 SNDRV_PCM_HW_PARAM_RATE,
393 &constraints_rates);
394 if (ret < 0) {
395 dev_err(rtd->dev, "hw_constraint_list rate failed\n");
396 return ret;
397 }
398
399 ret = snd_pcm_hw_constraint_list(runtime, 0,
400 SNDRV_PCM_HW_PARAM_CHANNELS,
401 &constraints_channels);
402 if (ret < 0) {
403 dev_err(rtd->dev, "hw_constraint_list channel failed\n");
404 return ret;
405 }
406
407 return 0;
408}
409
410static const struct snd_soc_ops mt8195_hdmitx_dptx_playback_ops = {
411 .startup = mt8195_hdmitx_dptx_startup,
412};
413
414static int mt8195_dptx_hw_params(struct snd_pcm_substream *substream,
415 struct snd_pcm_hw_params *params)
416{
417 struct snd_soc_pcm_runtime *rtd = substream->private_data;
418 struct snd_soc_dai *cpu_dai = asoc_rtd_to_cpu(rtd, 0);
419
420 return snd_soc_dai_set_sysclk(cpu_dai, 0, params_rate(params) * 256,
421 SND_SOC_CLOCK_OUT);
422}
423
424static struct snd_soc_ops mt8195_dptx_ops = {
425 .hw_params = mt8195_dptx_hw_params,
426};
427
428static int mt8195_dptx_codec_init(struct snd_soc_pcm_runtime *rtd)
429{
430 struct mt8195_mt6359_rt1011_rt5682_priv *priv =
431 snd_soc_card_get_drvdata(rtd->card);
432 struct snd_soc_component *cmpnt_codec =
433 asoc_rtd_to_codec(rtd, 0)->component;
434 int ret;
435
436 ret = snd_soc_card_jack_new(rtd->card, "DP Jack", SND_JACK_LINEOUT,
437 &priv->dp_jack, NULL, 0);
438 if (ret)
439 return ret;
440
441 return snd_soc_component_set_jack(cmpnt_codec, &priv->dp_jack, NULL);
442}
443
444static int mt8195_hdmi_codec_init(struct snd_soc_pcm_runtime *rtd)
445{
446 struct mt8195_mt6359_rt1011_rt5682_priv *priv =
447 snd_soc_card_get_drvdata(rtd->card);
448 struct snd_soc_component *cmpnt_codec =
449 asoc_rtd_to_codec(rtd, 0)->component;
450 int ret;
451
452 ret = snd_soc_card_jack_new(rtd->card, "HDMI Jack", SND_JACK_LINEOUT,
453 &priv->hdmi_jack, NULL, 0);
454 if (ret)
455 return ret;
456
457 return snd_soc_component_set_jack(cmpnt_codec, &priv->hdmi_jack, NULL);
458}
459
460static int mt8195_dptx_hw_params_fixup(struct snd_soc_pcm_runtime *rtd,
461 struct snd_pcm_hw_params *params)
462
463{
464 /* fix BE i2s format to 32bit, clean param mask first */
465 snd_mask_reset_range(hw_param_mask(params, SNDRV_PCM_HW_PARAM_FORMAT),
466 0, (__force unsigned int)SNDRV_PCM_FORMAT_LAST);
467
468 params_set_format(params, SNDRV_PCM_FORMAT_S24_LE);
469
470 return 0;
471}
472
473static int mt8195_playback_startup(struct snd_pcm_substream *substream)
474{
475 static const unsigned int rates[] = {
476 48000
477 };
478 static const unsigned int channels[] = {
479 2
480 };
481 static const struct snd_pcm_hw_constraint_list constraints_rates = {
482 .count = ARRAY_SIZE(rates),
483 .list = rates,
484 .mask = 0,
485 };
486 static const struct snd_pcm_hw_constraint_list constraints_channels = {
487 .count = ARRAY_SIZE(channels),
488 .list = channels,
489 .mask = 0,
490 };
491
492 struct snd_soc_pcm_runtime *rtd = asoc_substream_to_rtd(substream);
493 struct snd_pcm_runtime *runtime = substream->runtime;
494 int ret;
495
496 ret = snd_pcm_hw_constraint_list(runtime, 0,
497 SNDRV_PCM_HW_PARAM_RATE,
498 &constraints_rates);
499 if (ret < 0) {
500 dev_err(rtd->dev, "hw_constraint_list rate failed\n");
501 return ret;
502 }
503
504 ret = snd_pcm_hw_constraint_list(runtime, 0,
505 SNDRV_PCM_HW_PARAM_CHANNELS,
506 &constraints_channels);
507 if (ret < 0) {
508 dev_err(rtd->dev, "hw_constraint_list channel failed\n");
509 return ret;
510 }
511
512 return 0;
513}
514
515static const struct snd_soc_ops mt8195_playback_ops = {
516 .startup = mt8195_playback_startup,
517};
518
519static int mt8195_capture_startup(struct snd_pcm_substream *substream)
520{
521 static const unsigned int rates[] = {
522 48000
523 };
524 static const unsigned int channels[] = {
525 1, 2
526 };
527 static const struct snd_pcm_hw_constraint_list constraints_rates = {
528 .count = ARRAY_SIZE(rates),
529 .list = rates,
530 .mask = 0,
531 };
532 static const struct snd_pcm_hw_constraint_list constraints_channels = {
533 .count = ARRAY_SIZE(channels),
534 .list = channels,
535 .mask = 0,
536 };
537
538 struct snd_soc_pcm_runtime *rtd = asoc_substream_to_rtd(substream);
539 struct snd_pcm_runtime *runtime = substream->runtime;
540 int ret;
541
542 ret = snd_pcm_hw_constraint_list(runtime, 0,
543 SNDRV_PCM_HW_PARAM_RATE,
544 &constraints_rates);
545 if (ret < 0) {
546 dev_err(rtd->dev, "hw_constraint_list rate failed\n");
547 return ret;
548 }
549
550 ret = snd_pcm_hw_constraint_list(runtime, 0,
551 SNDRV_PCM_HW_PARAM_CHANNELS,
552 &constraints_channels);
553 if (ret < 0) {
554 dev_err(rtd->dev, "hw_constraint_list channel failed\n");
555 return ret;
556 }
557
558 return 0;
559}
560
561static const struct snd_soc_ops mt8195_capture_ops = {
562 .startup = mt8195_capture_startup,
563};
564
565enum {
566 DAI_LINK_DL2_FE,
567 DAI_LINK_DL3_FE,
568 DAI_LINK_DL6_FE,
569 DAI_LINK_DL7_FE,
570 DAI_LINK_DL8_FE,
571 DAI_LINK_DL10_FE,
572 DAI_LINK_DL11_FE,
573 DAI_LINK_UL1_FE,
574 DAI_LINK_UL2_FE,
575 DAI_LINK_UL3_FE,
576 DAI_LINK_UL4_FE,
577 DAI_LINK_UL5_FE,
578 DAI_LINK_UL6_FE,
579 DAI_LINK_UL8_FE,
580 DAI_LINK_UL9_FE,
581 DAI_LINK_UL10_FE,
582 DAI_LINK_DL_SRC_BE,
583 DAI_LINK_DPTX_BE,
584 DAI_LINK_ETDM1_IN_BE,
585 DAI_LINK_ETDM2_IN_BE,
586 DAI_LINK_ETDM1_OUT_BE,
587 DAI_LINK_ETDM2_OUT_BE,
588 DAI_LINK_ETDM3_OUT_BE,
589 DAI_LINK_PCM1_BE,
590 DAI_LINK_UL_SRC1_BE,
591 DAI_LINK_UL_SRC2_BE,
592};
593
594/* FE */
595SND_SOC_DAILINK_DEFS(DL2_FE,
596 DAILINK_COMP_ARRAY(COMP_CPU("DL2")),
597 DAILINK_COMP_ARRAY(COMP_DUMMY()),
598 DAILINK_COMP_ARRAY(COMP_EMPTY()));
599
600SND_SOC_DAILINK_DEFS(DL3_FE,
601 DAILINK_COMP_ARRAY(COMP_CPU("DL3")),
602 DAILINK_COMP_ARRAY(COMP_DUMMY()),
603 DAILINK_COMP_ARRAY(COMP_EMPTY()));
604
605SND_SOC_DAILINK_DEFS(DL6_FE,
606 DAILINK_COMP_ARRAY(COMP_CPU("DL6")),
607 DAILINK_COMP_ARRAY(COMP_DUMMY()),
608 DAILINK_COMP_ARRAY(COMP_EMPTY()));
609
610SND_SOC_DAILINK_DEFS(DL7_FE,
611 DAILINK_COMP_ARRAY(COMP_CPU("DL7")),
612 DAILINK_COMP_ARRAY(COMP_DUMMY()),
613 DAILINK_COMP_ARRAY(COMP_EMPTY()));
614
615SND_SOC_DAILINK_DEFS(DL8_FE,
616 DAILINK_COMP_ARRAY(COMP_CPU("DL8")),
617 DAILINK_COMP_ARRAY(COMP_DUMMY()),
618 DAILINK_COMP_ARRAY(COMP_EMPTY()));
619
620SND_SOC_DAILINK_DEFS(DL10_FE,
621 DAILINK_COMP_ARRAY(COMP_CPU("DL10")),
622 DAILINK_COMP_ARRAY(COMP_DUMMY()),
623 DAILINK_COMP_ARRAY(COMP_EMPTY()));
624
625SND_SOC_DAILINK_DEFS(DL11_FE,
626 DAILINK_COMP_ARRAY(COMP_CPU("DL11")),
627 DAILINK_COMP_ARRAY(COMP_DUMMY()),
628 DAILINK_COMP_ARRAY(COMP_EMPTY()));
629
630SND_SOC_DAILINK_DEFS(UL1_FE,
631 DAILINK_COMP_ARRAY(COMP_CPU("UL1")),
632 DAILINK_COMP_ARRAY(COMP_DUMMY()),
633 DAILINK_COMP_ARRAY(COMP_EMPTY()));
634
635SND_SOC_DAILINK_DEFS(UL2_FE,
636 DAILINK_COMP_ARRAY(COMP_CPU("UL2")),
637 DAILINK_COMP_ARRAY(COMP_DUMMY()),
638 DAILINK_COMP_ARRAY(COMP_EMPTY()));
639
640SND_SOC_DAILINK_DEFS(UL3_FE,
641 DAILINK_COMP_ARRAY(COMP_CPU("UL3")),
642 DAILINK_COMP_ARRAY(COMP_DUMMY()),
643 DAILINK_COMP_ARRAY(COMP_EMPTY()));
644
645SND_SOC_DAILINK_DEFS(UL4_FE,
646 DAILINK_COMP_ARRAY(COMP_CPU("UL4")),
647 DAILINK_COMP_ARRAY(COMP_DUMMY()),
648 DAILINK_COMP_ARRAY(COMP_EMPTY()));
649
650SND_SOC_DAILINK_DEFS(UL5_FE,
651 DAILINK_COMP_ARRAY(COMP_CPU("UL5")),
652 DAILINK_COMP_ARRAY(COMP_DUMMY()),
653 DAILINK_COMP_ARRAY(COMP_EMPTY()));
654
655SND_SOC_DAILINK_DEFS(UL6_FE,
656 DAILINK_COMP_ARRAY(COMP_CPU("UL6")),
657 DAILINK_COMP_ARRAY(COMP_DUMMY()),
658 DAILINK_COMP_ARRAY(COMP_EMPTY()));
659
660SND_SOC_DAILINK_DEFS(UL8_FE,
661 DAILINK_COMP_ARRAY(COMP_CPU("UL8")),
662 DAILINK_COMP_ARRAY(COMP_DUMMY()),
663 DAILINK_COMP_ARRAY(COMP_EMPTY()));
664
665SND_SOC_DAILINK_DEFS(UL9_FE,
666 DAILINK_COMP_ARRAY(COMP_CPU("UL9")),
667 DAILINK_COMP_ARRAY(COMP_DUMMY()),
668 DAILINK_COMP_ARRAY(COMP_EMPTY()));
669
670SND_SOC_DAILINK_DEFS(UL10_FE,
671 DAILINK_COMP_ARRAY(COMP_CPU("UL10")),
672 DAILINK_COMP_ARRAY(COMP_DUMMY()),
673 DAILINK_COMP_ARRAY(COMP_EMPTY()));
674
675/* BE */
676SND_SOC_DAILINK_DEFS(DL_SRC_BE,
677 DAILINK_COMP_ARRAY(COMP_CPU("DL_SRC")),
678 DAILINK_COMP_ARRAY(COMP_CODEC("mt6359-sound",
679 "mt6359-snd-codec-aif1")),
680 DAILINK_COMP_ARRAY(COMP_EMPTY()));
681
682SND_SOC_DAILINK_DEFS(DPTX_BE,
683 DAILINK_COMP_ARRAY(COMP_CPU("DPTX")),
684 DAILINK_COMP_ARRAY(COMP_DUMMY()),
685 DAILINK_COMP_ARRAY(COMP_EMPTY()));
686
687SND_SOC_DAILINK_DEFS(ETDM1_IN_BE,
688 DAILINK_COMP_ARRAY(COMP_CPU("ETDM1_IN")),
689 DAILINK_COMP_ARRAY(COMP_DUMMY()),
690 DAILINK_COMP_ARRAY(COMP_EMPTY()));
691
692SND_SOC_DAILINK_DEFS(ETDM2_IN_BE,
693 DAILINK_COMP_ARRAY(COMP_CPU("ETDM2_IN")),
694 DAILINK_COMP_ARRAY(COMP_CODEC(RT5682_DEV0_NAME,
695 RT5682_CODEC_DAI)),
696 DAILINK_COMP_ARRAY(COMP_EMPTY()));
697
698SND_SOC_DAILINK_DEFS(ETDM1_OUT_BE,
699 DAILINK_COMP_ARRAY(COMP_CPU("ETDM1_OUT")),
700 DAILINK_COMP_ARRAY(COMP_CODEC(RT5682_DEV0_NAME,
701 RT5682_CODEC_DAI)),
702 DAILINK_COMP_ARRAY(COMP_EMPTY()));
703
704SND_SOC_DAILINK_DEFS(ETDM2_OUT_BE,
705 DAILINK_COMP_ARRAY(COMP_CPU("ETDM2_OUT")),
706 DAILINK_COMP_ARRAY(COMP_CODEC(RT1011_DEV0_NAME,
707 RT1011_CODEC_DAI),
708 COMP_CODEC(RT1011_DEV1_NAME,
709 RT1011_CODEC_DAI)),
710 DAILINK_COMP_ARRAY(COMP_EMPTY()));
711
712SND_SOC_DAILINK_DEFS(ETDM3_OUT_BE,
713 DAILINK_COMP_ARRAY(COMP_CPU("ETDM3_OUT")),
714 DAILINK_COMP_ARRAY(COMP_DUMMY()),
715 DAILINK_COMP_ARRAY(COMP_EMPTY()));
716
717SND_SOC_DAILINK_DEFS(PCM1_BE,
718 DAILINK_COMP_ARRAY(COMP_CPU("PCM1")),
719 DAILINK_COMP_ARRAY(COMP_DUMMY()),
720 DAILINK_COMP_ARRAY(COMP_EMPTY()));
721
722SND_SOC_DAILINK_DEFS(UL_SRC1_BE,
723 DAILINK_COMP_ARRAY(COMP_CPU("UL_SRC1")),
724 DAILINK_COMP_ARRAY(COMP_CODEC("mt6359-sound",
725 "mt6359-snd-codec-aif1"),
726 COMP_CODEC("dmic-codec",
727 "dmic-hifi")),
728 DAILINK_COMP_ARRAY(COMP_EMPTY()));
729
730SND_SOC_DAILINK_DEFS(UL_SRC2_BE,
731 DAILINK_COMP_ARRAY(COMP_CPU("UL_SRC2")),
732 DAILINK_COMP_ARRAY(COMP_CODEC("mt6359-sound",
733 "mt6359-snd-codec-aif2")),
734 DAILINK_COMP_ARRAY(COMP_EMPTY()));
735
736static struct snd_soc_dai_link mt8195_mt6359_rt1011_rt5682_dai_links[] = {
737 /* FE */
738 [DAI_LINK_DL2_FE] = {
739 .name = "DL2_FE",
740 .stream_name = "DL2 Playback",
741 .trigger = {
742 SND_SOC_DPCM_TRIGGER_POST,
743 SND_SOC_DPCM_TRIGGER_POST,
744 },
745 .dynamic = 1,
746 .dpcm_playback = 1,
747 .ops = &mt8195_playback_ops,
748 SND_SOC_DAILINK_REG(DL2_FE),
749 },
750 [DAI_LINK_DL3_FE] = {
751 .name = "DL3_FE",
752 .stream_name = "DL3 Playback",
753 .trigger = {
754 SND_SOC_DPCM_TRIGGER_POST,
755 SND_SOC_DPCM_TRIGGER_POST,
756 },
757 .dynamic = 1,
758 .dpcm_playback = 1,
759 .ops = &mt8195_playback_ops,
760 SND_SOC_DAILINK_REG(DL3_FE),
761 },
762 [DAI_LINK_DL6_FE] = {
763 .name = "DL6_FE",
764 .stream_name = "DL6 Playback",
765 .trigger = {
766 SND_SOC_DPCM_TRIGGER_POST,
767 SND_SOC_DPCM_TRIGGER_POST,
768 },
769 .dynamic = 1,
770 .dpcm_playback = 1,
771 .ops = &mt8195_playback_ops,
772 SND_SOC_DAILINK_REG(DL6_FE),
773 },
774 [DAI_LINK_DL7_FE] = {
775 .name = "DL7_FE",
776 .stream_name = "DL7 Playback",
777 .trigger = {
778 SND_SOC_DPCM_TRIGGER_PRE,
779 SND_SOC_DPCM_TRIGGER_PRE,
780 },
781 .dynamic = 1,
782 .dpcm_playback = 1,
783 SND_SOC_DAILINK_REG(DL7_FE),
784 },
785 [DAI_LINK_DL8_FE] = {
786 .name = "DL8_FE",
787 .stream_name = "DL8 Playback",
788 .trigger = {
789 SND_SOC_DPCM_TRIGGER_POST,
790 SND_SOC_DPCM_TRIGGER_POST,
791 },
792 .dynamic = 1,
793 .dpcm_playback = 1,
794 .ops = &mt8195_playback_ops,
795 SND_SOC_DAILINK_REG(DL8_FE),
796 },
797 [DAI_LINK_DL10_FE] = {
798 .name = "DL10_FE",
799 .stream_name = "DL10 Playback",
800 .trigger = {
801 SND_SOC_DPCM_TRIGGER_POST,
802 SND_SOC_DPCM_TRIGGER_POST,
803 },
804 .dynamic = 1,
805 .dpcm_playback = 1,
806 .ops = &mt8195_hdmitx_dptx_playback_ops,
807 SND_SOC_DAILINK_REG(DL10_FE),
808 },
809 [DAI_LINK_DL11_FE] = {
810 .name = "DL11_FE",
811 .stream_name = "DL11 Playback",
812 .trigger = {
813 SND_SOC_DPCM_TRIGGER_POST,
814 SND_SOC_DPCM_TRIGGER_POST,
815 },
816 .dynamic = 1,
817 .dpcm_playback = 1,
818 .ops = &mt8195_playback_ops,
819 SND_SOC_DAILINK_REG(DL11_FE),
820 },
821 [DAI_LINK_UL1_FE] = {
822 .name = "UL1_FE",
823 .stream_name = "UL1 Capture",
824 .trigger = {
825 SND_SOC_DPCM_TRIGGER_PRE,
826 SND_SOC_DPCM_TRIGGER_PRE,
827 },
828 .dynamic = 1,
829 .dpcm_capture = 1,
830 SND_SOC_DAILINK_REG(UL1_FE),
831 },
832 [DAI_LINK_UL2_FE] = {
833 .name = "UL2_FE",
834 .stream_name = "UL2 Capture",
835 .trigger = {
836 SND_SOC_DPCM_TRIGGER_POST,
837 SND_SOC_DPCM_TRIGGER_POST,
838 },
839 .dynamic = 1,
840 .dpcm_capture = 1,
841 .ops = &mt8195_capture_ops,
842 SND_SOC_DAILINK_REG(UL2_FE),
843 },
844 [DAI_LINK_UL3_FE] = {
845 .name = "UL3_FE",
846 .stream_name = "UL3 Capture",
847 .trigger = {
848 SND_SOC_DPCM_TRIGGER_POST,
849 SND_SOC_DPCM_TRIGGER_POST,
850 },
851 .dynamic = 1,
852 .dpcm_capture = 1,
853 .ops = &mt8195_capture_ops,
854 SND_SOC_DAILINK_REG(UL3_FE),
855 },
856 [DAI_LINK_UL4_FE] = {
857 .name = "UL4_FE",
858 .stream_name = "UL4 Capture",
859 .trigger = {
860 SND_SOC_DPCM_TRIGGER_POST,
861 SND_SOC_DPCM_TRIGGER_POST,
862 },
863 .dynamic = 1,
864 .dpcm_capture = 1,
865 .ops = &mt8195_capture_ops,
866 SND_SOC_DAILINK_REG(UL4_FE),
867 },
868 [DAI_LINK_UL5_FE] = {
869 .name = "UL5_FE",
870 .stream_name = "UL5 Capture",
871 .trigger = {
872 SND_SOC_DPCM_TRIGGER_POST,
873 SND_SOC_DPCM_TRIGGER_POST,
874 },
875 .dynamic = 1,
876 .dpcm_capture = 1,
877 .ops = &mt8195_capture_ops,
878 SND_SOC_DAILINK_REG(UL5_FE),
879 },
880 [DAI_LINK_UL6_FE] = {
881 .name = "UL6_FE",
882 .stream_name = "UL6 Capture",
883 .trigger = {
884 SND_SOC_DPCM_TRIGGER_PRE,
885 SND_SOC_DPCM_TRIGGER_PRE,
886 },
887 .dynamic = 1,
888 .dpcm_capture = 1,
889 SND_SOC_DAILINK_REG(UL6_FE),
890 },
891 [DAI_LINK_UL8_FE] = {
892 .name = "UL8_FE",
893 .stream_name = "UL8 Capture",
894 .trigger = {
895 SND_SOC_DPCM_TRIGGER_POST,
896 SND_SOC_DPCM_TRIGGER_POST,
897 },
898 .dynamic = 1,
899 .dpcm_capture = 1,
900 .ops = &mt8195_capture_ops,
901 SND_SOC_DAILINK_REG(UL8_FE),
902 },
903 [DAI_LINK_UL9_FE] = {
904 .name = "UL9_FE",
905 .stream_name = "UL9 Capture",
906 .trigger = {
907 SND_SOC_DPCM_TRIGGER_POST,
908 SND_SOC_DPCM_TRIGGER_POST,
909 },
910 .dynamic = 1,
911 .dpcm_capture = 1,
912 .ops = &mt8195_capture_ops,
913 SND_SOC_DAILINK_REG(UL9_FE),
914 },
915 [DAI_LINK_UL10_FE] = {
916 .name = "UL10_FE",
917 .stream_name = "UL10 Capture",
918 .trigger = {
919 SND_SOC_DPCM_TRIGGER_POST,
920 SND_SOC_DPCM_TRIGGER_POST,
921 },
922 .dynamic = 1,
923 .dpcm_capture = 1,
924 .ops = &mt8195_capture_ops,
925 SND_SOC_DAILINK_REG(UL10_FE),
926 },
927 /* BE */
928 [DAI_LINK_DL_SRC_BE] = {
929 .name = "DL_SRC_BE",
930 .init = mt8195_mt6359_init,
931 .no_pcm = 1,
932 .dpcm_playback = 1,
933 SND_SOC_DAILINK_REG(DL_SRC_BE),
934 },
935 [DAI_LINK_DPTX_BE] = {
936 .name = "DPTX_BE",
937 .no_pcm = 1,
938 .dpcm_playback = 1,
939 .ops = &mt8195_dptx_ops,
940 .be_hw_params_fixup = mt8195_dptx_hw_params_fixup,
941 SND_SOC_DAILINK_REG(DPTX_BE),
942 },
943 [DAI_LINK_ETDM1_IN_BE] = {
944 .name = "ETDM1_IN_BE",
945 .no_pcm = 1,
946 .dai_fmt = SND_SOC_DAIFMT_I2S |
947 SND_SOC_DAIFMT_NB_NF |
948 SND_SOC_DAIFMT_CBS_CFS,
949 .dpcm_capture = 1,
950 SND_SOC_DAILINK_REG(ETDM1_IN_BE),
951 },
952 [DAI_LINK_ETDM2_IN_BE] = {
953 .name = "ETDM2_IN_BE",
954 .no_pcm = 1,
955 .dai_fmt = SND_SOC_DAIFMT_I2S |
956 SND_SOC_DAIFMT_NB_NF |
957 SND_SOC_DAIFMT_CBS_CFS,
958 .dpcm_capture = 1,
959 .init = mt8195_rt5682_init,
960 .ops = &mt8195_rt5682_etdm_ops,
961 .be_hw_params_fixup = mt8195_etdm_hw_params_fixup,
962 SND_SOC_DAILINK_REG(ETDM2_IN_BE),
963 },
964 [DAI_LINK_ETDM1_OUT_BE] = {
965 .name = "ETDM1_OUT_BE",
966 .no_pcm = 1,
967 .dai_fmt = SND_SOC_DAIFMT_I2S |
968 SND_SOC_DAIFMT_NB_NF |
969 SND_SOC_DAIFMT_CBS_CFS,
970 .dpcm_playback = 1,
971 .ops = &mt8195_rt5682_etdm_ops,
972 .be_hw_params_fixup = mt8195_etdm_hw_params_fixup,
973 SND_SOC_DAILINK_REG(ETDM1_OUT_BE),
974 },
975 [DAI_LINK_ETDM2_OUT_BE] = {
976 .name = "ETDM2_OUT_BE",
977 .no_pcm = 1,
978 .dai_fmt = SND_SOC_DAIFMT_I2S |
979 SND_SOC_DAIFMT_NB_NF |
980 SND_SOC_DAIFMT_CBS_CFS,
981 .dpcm_playback = 1,
982 .ops = &mt8195_rt1011_etdm_ops,
983 .be_hw_params_fixup = mt8195_etdm_hw_params_fixup,
984 SND_SOC_DAILINK_REG(ETDM2_OUT_BE),
985 },
986 [DAI_LINK_ETDM3_OUT_BE] = {
987 .name = "ETDM3_OUT_BE",
988 .no_pcm = 1,
989 .dai_fmt = SND_SOC_DAIFMT_I2S |
990 SND_SOC_DAIFMT_NB_NF |
991 SND_SOC_DAIFMT_CBS_CFS,
992 .dpcm_playback = 1,
993 SND_SOC_DAILINK_REG(ETDM3_OUT_BE),
994 },
995 [DAI_LINK_PCM1_BE] = {
996 .name = "PCM1_BE",
997 .no_pcm = 1,
998 .dai_fmt = SND_SOC_DAIFMT_I2S |
999 SND_SOC_DAIFMT_NB_NF |
1000 SND_SOC_DAIFMT_CBS_CFS,
1001 .dpcm_capture = 1,
1002 SND_SOC_DAILINK_REG(PCM1_BE),
1003 },
1004 [DAI_LINK_UL_SRC1_BE] = {
1005 .name = "UL_SRC1_BE",
1006 .no_pcm = 1,
1007 .dpcm_capture = 1,
1008 SND_SOC_DAILINK_REG(UL_SRC1_BE),
1009 },
1010 [DAI_LINK_UL_SRC2_BE] = {
1011 .name = "UL_SRC2_BE",
1012 .no_pcm = 1,
1013 .dpcm_capture = 1,
1014 SND_SOC_DAILINK_REG(UL_SRC2_BE),
1015 },
1016};
1017
1018static struct snd_soc_codec_conf rt1011_amp_conf[] = {
1019 {
1020 .dlc = COMP_CODEC_CONF(RT1011_DEV0_NAME),
1021 .name_prefix = "Left",
1022 },
1023 {
1024 .dlc = COMP_CODEC_CONF(RT1011_DEV1_NAME),
1025 .name_prefix = "Right",
1026 },
1027};
1028
1029static struct snd_soc_card mt8195_mt6359_rt1011_rt5682_soc_card = {
1030 .name = "mt8195_r1011_5682",
1031 .owner = THIS_MODULE,
1032 .dai_link = mt8195_mt6359_rt1011_rt5682_dai_links,
1033 .num_links = ARRAY_SIZE(mt8195_mt6359_rt1011_rt5682_dai_links),
1034 .controls = mt8195_mt6359_rt1011_rt5682_controls,
1035 .num_controls = ARRAY_SIZE(mt8195_mt6359_rt1011_rt5682_controls),
1036 .dapm_widgets = mt8195_mt6359_rt1011_rt5682_widgets,
1037 .num_dapm_widgets = ARRAY_SIZE(mt8195_mt6359_rt1011_rt5682_widgets),
1038 .dapm_routes = mt8195_mt6359_rt1011_rt5682_routes,
1039 .num_dapm_routes = ARRAY_SIZE(mt8195_mt6359_rt1011_rt5682_routes),
1040 .codec_conf = rt1011_amp_conf,
1041 .num_configs = ARRAY_SIZE(rt1011_amp_conf),
1042};
1043
1044static int mt8195_mt6359_rt1011_rt5682_dev_probe(struct platform_device *pdev)
1045{
1046 struct snd_soc_card *card = &mt8195_mt6359_rt1011_rt5682_soc_card;
1047 struct snd_soc_dai_link *dai_link;
1048 struct mt8195_mt6359_rt1011_rt5682_priv *priv;
1049 int ret, i;
1050
1051 card->dev = &pdev->dev;
1052
1053 priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
1054 if (!priv)
1055 return -ENOMEM;
1056
1057 priv->platform_node = of_parse_phandle(pdev->dev.of_node,
1058 "mediatek,platform", 0);
1059 if (!priv->platform_node) {
1060 dev_dbg(&pdev->dev, "Property 'platform' missing or invalid\n");
1061 return -EINVAL;
1062 }
1063
1064 for_each_card_prelinks(card, i, dai_link) {
1065 if (!dai_link->platforms->name)
1066 dai_link->platforms->of_node = priv->platform_node;
1067
1068 if (strcmp(dai_link->name, "DPTX_BE") == 0) {
1069 priv->dp_node =
1070 of_parse_phandle(pdev->dev.of_node,
1071 "mediatek,dptx-codec", 0);
1072
1073 if (!priv->dp_node) {
1074 dev_dbg(&pdev->dev, "No property 'dptx-codec'\n");
1075 } else {
1076 dai_link->codecs->of_node = priv->dp_node;
1077 dai_link->codecs->name = NULL;
1078 dai_link->codecs->dai_name = "i2s-hifi";
1079 dai_link->init = mt8195_dptx_codec_init;
1080 }
1081 }
1082
1083 if (strcmp(dai_link->name, "ETDM3_OUT_BE") == 0) {
1084 priv->hdmi_node =
1085 of_parse_phandle(pdev->dev.of_node,
1086 "mediatek,hdmi-codec", 0);
1087 if (!priv->hdmi_node) {
1088 dev_dbg(&pdev->dev, "No property 'hdmi-codec'\n");
1089 } else {
1090 dai_link->codecs->of_node = priv->hdmi_node;
1091 dai_link->codecs->name = NULL;
1092 dai_link->codecs->dai_name = "i2s-hifi";
1093 dai_link->init = mt8195_hdmi_codec_init;
1094 }
1095 }
1096 }
1097
1098 snd_soc_card_set_drvdata(card, priv);
1099
1100 ret = devm_snd_soc_register_card(&pdev->dev, card);
1101 if (ret) {
1102 dev_err(&pdev->dev, "%s snd_soc_register_card fail %d\n",
1103 __func__, ret);
1104 of_node_put(priv->hdmi_node);
1105 of_node_put(priv->dp_node);
1106 of_node_put(priv->platform_node);
1107 }
1108
1109 return ret;
1110}
1111
1112static int mt8195_mt6359_rt1011_rt5682_dev_remove(struct platform_device *pdev)
1113{
1114 struct snd_soc_card *card = platform_get_drvdata(pdev);
1115 struct mt8195_mt6359_rt1011_rt5682_priv *priv =
1116 snd_soc_card_get_drvdata(card);
1117
1118 of_node_put(priv->hdmi_node);
1119 of_node_put(priv->dp_node);
1120 of_node_put(priv->platform_node);
1121
1122 return 0;
1123}
1124
1125#ifdef CONFIG_OF
1126static const struct of_device_id mt8195_mt6359_rt1011_rt5682_dt_match[] = {
1127 {.compatible = "mediatek,mt8195_mt6359_rt1011_rt5682",},
1128 {}
1129};
1130#endif
1131
1132static const struct dev_pm_ops mt8195_mt6359_rt1011_rt5682_pm_ops = {
1133 .poweroff = snd_soc_poweroff,
1134 .restore = snd_soc_resume,
1135};
1136
1137static struct platform_driver mt8195_mt6359_rt1011_rt5682_driver = {
1138 .driver = {
1139 .name = "mt8195_mt6359_rt1011_rt5682",
1140#ifdef CONFIG_OF
1141 .of_match_table = mt8195_mt6359_rt1011_rt5682_dt_match,
1142#endif
1143 .pm = &mt8195_mt6359_rt1011_rt5682_pm_ops,
1144 },
1145 .probe = mt8195_mt6359_rt1011_rt5682_dev_probe,
1146 .remove = mt8195_mt6359_rt1011_rt5682_dev_remove,
1147};
1148
1149module_platform_driver(mt8195_mt6359_rt1011_rt5682_driver);
1150
1151/* Module information */
1152MODULE_DESCRIPTION("MT8195-MT6359-RT1011-RT5682 ALSA SoC machine driver");
1153MODULE_AUTHOR("Trevor Wu <trevor.wu@mediatek.com>");
1154MODULE_LICENSE("GPL");
1155MODULE_ALIAS("mt8195_mt6359_rt1011_rt5682 soc card");