Yoshihiro Shimoda | e62906d | 2021-12-01 16:32:59 +0900 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
| 2 | /* |
| 3 | * R-Car Gen4 System Controller |
| 4 | * |
| 5 | * Copyright (C) 2021 Renesas Electronics Corp. |
| 6 | */ |
| 7 | #ifndef __SOC_RENESAS_RCAR_GEN4_SYSC_H__ |
| 8 | #define __SOC_RENESAS_RCAR_GEN4_SYSC_H__ |
| 9 | |
| 10 | #include <linux/types.h> |
| 11 | |
| 12 | /* |
| 13 | * Power Domain flags |
| 14 | */ |
| 15 | #define PD_CPU BIT(0) /* Area contains main CPU core */ |
| 16 | #define PD_SCU BIT(1) /* Area contains SCU and L2 cache */ |
| 17 | #define PD_NO_CR BIT(2) /* Area lacks PWR{ON,OFF}CR registers */ |
| 18 | |
| 19 | #define PD_CPU_NOCR (PD_CPU | PD_NO_CR) /* CPU area lacks CR */ |
| 20 | #define PD_ALWAYS_ON PD_NO_CR /* Always-on area */ |
| 21 | |
| 22 | /* |
| 23 | * Description of a Power Area |
| 24 | */ |
| 25 | struct rcar_gen4_sysc_area { |
| 26 | const char *name; |
| 27 | u8 pdr; /* PDRn */ |
| 28 | int parent; /* -1 if none */ |
| 29 | unsigned int flags; /* See PD_* */ |
| 30 | }; |
| 31 | |
| 32 | /* |
| 33 | * SoC-specific Power Area Description |
| 34 | */ |
| 35 | struct rcar_gen4_sysc_info { |
| 36 | const struct rcar_gen4_sysc_area *areas; |
| 37 | unsigned int num_areas; |
| 38 | }; |
| 39 | |
| 40 | extern const struct rcar_gen4_sysc_info r8a779a0_sysc_info; |
Yoshihiro Shimoda | 654d5fd | 2021-12-01 16:33:00 +0900 | [diff] [blame] | 41 | extern const struct rcar_gen4_sysc_info r8a779f0_sysc_info; |
Yoshihiro Shimoda | e62906d | 2021-12-01 16:32:59 +0900 | [diff] [blame] | 42 | |
| 43 | #endif /* __SOC_RENESAS_RCAR_GEN4_SYSC_H__ */ |