Dan Murphy | 242b811 | 2020-08-12 14:50:16 -0500 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0 |
| 2 | // TI LP50XX LED chip family driver |
| 3 | // Copyright (C) 2018-20 Texas Instruments Incorporated - https://www.ti.com/ |
| 4 | |
| 5 | #include <linux/gpio/consumer.h> |
| 6 | #include <linux/i2c.h> |
| 7 | #include <linux/init.h> |
| 8 | #include <linux/leds.h> |
Andy Shevchenko | fb0f236 | 2021-02-16 17:50:50 +0200 | [diff] [blame] | 9 | #include <linux/mod_devicetable.h> |
Dan Murphy | 242b811 | 2020-08-12 14:50:16 -0500 | [diff] [blame] | 10 | #include <linux/module.h> |
| 11 | #include <linux/mutex.h> |
Dan Murphy | 242b811 | 2020-08-12 14:50:16 -0500 | [diff] [blame] | 12 | #include <linux/regmap.h> |
| 13 | #include <linux/regulator/consumer.h> |
| 14 | #include <linux/slab.h> |
| 15 | #include <uapi/linux/uleds.h> |
| 16 | |
| 17 | #include <linux/led-class-multicolor.h> |
| 18 | |
| 19 | #include "leds.h" |
| 20 | |
| 21 | #define LP50XX_DEV_CFG0 0x00 |
| 22 | #define LP50XX_DEV_CFG1 0x01 |
| 23 | #define LP50XX_LED_CFG0 0x02 |
| 24 | |
| 25 | /* LP5009 and LP5012 registers */ |
| 26 | #define LP5012_BNK_BRT 0x03 |
| 27 | #define LP5012_BNKA_CLR 0x04 |
| 28 | #define LP5012_BNKB_CLR 0x05 |
| 29 | #define LP5012_BNKC_CLR 0x06 |
| 30 | #define LP5012_LED0_BRT 0x07 |
| 31 | #define LP5012_OUT0_CLR 0x0b |
| 32 | #define LP5012_RESET 0x17 |
| 33 | |
| 34 | /* LP5018 and LP5024 registers */ |
| 35 | #define LP5024_BNK_BRT 0x03 |
| 36 | #define LP5024_BNKA_CLR 0x04 |
| 37 | #define LP5024_BNKB_CLR 0x05 |
| 38 | #define LP5024_BNKC_CLR 0x06 |
| 39 | #define LP5024_LED0_BRT 0x07 |
| 40 | #define LP5024_OUT0_CLR 0x0f |
| 41 | #define LP5024_RESET 0x27 |
| 42 | |
| 43 | /* LP5030 and LP5036 registers */ |
| 44 | #define LP5036_LED_CFG1 0x03 |
| 45 | #define LP5036_BNK_BRT 0x04 |
| 46 | #define LP5036_BNKA_CLR 0x05 |
| 47 | #define LP5036_BNKB_CLR 0x06 |
| 48 | #define LP5036_BNKC_CLR 0x07 |
| 49 | #define LP5036_LED0_BRT 0x08 |
| 50 | #define LP5036_OUT0_CLR 0x14 |
| 51 | #define LP5036_RESET 0x38 |
| 52 | |
| 53 | #define LP50XX_SW_RESET 0xff |
| 54 | #define LP50XX_CHIP_EN BIT(6) |
| 55 | |
| 56 | /* There are 3 LED outputs per bank */ |
| 57 | #define LP50XX_LEDS_PER_MODULE 3 |
| 58 | |
| 59 | #define LP5009_MAX_LED_MODULES 2 |
| 60 | #define LP5012_MAX_LED_MODULES 4 |
| 61 | #define LP5018_MAX_LED_MODULES 6 |
| 62 | #define LP5024_MAX_LED_MODULES 8 |
| 63 | #define LP5030_MAX_LED_MODULES 10 |
| 64 | #define LP5036_MAX_LED_MODULES 12 |
| 65 | |
| 66 | static const struct reg_default lp5012_reg_defs[] = { |
| 67 | {LP50XX_DEV_CFG0, 0x0}, |
| 68 | {LP50XX_DEV_CFG1, 0x3c}, |
| 69 | {LP50XX_LED_CFG0, 0x0}, |
| 70 | {LP5012_BNK_BRT, 0xff}, |
| 71 | {LP5012_BNKA_CLR, 0x0f}, |
| 72 | {LP5012_BNKB_CLR, 0x0f}, |
| 73 | {LP5012_BNKC_CLR, 0x0f}, |
| 74 | {LP5012_LED0_BRT, 0x0f}, |
| 75 | /* LEDX_BRT registers are all 0xff for defaults */ |
| 76 | {0x08, 0xff}, {0x09, 0xff}, {0x0a, 0xff}, |
| 77 | {LP5012_OUT0_CLR, 0x0f}, |
| 78 | /* OUTX_CLR registers are all 0x0 for defaults */ |
| 79 | {0x0c, 0x00}, {0x0d, 0x00}, {0x0e, 0x00}, {0x0f, 0x00}, {0x10, 0x00}, |
| 80 | {0x11, 0x00}, {0x12, 0x00}, {0x13, 0x00}, {0x14, 0x00}, {0x15, 0x00}, |
| 81 | {0x16, 0x00}, |
| 82 | {LP5012_RESET, 0x00} |
| 83 | }; |
| 84 | |
| 85 | static const struct reg_default lp5024_reg_defs[] = { |
| 86 | {LP50XX_DEV_CFG0, 0x0}, |
| 87 | {LP50XX_DEV_CFG1, 0x3c}, |
| 88 | {LP50XX_LED_CFG0, 0x0}, |
| 89 | {LP5024_BNK_BRT, 0xff}, |
| 90 | {LP5024_BNKA_CLR, 0x0f}, |
| 91 | {LP5024_BNKB_CLR, 0x0f}, |
| 92 | {LP5024_BNKC_CLR, 0x0f}, |
| 93 | {LP5024_LED0_BRT, 0x0f}, |
| 94 | /* LEDX_BRT registers are all 0xff for defaults */ |
| 95 | {0x08, 0xff}, {0x09, 0xff}, {0x0a, 0xff}, {0x0b, 0xff}, {0x0c, 0xff}, |
| 96 | {0x0d, 0xff}, {0x0e, 0xff}, |
| 97 | {LP5024_OUT0_CLR, 0x0f}, |
| 98 | /* OUTX_CLR registers are all 0x0 for defaults */ |
| 99 | {0x10, 0x00}, {0x11, 0x00}, {0x12, 0x00}, {0x13, 0x00}, {0x14, 0x00}, |
| 100 | {0x15, 0x00}, {0x16, 0x00}, {0x17, 0x00}, {0x18, 0x00}, {0x19, 0x00}, |
| 101 | {0x1a, 0x00}, {0x1b, 0x00}, {0x1c, 0x00}, {0x1d, 0x00}, {0x1e, 0x00}, |
| 102 | {0x1f, 0x00}, {0x20, 0x00}, {0x21, 0x00}, {0x22, 0x00}, {0x23, 0x00}, |
| 103 | {0x24, 0x00}, {0x25, 0x00}, {0x26, 0x00}, |
| 104 | {LP5024_RESET, 0x00} |
| 105 | }; |
| 106 | |
| 107 | static const struct reg_default lp5036_reg_defs[] = { |
| 108 | {LP50XX_DEV_CFG0, 0x0}, |
| 109 | {LP50XX_DEV_CFG1, 0x3c}, |
| 110 | {LP50XX_LED_CFG0, 0x0}, |
| 111 | {LP5036_LED_CFG1, 0x0}, |
| 112 | {LP5036_BNK_BRT, 0xff}, |
| 113 | {LP5036_BNKA_CLR, 0x0f}, |
| 114 | {LP5036_BNKB_CLR, 0x0f}, |
| 115 | {LP5036_BNKC_CLR, 0x0f}, |
| 116 | {LP5036_LED0_BRT, 0x0f}, |
| 117 | /* LEDX_BRT registers are all 0xff for defaults */ |
| 118 | {0x08, 0xff}, {0x09, 0xff}, {0x0a, 0xff}, {0x0b, 0xff}, {0x0c, 0xff}, |
| 119 | {0x0d, 0xff}, {0x0e, 0xff}, {0x0f, 0xff}, {0x10, 0xff}, {0x11, 0xff}, |
| 120 | {0x12, 0xff}, {0x13, 0xff}, |
| 121 | {LP5036_OUT0_CLR, 0x0f}, |
| 122 | /* OUTX_CLR registers are all 0x0 for defaults */ |
| 123 | {0x15, 0x00}, {0x16, 0x00}, {0x17, 0x00}, {0x18, 0x00}, {0x19, 0x00}, |
| 124 | {0x1a, 0x00}, {0x1b, 0x00}, {0x1c, 0x00}, {0x1d, 0x00}, {0x1e, 0x00}, |
| 125 | {0x1f, 0x00}, {0x20, 0x00}, {0x21, 0x00}, {0x22, 0x00}, {0x23, 0x00}, |
| 126 | {0x24, 0x00}, {0x25, 0x00}, {0x26, 0x00}, {0x27, 0x00}, {0x28, 0x00}, |
| 127 | {0x29, 0x00}, {0x2a, 0x00}, {0x2b, 0x00}, {0x2c, 0x00}, {0x2d, 0x00}, |
| 128 | {0x2e, 0x00}, {0x2f, 0x00}, {0x30, 0x00}, {0x31, 0x00}, {0x32, 0x00}, |
| 129 | {0x33, 0x00}, {0x34, 0x00}, {0x35, 0x00}, {0x36, 0x00}, {0x37, 0x00}, |
| 130 | {LP5036_RESET, 0x00} |
| 131 | }; |
| 132 | |
| 133 | static const struct regmap_config lp5012_regmap_config = { |
| 134 | .reg_bits = 8, |
| 135 | .val_bits = 8, |
| 136 | |
| 137 | .max_register = LP5012_RESET, |
| 138 | .reg_defaults = lp5012_reg_defs, |
| 139 | .num_reg_defaults = ARRAY_SIZE(lp5012_reg_defs), |
| 140 | .cache_type = REGCACHE_FLAT, |
| 141 | }; |
| 142 | |
| 143 | static const struct regmap_config lp5024_regmap_config = { |
| 144 | .reg_bits = 8, |
| 145 | .val_bits = 8, |
| 146 | |
| 147 | .max_register = LP5024_RESET, |
| 148 | .reg_defaults = lp5024_reg_defs, |
| 149 | .num_reg_defaults = ARRAY_SIZE(lp5024_reg_defs), |
| 150 | .cache_type = REGCACHE_FLAT, |
| 151 | }; |
| 152 | |
| 153 | static const struct regmap_config lp5036_regmap_config = { |
| 154 | .reg_bits = 8, |
| 155 | .val_bits = 8, |
| 156 | |
| 157 | .max_register = LP5036_RESET, |
| 158 | .reg_defaults = lp5036_reg_defs, |
| 159 | .num_reg_defaults = ARRAY_SIZE(lp5036_reg_defs), |
| 160 | .cache_type = REGCACHE_FLAT, |
| 161 | }; |
| 162 | |
| 163 | enum lp50xx_model { |
| 164 | LP5009, |
| 165 | LP5012, |
| 166 | LP5018, |
| 167 | LP5024, |
| 168 | LP5030, |
| 169 | LP5036, |
| 170 | }; |
| 171 | |
| 172 | /** |
| 173 | * struct lp50xx_chip_info - |
| 174 | * @lp50xx_regmap_config: regmap register configuration |
| 175 | * @model_id: LED device model |
| 176 | * @max_modules: total number of supported LED modules |
| 177 | * @num_leds: number of LED outputs available on the device |
| 178 | * @led_brightness0_reg: first brightness register of the device |
| 179 | * @mix_out0_reg: first color mix register of the device |
| 180 | * @bank_brt_reg: bank brightness register |
| 181 | * @bank_mix_reg: color mix register |
| 182 | * @reset_reg: device reset register |
| 183 | */ |
| 184 | struct lp50xx_chip_info { |
| 185 | const struct regmap_config *lp50xx_regmap_config; |
| 186 | int model_id; |
| 187 | u8 max_modules; |
| 188 | u8 num_leds; |
| 189 | u8 led_brightness0_reg; |
| 190 | u8 mix_out0_reg; |
| 191 | u8 bank_brt_reg; |
| 192 | u8 bank_mix_reg; |
| 193 | u8 reset_reg; |
| 194 | }; |
| 195 | |
| 196 | static const struct lp50xx_chip_info lp50xx_chip_info_tbl[] = { |
| 197 | [LP5009] = { |
| 198 | .model_id = LP5009, |
| 199 | .max_modules = LP5009_MAX_LED_MODULES, |
| 200 | .num_leds = LP5009_MAX_LED_MODULES * LP50XX_LEDS_PER_MODULE, |
| 201 | .led_brightness0_reg = LP5012_LED0_BRT, |
| 202 | .mix_out0_reg = LP5012_OUT0_CLR, |
| 203 | .bank_brt_reg = LP5012_BNK_BRT, |
| 204 | .bank_mix_reg = LP5012_BNKA_CLR, |
| 205 | .reset_reg = LP5012_RESET, |
| 206 | .lp50xx_regmap_config = &lp5012_regmap_config, |
| 207 | }, |
| 208 | [LP5012] = { |
| 209 | .model_id = LP5012, |
| 210 | .max_modules = LP5012_MAX_LED_MODULES, |
| 211 | .num_leds = LP5012_MAX_LED_MODULES * LP50XX_LEDS_PER_MODULE, |
| 212 | .led_brightness0_reg = LP5012_LED0_BRT, |
| 213 | .mix_out0_reg = LP5012_OUT0_CLR, |
| 214 | .bank_brt_reg = LP5012_BNK_BRT, |
| 215 | .bank_mix_reg = LP5012_BNKA_CLR, |
| 216 | .reset_reg = LP5012_RESET, |
| 217 | .lp50xx_regmap_config = &lp5012_regmap_config, |
| 218 | }, |
| 219 | [LP5018] = { |
| 220 | .model_id = LP5018, |
| 221 | .max_modules = LP5018_MAX_LED_MODULES, |
| 222 | .num_leds = LP5018_MAX_LED_MODULES * LP50XX_LEDS_PER_MODULE, |
| 223 | .led_brightness0_reg = LP5024_LED0_BRT, |
| 224 | .mix_out0_reg = LP5024_OUT0_CLR, |
| 225 | .bank_brt_reg = LP5024_BNK_BRT, |
| 226 | .bank_mix_reg = LP5024_BNKA_CLR, |
| 227 | .reset_reg = LP5024_RESET, |
| 228 | .lp50xx_regmap_config = &lp5024_regmap_config, |
| 229 | }, |
| 230 | [LP5024] = { |
| 231 | .model_id = LP5024, |
| 232 | .max_modules = LP5024_MAX_LED_MODULES, |
| 233 | .num_leds = LP5024_MAX_LED_MODULES * LP50XX_LEDS_PER_MODULE, |
| 234 | .led_brightness0_reg = LP5024_LED0_BRT, |
| 235 | .mix_out0_reg = LP5024_OUT0_CLR, |
| 236 | .bank_brt_reg = LP5024_BNK_BRT, |
| 237 | .bank_mix_reg = LP5024_BNKA_CLR, |
| 238 | .reset_reg = LP5024_RESET, |
| 239 | .lp50xx_regmap_config = &lp5024_regmap_config, |
| 240 | }, |
| 241 | [LP5030] = { |
| 242 | .model_id = LP5030, |
| 243 | .max_modules = LP5030_MAX_LED_MODULES, |
| 244 | .num_leds = LP5030_MAX_LED_MODULES * LP50XX_LEDS_PER_MODULE, |
| 245 | .led_brightness0_reg = LP5036_LED0_BRT, |
| 246 | .mix_out0_reg = LP5036_OUT0_CLR, |
| 247 | .bank_brt_reg = LP5036_BNK_BRT, |
| 248 | .bank_mix_reg = LP5036_BNKA_CLR, |
| 249 | .reset_reg = LP5036_RESET, |
| 250 | .lp50xx_regmap_config = &lp5036_regmap_config, |
| 251 | }, |
| 252 | [LP5036] = { |
| 253 | .model_id = LP5036, |
| 254 | .max_modules = LP5036_MAX_LED_MODULES, |
| 255 | .num_leds = LP5036_MAX_LED_MODULES * LP50XX_LEDS_PER_MODULE, |
| 256 | .led_brightness0_reg = LP5036_LED0_BRT, |
| 257 | .mix_out0_reg = LP5036_OUT0_CLR, |
| 258 | .bank_brt_reg = LP5036_BNK_BRT, |
| 259 | .bank_mix_reg = LP5036_BNKA_CLR, |
| 260 | .reset_reg = LP5036_RESET, |
| 261 | .lp50xx_regmap_config = &lp5036_regmap_config, |
| 262 | }, |
| 263 | }; |
| 264 | |
| 265 | struct lp50xx_led { |
| 266 | struct led_classdev_mc mc_cdev; |
| 267 | struct lp50xx *priv; |
| 268 | unsigned long bank_modules; |
| 269 | int led_intensity[LP50XX_LEDS_PER_MODULE]; |
| 270 | u8 ctrl_bank_enabled; |
| 271 | int led_number; |
| 272 | }; |
| 273 | |
| 274 | /** |
| 275 | * struct lp50xx - |
| 276 | * @enable_gpio: hardware enable gpio |
| 277 | * @regulator: LED supply regulator pointer |
| 278 | * @client: pointer to the I2C client |
| 279 | * @regmap: device register map |
| 280 | * @dev: pointer to the devices device struct |
| 281 | * @lock: lock for reading/writing the device |
| 282 | * @chip_info: chip specific information (ie num_leds) |
| 283 | * @num_of_banked_leds: holds the number of banked LEDs |
| 284 | * @leds: array of LED strings |
| 285 | */ |
| 286 | struct lp50xx { |
| 287 | struct gpio_desc *enable_gpio; |
| 288 | struct regulator *regulator; |
| 289 | struct i2c_client *client; |
| 290 | struct regmap *regmap; |
| 291 | struct device *dev; |
| 292 | struct mutex lock; |
| 293 | const struct lp50xx_chip_info *chip_info; |
| 294 | int num_of_banked_leds; |
| 295 | |
| 296 | /* This needs to be at the end of the struct */ |
| 297 | struct lp50xx_led leds[]; |
| 298 | }; |
| 299 | |
| 300 | static struct lp50xx_led *mcled_cdev_to_led(struct led_classdev_mc *mc_cdev) |
| 301 | { |
| 302 | return container_of(mc_cdev, struct lp50xx_led, mc_cdev); |
| 303 | } |
| 304 | |
| 305 | static int lp50xx_brightness_set(struct led_classdev *cdev, |
| 306 | enum led_brightness brightness) |
| 307 | { |
| 308 | struct led_classdev_mc *mc_dev = lcdev_to_mccdev(cdev); |
| 309 | struct lp50xx_led *led = mcled_cdev_to_led(mc_dev); |
| 310 | const struct lp50xx_chip_info *led_chip = led->priv->chip_info; |
| 311 | u8 led_offset, reg_val; |
| 312 | int ret = 0; |
| 313 | int i; |
| 314 | |
| 315 | mutex_lock(&led->priv->lock); |
| 316 | if (led->ctrl_bank_enabled) |
| 317 | reg_val = led_chip->bank_brt_reg; |
| 318 | else |
| 319 | reg_val = led_chip->led_brightness0_reg + |
| 320 | led->led_number; |
| 321 | |
| 322 | ret = regmap_write(led->priv->regmap, reg_val, brightness); |
| 323 | if (ret) { |
Andy Shevchenko | 556f15f | 2021-02-16 17:50:46 +0200 | [diff] [blame] | 324 | dev_err(led->priv->dev, |
Dan Murphy | 242b811 | 2020-08-12 14:50:16 -0500 | [diff] [blame] | 325 | "Cannot write brightness value %d\n", ret); |
| 326 | goto out; |
| 327 | } |
| 328 | |
| 329 | for (i = 0; i < led->mc_cdev.num_colors; i++) { |
| 330 | if (led->ctrl_bank_enabled) { |
| 331 | reg_val = led_chip->bank_mix_reg + i; |
| 332 | } else { |
| 333 | led_offset = (led->led_number * 3) + i; |
| 334 | reg_val = led_chip->mix_out0_reg + led_offset; |
| 335 | } |
| 336 | |
| 337 | ret = regmap_write(led->priv->regmap, reg_val, |
| 338 | mc_dev->subled_info[i].intensity); |
| 339 | if (ret) { |
Andy Shevchenko | 556f15f | 2021-02-16 17:50:46 +0200 | [diff] [blame] | 340 | dev_err(led->priv->dev, |
Dan Murphy | 242b811 | 2020-08-12 14:50:16 -0500 | [diff] [blame] | 341 | "Cannot write intensity value %d\n", ret); |
| 342 | goto out; |
| 343 | } |
| 344 | } |
| 345 | out: |
| 346 | mutex_unlock(&led->priv->lock); |
| 347 | return ret; |
| 348 | } |
| 349 | |
| 350 | static int lp50xx_set_banks(struct lp50xx *priv, u32 led_banks[]) |
| 351 | { |
| 352 | u8 led_config_lo, led_config_hi; |
| 353 | u32 bank_enable_mask = 0; |
| 354 | int ret; |
| 355 | int i; |
| 356 | |
| 357 | for (i = 0; i < priv->chip_info->max_modules; i++) { |
| 358 | if (led_banks[i]) |
| 359 | bank_enable_mask |= (1 << led_banks[i]); |
| 360 | } |
| 361 | |
Andy Shevchenko | b0a82ef | 2021-02-16 17:50:47 +0200 | [diff] [blame] | 362 | led_config_lo = bank_enable_mask; |
| 363 | led_config_hi = bank_enable_mask >> 8; |
Dan Murphy | 242b811 | 2020-08-12 14:50:16 -0500 | [diff] [blame] | 364 | |
| 365 | ret = regmap_write(priv->regmap, LP50XX_LED_CFG0, led_config_lo); |
| 366 | if (ret) |
| 367 | return ret; |
| 368 | |
| 369 | if (priv->chip_info->model_id >= LP5030) |
| 370 | ret = regmap_write(priv->regmap, LP5036_LED_CFG1, led_config_hi); |
| 371 | |
| 372 | return ret; |
| 373 | } |
| 374 | |
| 375 | static int lp50xx_reset(struct lp50xx *priv) |
| 376 | { |
| 377 | return regmap_write(priv->regmap, priv->chip_info->reset_reg, LP50XX_SW_RESET); |
| 378 | } |
| 379 | |
| 380 | static int lp50xx_enable_disable(struct lp50xx *priv, int enable_disable) |
| 381 | { |
| 382 | int ret; |
| 383 | |
Andy Shevchenko | 5d2bfb3 | 2021-02-16 17:50:48 +0200 | [diff] [blame] | 384 | ret = gpiod_direction_output(priv->enable_gpio, enable_disable); |
| 385 | if (ret) |
| 386 | return ret; |
Dan Murphy | 242b811 | 2020-08-12 14:50:16 -0500 | [diff] [blame] | 387 | |
| 388 | if (enable_disable) |
| 389 | return regmap_write(priv->regmap, LP50XX_DEV_CFG0, LP50XX_CHIP_EN); |
| 390 | else |
| 391 | return regmap_write(priv->regmap, LP50XX_DEV_CFG0, 0); |
| 392 | |
| 393 | } |
| 394 | |
| 395 | static int lp50xx_probe_leds(struct fwnode_handle *child, struct lp50xx *priv, |
| 396 | struct lp50xx_led *led, int num_leds) |
| 397 | { |
| 398 | u32 led_banks[LP5036_MAX_LED_MODULES] = {0}; |
| 399 | int led_number; |
| 400 | int ret; |
| 401 | |
| 402 | if (num_leds > 1) { |
| 403 | if (num_leds > priv->chip_info->max_modules) { |
Andy Shevchenko | 556f15f | 2021-02-16 17:50:46 +0200 | [diff] [blame] | 404 | dev_err(priv->dev, "reg property is invalid\n"); |
Dan Murphy | 242b811 | 2020-08-12 14:50:16 -0500 | [diff] [blame] | 405 | return -EINVAL; |
| 406 | } |
| 407 | |
| 408 | priv->num_of_banked_leds = num_leds; |
| 409 | |
| 410 | ret = fwnode_property_read_u32_array(child, "reg", led_banks, num_leds); |
| 411 | if (ret) { |
Andy Shevchenko | 556f15f | 2021-02-16 17:50:46 +0200 | [diff] [blame] | 412 | dev_err(priv->dev, "reg property is missing\n"); |
Dan Murphy | 242b811 | 2020-08-12 14:50:16 -0500 | [diff] [blame] | 413 | return ret; |
| 414 | } |
| 415 | |
| 416 | ret = lp50xx_set_banks(priv, led_banks); |
| 417 | if (ret) { |
Andy Shevchenko | 556f15f | 2021-02-16 17:50:46 +0200 | [diff] [blame] | 418 | dev_err(priv->dev, "Cannot setup banked LEDs\n"); |
Dan Murphy | 242b811 | 2020-08-12 14:50:16 -0500 | [diff] [blame] | 419 | return ret; |
| 420 | } |
| 421 | |
| 422 | led->ctrl_bank_enabled = 1; |
| 423 | } else { |
| 424 | ret = fwnode_property_read_u32(child, "reg", &led_number); |
| 425 | if (ret) { |
Andy Shevchenko | 556f15f | 2021-02-16 17:50:46 +0200 | [diff] [blame] | 426 | dev_err(priv->dev, "led reg property missing\n"); |
Dan Murphy | 242b811 | 2020-08-12 14:50:16 -0500 | [diff] [blame] | 427 | return ret; |
| 428 | } |
| 429 | |
| 430 | if (led_number > priv->chip_info->num_leds) { |
Andy Shevchenko | 556f15f | 2021-02-16 17:50:46 +0200 | [diff] [blame] | 431 | dev_err(priv->dev, "led-sources property is invalid\n"); |
Dan Murphy | 242b811 | 2020-08-12 14:50:16 -0500 | [diff] [blame] | 432 | return -EINVAL; |
| 433 | } |
| 434 | |
| 435 | led->led_number = led_number; |
| 436 | } |
| 437 | |
| 438 | return 0; |
| 439 | } |
| 440 | |
| 441 | static int lp50xx_probe_dt(struct lp50xx *priv) |
| 442 | { |
| 443 | struct fwnode_handle *child = NULL; |
| 444 | struct fwnode_handle *led_node = NULL; |
| 445 | struct led_init_data init_data = {}; |
| 446 | struct led_classdev *led_cdev; |
| 447 | struct mc_subled *mc_led_info; |
| 448 | struct lp50xx_led *led; |
| 449 | int ret = -EINVAL; |
| 450 | int num_colors; |
| 451 | u32 color_id; |
| 452 | int i = 0; |
| 453 | |
| 454 | priv->enable_gpio = devm_gpiod_get_optional(priv->dev, "enable", GPIOD_OUT_LOW); |
Andy Shevchenko | 9a10def | 2021-02-16 17:50:44 +0200 | [diff] [blame] | 455 | if (IS_ERR(priv->enable_gpio)) |
| 456 | return dev_err_probe(priv->dev, PTR_ERR(priv->enable_gpio), |
| 457 | "Failed to get enable GPIO\n"); |
Dan Murphy | 242b811 | 2020-08-12 14:50:16 -0500 | [diff] [blame] | 458 | |
| 459 | priv->regulator = devm_regulator_get(priv->dev, "vled"); |
| 460 | if (IS_ERR(priv->regulator)) |
| 461 | priv->regulator = NULL; |
| 462 | |
| 463 | device_for_each_child_node(priv->dev, child) { |
| 464 | led = &priv->leds[i]; |
| 465 | ret = fwnode_property_count_u32(child, "reg"); |
| 466 | if (ret < 0) { |
Andy Shevchenko | 556f15f | 2021-02-16 17:50:46 +0200 | [diff] [blame] | 467 | dev_err(priv->dev, "reg property is invalid\n"); |
Dan Murphy | 242b811 | 2020-08-12 14:50:16 -0500 | [diff] [blame] | 468 | goto child_out; |
| 469 | } |
| 470 | |
| 471 | ret = lp50xx_probe_leds(child, priv, led, ret); |
| 472 | if (ret) |
| 473 | goto child_out; |
| 474 | |
| 475 | init_data.fwnode = child; |
| 476 | num_colors = 0; |
| 477 | |
| 478 | /* |
| 479 | * There are only 3 LEDs per module otherwise they should be |
| 480 | * banked which also is presented as 3 LEDs. |
| 481 | */ |
| 482 | mc_led_info = devm_kcalloc(priv->dev, LP50XX_LEDS_PER_MODULE, |
| 483 | sizeof(*mc_led_info), GFP_KERNEL); |
Christophe JAILLET | 6d8d014 | 2020-09-22 23:05:15 +0200 | [diff] [blame] | 484 | if (!mc_led_info) { |
| 485 | ret = -ENOMEM; |
| 486 | goto child_out; |
| 487 | } |
Dan Murphy | 242b811 | 2020-08-12 14:50:16 -0500 | [diff] [blame] | 488 | |
| 489 | fwnode_for_each_child_node(child, led_node) { |
| 490 | ret = fwnode_property_read_u32(led_node, "color", |
| 491 | &color_id); |
| 492 | if (ret) { |
Andy Shevchenko | f1e1d53 | 2021-05-10 12:50:40 +0300 | [diff] [blame] | 493 | fwnode_handle_put(led_node); |
Dan Murphy | 242b811 | 2020-08-12 14:50:16 -0500 | [diff] [blame] | 494 | dev_err(priv->dev, "Cannot read color\n"); |
| 495 | goto child_out; |
| 496 | } |
| 497 | |
| 498 | mc_led_info[num_colors].color_index = color_id; |
| 499 | num_colors++; |
| 500 | } |
| 501 | |
| 502 | led->priv = priv; |
| 503 | led->mc_cdev.num_colors = num_colors; |
| 504 | led->mc_cdev.subled_info = mc_led_info; |
| 505 | led_cdev = &led->mc_cdev.led_cdev; |
| 506 | led_cdev->brightness_set_blocking = lp50xx_brightness_set; |
| 507 | |
Andy Shevchenko | 556f15f | 2021-02-16 17:50:46 +0200 | [diff] [blame] | 508 | ret = devm_led_classdev_multicolor_register_ext(priv->dev, |
Dan Murphy | 242b811 | 2020-08-12 14:50:16 -0500 | [diff] [blame] | 509 | &led->mc_cdev, |
| 510 | &init_data); |
| 511 | if (ret) { |
Andy Shevchenko | 556f15f | 2021-02-16 17:50:46 +0200 | [diff] [blame] | 512 | dev_err(priv->dev, "led register err: %d\n", ret); |
Dan Murphy | 242b811 | 2020-08-12 14:50:16 -0500 | [diff] [blame] | 513 | goto child_out; |
| 514 | } |
| 515 | i++; |
Dan Murphy | 242b811 | 2020-08-12 14:50:16 -0500 | [diff] [blame] | 516 | } |
| 517 | |
| 518 | return 0; |
| 519 | |
| 520 | child_out: |
| 521 | fwnode_handle_put(child); |
| 522 | return ret; |
| 523 | } |
| 524 | |
Andy Shevchenko | ea1ff99 | 2021-02-16 17:50:45 +0200 | [diff] [blame] | 525 | static int lp50xx_probe(struct i2c_client *client) |
Dan Murphy | 242b811 | 2020-08-12 14:50:16 -0500 | [diff] [blame] | 526 | { |
| 527 | struct lp50xx *led; |
| 528 | int count; |
| 529 | int ret; |
| 530 | |
| 531 | count = device_get_child_node_count(&client->dev); |
| 532 | if (!count) { |
| 533 | dev_err(&client->dev, "LEDs are not defined in device tree!"); |
| 534 | return -ENODEV; |
| 535 | } |
| 536 | |
| 537 | led = devm_kzalloc(&client->dev, struct_size(led, leds, count), |
| 538 | GFP_KERNEL); |
| 539 | if (!led) |
| 540 | return -ENOMEM; |
| 541 | |
| 542 | mutex_init(&led->lock); |
| 543 | led->client = client; |
| 544 | led->dev = &client->dev; |
Andy Shevchenko | ea1ff99 | 2021-02-16 17:50:45 +0200 | [diff] [blame] | 545 | led->chip_info = device_get_match_data(&client->dev); |
Dan Murphy | 242b811 | 2020-08-12 14:50:16 -0500 | [diff] [blame] | 546 | i2c_set_clientdata(client, led); |
| 547 | led->regmap = devm_regmap_init_i2c(client, |
| 548 | led->chip_info->lp50xx_regmap_config); |
| 549 | if (IS_ERR(led->regmap)) { |
| 550 | ret = PTR_ERR(led->regmap); |
| 551 | dev_err(&client->dev, "Failed to allocate register map: %d\n", |
| 552 | ret); |
| 553 | return ret; |
| 554 | } |
| 555 | |
| 556 | ret = lp50xx_reset(led); |
| 557 | if (ret) |
| 558 | return ret; |
| 559 | |
| 560 | ret = lp50xx_enable_disable(led, 1); |
| 561 | if (ret) |
| 562 | return ret; |
| 563 | |
| 564 | return lp50xx_probe_dt(led); |
| 565 | } |
| 566 | |
| 567 | static int lp50xx_remove(struct i2c_client *client) |
| 568 | { |
| 569 | struct lp50xx *led = i2c_get_clientdata(client); |
| 570 | int ret; |
| 571 | |
| 572 | ret = lp50xx_enable_disable(led, 0); |
| 573 | if (ret) { |
Andy Shevchenko | 556f15f | 2021-02-16 17:50:46 +0200 | [diff] [blame] | 574 | dev_err(led->dev, "Failed to disable chip\n"); |
Dan Murphy | 242b811 | 2020-08-12 14:50:16 -0500 | [diff] [blame] | 575 | return ret; |
| 576 | } |
| 577 | |
| 578 | if (led->regulator) { |
| 579 | ret = regulator_disable(led->regulator); |
| 580 | if (ret) |
Andy Shevchenko | 556f15f | 2021-02-16 17:50:46 +0200 | [diff] [blame] | 581 | dev_err(led->dev, "Failed to disable regulator\n"); |
Dan Murphy | 242b811 | 2020-08-12 14:50:16 -0500 | [diff] [blame] | 582 | } |
| 583 | |
| 584 | mutex_destroy(&led->lock); |
| 585 | |
| 586 | return 0; |
| 587 | } |
| 588 | |
| 589 | static const struct i2c_device_id lp50xx_id[] = { |
Andy Shevchenko | ea1ff99 | 2021-02-16 17:50:45 +0200 | [diff] [blame] | 590 | { "lp5009", (kernel_ulong_t)&lp50xx_chip_info_tbl[LP5009] }, |
| 591 | { "lp5012", (kernel_ulong_t)&lp50xx_chip_info_tbl[LP5012] }, |
| 592 | { "lp5018", (kernel_ulong_t)&lp50xx_chip_info_tbl[LP5018] }, |
| 593 | { "lp5024", (kernel_ulong_t)&lp50xx_chip_info_tbl[LP5024] }, |
| 594 | { "lp5030", (kernel_ulong_t)&lp50xx_chip_info_tbl[LP5030] }, |
| 595 | { "lp5036", (kernel_ulong_t)&lp50xx_chip_info_tbl[LP5036] }, |
Dan Murphy | 242b811 | 2020-08-12 14:50:16 -0500 | [diff] [blame] | 596 | { } |
| 597 | }; |
| 598 | MODULE_DEVICE_TABLE(i2c, lp50xx_id); |
| 599 | |
| 600 | static const struct of_device_id of_lp50xx_leds_match[] = { |
Andy Shevchenko | ea1ff99 | 2021-02-16 17:50:45 +0200 | [diff] [blame] | 601 | { .compatible = "ti,lp5009", .data = &lp50xx_chip_info_tbl[LP5009] }, |
| 602 | { .compatible = "ti,lp5012", .data = &lp50xx_chip_info_tbl[LP5012] }, |
| 603 | { .compatible = "ti,lp5018", .data = &lp50xx_chip_info_tbl[LP5018] }, |
| 604 | { .compatible = "ti,lp5024", .data = &lp50xx_chip_info_tbl[LP5024] }, |
| 605 | { .compatible = "ti,lp5030", .data = &lp50xx_chip_info_tbl[LP5030] }, |
| 606 | { .compatible = "ti,lp5036", .data = &lp50xx_chip_info_tbl[LP5036] }, |
| 607 | {} |
Dan Murphy | 242b811 | 2020-08-12 14:50:16 -0500 | [diff] [blame] | 608 | }; |
| 609 | MODULE_DEVICE_TABLE(of, of_lp50xx_leds_match); |
| 610 | |
| 611 | static struct i2c_driver lp50xx_driver = { |
| 612 | .driver = { |
| 613 | .name = "lp50xx", |
| 614 | .of_match_table = of_lp50xx_leds_match, |
| 615 | }, |
Andy Shevchenko | ea1ff99 | 2021-02-16 17:50:45 +0200 | [diff] [blame] | 616 | .probe_new = lp50xx_probe, |
Dan Murphy | 242b811 | 2020-08-12 14:50:16 -0500 | [diff] [blame] | 617 | .remove = lp50xx_remove, |
| 618 | .id_table = lp50xx_id, |
| 619 | }; |
| 620 | module_i2c_driver(lp50xx_driver); |
| 621 | |
| 622 | MODULE_DESCRIPTION("Texas Instruments LP50XX LED driver"); |
| 623 | MODULE_AUTHOR("Dan Murphy <dmurphy@ti.com>"); |
| 624 | MODULE_LICENSE("GPL v2"); |