Thomas Gleixner | d94d71c | 2019-05-29 07:12:40 -0700 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
Hollis Blanchard | bbf45ba | 2008-04-16 23:28:09 -0500 | [diff] [blame] | 2 | /* |
Hollis Blanchard | bbf45ba | 2008-04-16 23:28:09 -0500 | [diff] [blame] | 3 | * |
| 4 | * Copyright IBM Corp. 2008 |
| 5 | * |
| 6 | * Authors: Hollis Blanchard <hollisb@us.ibm.com> |
| 7 | */ |
| 8 | |
| 9 | #ifndef __POWERPC_KVM_ASM_H__ |
| 10 | #define __POWERPC_KVM_ASM_H__ |
| 11 | |
Alexander Graf | 3d4c682 | 2012-04-25 13:48:54 +0200 | [diff] [blame] | 12 | #ifdef __ASSEMBLY__ |
Varun Sethi | 185e418 | 2012-04-25 01:26:43 +0000 | [diff] [blame] | 13 | #ifdef CONFIG_64BIT |
| 14 | #define PPC_STD(sreg, offset, areg) std sreg, (offset)(areg) |
| 15 | #define PPC_LD(treg, offset, areg) ld treg, (offset)(areg) |
| 16 | #else |
| 17 | #define PPC_STD(sreg, offset, areg) stw sreg, (offset+4)(areg) |
| 18 | #define PPC_LD(treg, offset, areg) lwz treg, (offset+4)(areg) |
| 19 | #endif |
Alexander Graf | 3d4c682 | 2012-04-25 13:48:54 +0200 | [diff] [blame] | 20 | #endif |
Varun Sethi | 185e418 | 2012-04-25 01:26:43 +0000 | [diff] [blame] | 21 | |
Hollis Blanchard | bbf45ba | 2008-04-16 23:28:09 -0500 | [diff] [blame] | 22 | /* IVPR must be 64KiB-aligned. */ |
| 23 | #define VCPU_SIZE_ORDER 4 |
| 24 | #define VCPU_SIZE_LOG (VCPU_SIZE_ORDER + 12) |
Hollis Blanchard | bbf45ba | 2008-04-16 23:28:09 -0500 | [diff] [blame] | 25 | #define VCPU_SIZE_BYTES (1<<VCPU_SIZE_LOG) |
| 26 | |
| 27 | #define BOOKE_INTERRUPT_CRITICAL 0 |
| 28 | #define BOOKE_INTERRUPT_MACHINE_CHECK 1 |
| 29 | #define BOOKE_INTERRUPT_DATA_STORAGE 2 |
| 30 | #define BOOKE_INTERRUPT_INST_STORAGE 3 |
| 31 | #define BOOKE_INTERRUPT_EXTERNAL 4 |
| 32 | #define BOOKE_INTERRUPT_ALIGNMENT 5 |
| 33 | #define BOOKE_INTERRUPT_PROGRAM 6 |
| 34 | #define BOOKE_INTERRUPT_FP_UNAVAIL 7 |
| 35 | #define BOOKE_INTERRUPT_SYSCALL 8 |
| 36 | #define BOOKE_INTERRUPT_AP_UNAVAIL 9 |
| 37 | #define BOOKE_INTERRUPT_DECREMENTER 10 |
| 38 | #define BOOKE_INTERRUPT_FIT 11 |
| 39 | #define BOOKE_INTERRUPT_WATCHDOG 12 |
| 40 | #define BOOKE_INTERRUPT_DTLB_MISS 13 |
| 41 | #define BOOKE_INTERRUPT_ITLB_MISS 14 |
| 42 | #define BOOKE_INTERRUPT_DEBUG 15 |
Hollis Blanchard | bb3a8a1 | 2009-01-03 16:23:13 -0600 | [diff] [blame] | 43 | |
| 44 | /* E500 */ |
Mihai Caraman | e9a9483 | 2014-09-01 13:17:43 +0300 | [diff] [blame] | 45 | #ifdef CONFIG_SPE_POSSIBLE |
| 46 | #define BOOKE_INTERRUPT_SPE_UNAVAIL 32 |
| 47 | #define BOOKE_INTERRUPT_SPE_FP_DATA 33 |
Hollis Blanchard | bb3a8a1 | 2009-01-03 16:23:13 -0600 | [diff] [blame] | 48 | #define BOOKE_INTERRUPT_SPE_FP_ROUND 34 |
Mihai Caraman | e9a9483 | 2014-09-01 13:17:43 +0300 | [diff] [blame] | 49 | #endif |
| 50 | |
| 51 | #ifdef CONFIG_PPC_E500MC |
| 52 | #define BOOKE_INTERRUPT_ALTIVEC_UNAVAIL 32 |
| 53 | #define BOOKE_INTERRUPT_ALTIVEC_ASSIST 33 |
| 54 | #endif |
| 55 | |
Hollis Blanchard | bb3a8a1 | 2009-01-03 16:23:13 -0600 | [diff] [blame] | 56 | #define BOOKE_INTERRUPT_PERFORMANCE_MONITOR 35 |
Scott Wood | d30f6e4 | 2011-12-20 15:34:43 +0000 | [diff] [blame] | 57 | #define BOOKE_INTERRUPT_DOORBELL 36 |
| 58 | #define BOOKE_INTERRUPT_DOORBELL_CRITICAL 37 |
| 59 | |
| 60 | /* booke_hv */ |
| 61 | #define BOOKE_INTERRUPT_GUEST_DBELL 38 |
| 62 | #define BOOKE_INTERRUPT_GUEST_DBELL_CRIT 39 |
| 63 | #define BOOKE_INTERRUPT_HV_SYSCALL 40 |
| 64 | #define BOOKE_INTERRUPT_HV_PRIV 41 |
Mihai Caraman | 228b1a4 | 2013-08-08 15:56:09 +0300 | [diff] [blame] | 65 | #define BOOKE_INTERRUPT_LRAT_ERROR 42 |
Hollis Blanchard | bbf45ba | 2008-04-16 23:28:09 -0500 | [diff] [blame] | 66 | |
Alexander Graf | 83cd259 | 2009-10-30 05:47:03 +0000 | [diff] [blame] | 67 | /* book3s */ |
| 68 | |
| 69 | #define BOOK3S_INTERRUPT_SYSTEM_RESET 0x100 |
| 70 | #define BOOK3S_INTERRUPT_MACHINE_CHECK 0x200 |
| 71 | #define BOOK3S_INTERRUPT_DATA_STORAGE 0x300 |
| 72 | #define BOOK3S_INTERRUPT_DATA_SEGMENT 0x380 |
| 73 | #define BOOK3S_INTERRUPT_INST_STORAGE 0x400 |
| 74 | #define BOOK3S_INTERRUPT_INST_SEGMENT 0x480 |
| 75 | #define BOOK3S_INTERRUPT_EXTERNAL 0x500 |
Benjamin Herrenschmidt | a5d4f3a | 2011-04-05 14:20:31 +1000 | [diff] [blame] | 76 | #define BOOK3S_INTERRUPT_EXTERNAL_HV 0x502 |
Alexander Graf | 83cd259 | 2009-10-30 05:47:03 +0000 | [diff] [blame] | 77 | #define BOOK3S_INTERRUPT_ALIGNMENT 0x600 |
| 78 | #define BOOK3S_INTERRUPT_PROGRAM 0x700 |
| 79 | #define BOOK3S_INTERRUPT_FP_UNAVAIL 0x800 |
| 80 | #define BOOK3S_INTERRUPT_DECREMENTER 0x900 |
Paul Mackerras | de56a94 | 2011-06-29 00:21:34 +0000 | [diff] [blame] | 81 | #define BOOK3S_INTERRUPT_HV_DECREMENTER 0x980 |
Paul Mackerras | 4068890 | 2014-01-08 21:25:36 +1100 | [diff] [blame] | 82 | #define BOOK3S_INTERRUPT_DOORBELL 0xa00 |
Alexander Graf | 83cd259 | 2009-10-30 05:47:03 +0000 | [diff] [blame] | 83 | #define BOOK3S_INTERRUPT_SYSCALL 0xc00 |
| 84 | #define BOOK3S_INTERRUPT_TRACE 0xd00 |
Paul Mackerras | de56a94 | 2011-06-29 00:21:34 +0000 | [diff] [blame] | 85 | #define BOOK3S_INTERRUPT_H_DATA_STORAGE 0xe00 |
| 86 | #define BOOK3S_INTERRUPT_H_INST_STORAGE 0xe20 |
| 87 | #define BOOK3S_INTERRUPT_H_EMUL_ASSIST 0xe40 |
Mahesh Salgaonkar | 0869b6f | 2014-07-29 18:40:01 +0530 | [diff] [blame] | 88 | #define BOOK3S_INTERRUPT_HMI 0xe60 |
Paul Mackerras | 5d00f66 | 2014-01-08 21:25:28 +1100 | [diff] [blame] | 89 | #define BOOK3S_INTERRUPT_H_DOORBELL 0xe80 |
Paul Mackerras | 84f7139 | 2016-11-22 14:30:14 +1100 | [diff] [blame] | 90 | #define BOOK3S_INTERRUPT_H_VIRT 0xea0 |
Alexander Graf | 83cd259 | 2009-10-30 05:47:03 +0000 | [diff] [blame] | 91 | #define BOOK3S_INTERRUPT_PERFMON 0xf00 |
| 92 | #define BOOK3S_INTERRUPT_ALTIVEC 0xf20 |
| 93 | #define BOOK3S_INTERRUPT_VSX 0xf40 |
Alexander Graf | 616dff8 | 2014-04-29 16:48:44 +0200 | [diff] [blame] | 94 | #define BOOK3S_INTERRUPT_FAC_UNAVAIL 0xf60 |
Michael Ellerman | bd3048b | 2014-01-08 21:25:23 +1100 | [diff] [blame] | 95 | #define BOOK3S_INTERRUPT_H_FAC_UNAVAIL 0xf80 |
Alexander Graf | 83cd259 | 2009-10-30 05:47:03 +0000 | [diff] [blame] | 96 | |
Suresh Warrier | f7af520 | 2016-08-19 15:35:52 +1000 | [diff] [blame] | 97 | /* book3s_hv */ |
| 98 | |
Paul Mackerras | 4bb3c7a | 2018-03-21 21:32:01 +1100 | [diff] [blame] | 99 | #define BOOK3S_INTERRUPT_HV_SOFTPATCH 0x1500 |
| 100 | |
Suresh Warrier | f7af520 | 2016-08-19 15:35:52 +1000 | [diff] [blame] | 101 | /* |
| 102 | * Special trap used to indicate to host that this is a |
| 103 | * passthrough interrupt that could not be handled |
| 104 | * completely in the guest. |
| 105 | */ |
| 106 | #define BOOK3S_INTERRUPT_HV_RM_HARD 0x5555 |
| 107 | |
Alexander Graf | 83cd259 | 2009-10-30 05:47:03 +0000 | [diff] [blame] | 108 | #define BOOK3S_IRQPRIO_SYSTEM_RESET 0 |
| 109 | #define BOOK3S_IRQPRIO_DATA_SEGMENT 1 |
| 110 | #define BOOK3S_IRQPRIO_INST_SEGMENT 2 |
| 111 | #define BOOK3S_IRQPRIO_DATA_STORAGE 3 |
| 112 | #define BOOK3S_IRQPRIO_INST_STORAGE 4 |
| 113 | #define BOOK3S_IRQPRIO_ALIGNMENT 5 |
| 114 | #define BOOK3S_IRQPRIO_PROGRAM 6 |
| 115 | #define BOOK3S_IRQPRIO_FP_UNAVAIL 7 |
| 116 | #define BOOK3S_IRQPRIO_ALTIVEC 8 |
| 117 | #define BOOK3S_IRQPRIO_VSX 9 |
Alexander Graf | 616dff8 | 2014-04-29 16:48:44 +0200 | [diff] [blame] | 118 | #define BOOK3S_IRQPRIO_FAC_UNAVAIL 10 |
| 119 | #define BOOK3S_IRQPRIO_SYSCALL 11 |
| 120 | #define BOOK3S_IRQPRIO_MACHINE_CHECK 12 |
| 121 | #define BOOK3S_IRQPRIO_DEBUG 13 |
| 122 | #define BOOK3S_IRQPRIO_EXTERNAL 14 |
| 123 | #define BOOK3S_IRQPRIO_DECREMENTER 15 |
| 124 | #define BOOK3S_IRQPRIO_PERFORMANCE_MONITOR 16 |
Paul Mackerras | d24ea8a | 2018-10-08 16:30:48 +1100 | [diff] [blame] | 125 | #define BOOK3S_IRQPRIO_MAX 17 |
Alexander Graf | 83cd259 | 2009-10-30 05:47:03 +0000 | [diff] [blame] | 126 | |
| 127 | #define BOOK3S_HFLAG_DCBZ32 0x1 |
Alexander Graf | e15a113 | 2009-11-30 03:02:02 +0000 | [diff] [blame] | 128 | #define BOOK3S_HFLAG_SLB 0x2 |
Alexander Graf | 3c402a7 | 2010-02-19 11:00:32 +0100 | [diff] [blame] | 129 | #define BOOK3S_HFLAG_PAIRED_SINGLE 0x4 |
Alexander Graf | b83d4a9 | 2010-04-20 02:49:54 +0200 | [diff] [blame] | 130 | #define BOOK3S_HFLAG_NATIVE_PS 0x8 |
Paul Mackerras | a4a0f25 | 2013-09-20 14:52:44 +1000 | [diff] [blame] | 131 | #define BOOK3S_HFLAG_MULTI_PGSIZE 0x10 |
| 132 | #define BOOK3S_HFLAG_NEW_TLBIE 0x20 |
Alexander Graf | c01e3f6 | 2014-07-11 02:58:58 +0200 | [diff] [blame] | 133 | #define BOOK3S_HFLAG_SPLIT_HACK 0x40 |
Alexander Graf | 83cd259 | 2009-10-30 05:47:03 +0000 | [diff] [blame] | 134 | |
Hollis Blanchard | bbf45ba | 2008-04-16 23:28:09 -0500 | [diff] [blame] | 135 | #define RESUME_FLAG_NV (1<<0) /* Reload guest nonvolatile state? */ |
| 136 | #define RESUME_FLAG_HOST (1<<1) /* Resume host? */ |
Paul Mackerras | 913d3ff9a | 2012-10-15 01:16:48 +0000 | [diff] [blame] | 137 | #define RESUME_FLAG_ARCH1 (1<<2) |
Suresh Warrier | f7af520 | 2016-08-19 15:35:52 +1000 | [diff] [blame] | 138 | #define RESUME_FLAG_ARCH2 (1<<3) |
Hollis Blanchard | bbf45ba | 2008-04-16 23:28:09 -0500 | [diff] [blame] | 139 | |
| 140 | #define RESUME_GUEST 0 |
| 141 | #define RESUME_GUEST_NV RESUME_FLAG_NV |
| 142 | #define RESUME_HOST RESUME_FLAG_HOST |
| 143 | #define RESUME_HOST_NV (RESUME_FLAG_HOST|RESUME_FLAG_NV) |
| 144 | |
Alexander Graf | b4433a7 | 2010-01-08 02:58:04 +0100 | [diff] [blame] | 145 | #define KVM_GUEST_MODE_NONE 0 |
| 146 | #define KVM_GUEST_MODE_GUEST 1 |
| 147 | #define KVM_GUEST_MODE_SKIP 2 |
Paul Mackerras | 44a3add | 2013-10-04 21:45:04 +1000 | [diff] [blame] | 148 | #define KVM_GUEST_MODE_GUEST_HV 3 |
| 149 | #define KVM_GUEST_MODE_HOST_HV 4 |
Nicholas Piggin | 0bf7e1b | 2021-05-28 19:07:51 +1000 | [diff] [blame] | 150 | #define KVM_GUEST_MODE_HV_P9 5 /* ISA >= v3.0 path */ |
Alexander Graf | b4433a7 | 2010-01-08 02:58:04 +0100 | [diff] [blame] | 151 | |
| 152 | #define KVM_INST_FETCH_FAILED -1 |
| 153 | |
Gustavo Romero | 1dff306 | 2020-02-21 11:29:50 -0500 | [diff] [blame] | 154 | /* Extract PO and XOP opcode fields */ |
| 155 | #define PO_XOP_OPCODE_MASK 0xfc0007fe |
| 156 | |
Hollis Blanchard | bbf45ba | 2008-04-16 23:28:09 -0500 | [diff] [blame] | 157 | #endif /* __POWERPC_KVM_ASM_H__ */ |