Ralf Baechle | 0549062 | 2016-04-15 10:25:33 +0200 | [diff] [blame] | 1 | /* |
| 2 | * This file is subject to the terms and conditions of the GNU General Public |
| 3 | * License. See the file "COPYING" in the main directory of this archive |
| 4 | * for more details. |
| 5 | * |
| 6 | * Macros for 32/64-bit neutral inline assembler |
| 7 | */ |
| 8 | |
| 9 | #ifndef __ASM_LLSC_H |
| 10 | #define __ASM_LLSC_H |
| 11 | |
Paul Burton | ef85d05 | 2019-10-01 21:53:06 +0000 | [diff] [blame] | 12 | #include <asm/isa-rev.h> |
| 13 | |
Ralf Baechle | 0549062 | 2016-04-15 10:25:33 +0200 | [diff] [blame] | 14 | #if _MIPS_SZLONG == 32 |
Ralf Baechle | 0549062 | 2016-04-15 10:25:33 +0200 | [diff] [blame] | 15 | #define __LL "ll " |
| 16 | #define __SC "sc " |
| 17 | #define __INS "ins " |
| 18 | #define __EXT "ext " |
| 19 | #elif _MIPS_SZLONG == 64 |
Ralf Baechle | 0549062 | 2016-04-15 10:25:33 +0200 | [diff] [blame] | 20 | #define __LL "lld " |
| 21 | #define __SC "scd " |
| 22 | #define __INS "dins " |
| 23 | #define __EXT "dext " |
| 24 | #endif |
| 25 | |
Paul Burton | 878f75c | 2019-10-01 21:53:05 +0000 | [diff] [blame] | 26 | /* |
| 27 | * Using a branch-likely instruction to check the result of an sc instruction |
| 28 | * works around a bug present in R10000 CPUs prior to revision 3.0 that could |
| 29 | * cause ll-sc sequences to execute non-atomically. |
| 30 | */ |
Thomas Bogendoerfer | 256ec48 | 2020-08-24 18:32:49 +0200 | [diff] [blame] | 31 | #ifdef CONFIG_WAR_R10000_LLSC |
Paul Burton | 878f75c | 2019-10-01 21:53:05 +0000 | [diff] [blame] | 32 | # define __SC_BEQZ "beqzl " |
Paul Burton | ef85d05 | 2019-10-01 21:53:06 +0000 | [diff] [blame] | 33 | #elif MIPS_ISA_REV >= 6 |
| 34 | # define __SC_BEQZ "beqzc " |
Paul Burton | 878f75c | 2019-10-01 21:53:05 +0000 | [diff] [blame] | 35 | #else |
| 36 | # define __SC_BEQZ "beqz " |
| 37 | #endif |
| 38 | |
Ralf Baechle | 0549062 | 2016-04-15 10:25:33 +0200 | [diff] [blame] | 39 | #endif /* __ASM_LLSC_H */ |