Mauro Carvalho Chehab | cc2a2d1 | 2019-06-12 14:53:01 -0300 | [diff] [blame] | 1 | ========================= |
| 2 | Mellanox watchdog drivers |
| 3 | ========================= |
| 4 | |
| 5 | for x86 based system switches |
| 6 | ============================= |
Michael Shych | 9d489ad | 2019-02-24 17:26:31 +0000 | [diff] [blame] | 7 | |
| 8 | This driver provides watchdog functionality for various Mellanox |
| 9 | Ethernet and Infiniband switch systems. |
| 10 | |
| 11 | Mellanox watchdog device is implemented in a programmable logic device. |
| 12 | |
| 13 | There are 2 types of HW watchdog implementations. |
| 14 | |
| 15 | Type 1: |
Mauro Carvalho Chehab | cc2a2d1 | 2019-06-12 14:53:01 -0300 | [diff] [blame] | 16 | Actual HW timeout can be defined as a power of 2 msec. |
| 17 | e.g. timeout 20 sec will be rounded up to 32768 msec. |
| 18 | The maximum timeout period is 32 sec (32768 msec.), |
| 19 | Get time-left isn't supported |
Michael Shych | 9d489ad | 2019-02-24 17:26:31 +0000 | [diff] [blame] | 20 | |
| 21 | Type 2: |
Mauro Carvalho Chehab | cc2a2d1 | 2019-06-12 14:53:01 -0300 | [diff] [blame] | 22 | Actual HW timeout is defined in sec. and it's the same as |
| 23 | a user-defined timeout. |
| 24 | Maximum timeout is 255 sec. |
| 25 | Get time-left is supported. |
Michael Shych | 9d489ad | 2019-02-24 17:26:31 +0000 | [diff] [blame] | 26 | |
Michael Shych | d6e6d56 | 2020-05-04 17:14:27 +0300 | [diff] [blame] | 27 | Type 3: |
| 28 | Same as Type 2 with extended maximum timeout period. |
| 29 | Maximum timeout is 65535 sec. |
| 30 | |
Michael Shych | 9d489ad | 2019-02-24 17:26:31 +0000 | [diff] [blame] | 31 | Type 1 HW watchdog implementation exist in old systems and |
| 32 | all new systems have type 2 HW watchdog. |
| 33 | Two types of HW implementation have also different register map. |
| 34 | |
Michael Shych | d6e6d56 | 2020-05-04 17:14:27 +0300 | [diff] [blame] | 35 | Type 3 HW watchdog implementation can exist on all Mellanox systems |
| 36 | with new programmer logic device. |
| 37 | It's differentiated by WD capability bit. |
| 38 | Old systems still have only one main watchdog. |
| 39 | |
Michael Shych | 9d489ad | 2019-02-24 17:26:31 +0000 | [diff] [blame] | 40 | Mellanox system can have 2 watchdogs: main and auxiliary. |
| 41 | Main and auxiliary watchdog devices can be enabled together |
| 42 | on the same system. |
| 43 | There are several actions that can be defined in the watchdog: |
| 44 | system reset, start fans on full speed and increase register counter. |
| 45 | The last 2 actions are performed without a system reset. |
| 46 | Actions without reset are provided for auxiliary watchdog device, |
| 47 | which is optional. |
| 48 | Watchdog can be started during a probe, in this case it will be |
| 49 | pinged by watchdog core before watchdog device will be opened by |
| 50 | user space application. |
| 51 | Watchdog can be initialised in nowayout way, i.e. oncse started |
| 52 | it can't be stopped. |
| 53 | |
| 54 | This mlx-wdt driver supports both HW watchdog implementations. |
| 55 | |
| 56 | Watchdog driver is probed from the common mlx_platform driver. |
| 57 | Mlx_platform driver provides an appropriate set of registers for |
| 58 | Mellanox watchdog device, identity name (mlx-wdt-main or mlx-wdt-aux), |
| 59 | initial timeout, performed action in expiration and configuration flags. |
| 60 | watchdog configuration flags: nowayout and start_at_boot, hw watchdog |
| 61 | version - type1 or type2. |
| 62 | The driver checks during initialization if the previous system reset |
| 63 | was done by the watchdog. If yes, it makes a notification about this event. |
| 64 | |
| 65 | Access to HW registers is performed through a generic regmap interface. |
Michael Shych | d6e6d56 | 2020-05-04 17:14:27 +0300 | [diff] [blame] | 66 | Programmable logic device registers have little-endian order. |