Maxime Ripard | c61f025 | 2019-06-27 16:10:37 +0100 | [diff] [blame] | 1 | # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) |
| 2 | %YAML 1.2 |
| 3 | --- |
| 4 | $id: http://devicetree.org/schemas/nvmem/nvmem.yaml# |
| 5 | $schema: http://devicetree.org/meta-schemas/core.yaml# |
| 6 | |
| 7 | title: NVMEM (Non Volatile Memory) Device Tree Bindings |
| 8 | |
| 9 | maintainers: |
| 10 | - Srinivas Kandagatla <srinivas.kandagatla@linaro.org> |
| 11 | |
| 12 | description: | |
| 13 | This binding is intended to represent the location of hardware |
| 14 | configuration data stored in NVMEMs like eeprom, efuses and so on. |
| 15 | |
| 16 | On a significant proportion of boards, the manufacturer has stored |
| 17 | some data on NVMEM, for the OS to be able to retrieve these |
| 18 | information and act upon it. Obviously, the OS has to know about |
| 19 | where to retrieve these data from, and where they are stored on the |
| 20 | storage device. |
| 21 | |
| 22 | properties: |
Maxime Ripard | c61f025 | 2019-06-27 16:10:37 +0100 | [diff] [blame] | 23 | "#address-cells": |
| 24 | const: 1 |
| 25 | |
| 26 | "#size-cells": |
| 27 | const: 1 |
| 28 | |
| 29 | read-only: |
| 30 | $ref: /schemas/types.yaml#/definitions/flag |
| 31 | description: |
| 32 | Mark the provider as read only. |
| 33 | |
Khouloud Touil | 14f4957 | 2020-01-07 10:29:18 +0100 | [diff] [blame] | 34 | wp-gpios: |
| 35 | description: |
| 36 | GPIO to which the write-protect pin of the chip is connected. |
| 37 | The write-protect GPIO is asserted, when it's driven high |
| 38 | (logical '1') to block the write operation. It's deasserted, |
| 39 | when it's driven low (logical '0') to allow writing. |
| 40 | maxItems: 1 |
| 41 | |
Maxime Ripard | c61f025 | 2019-06-27 16:10:37 +0100 | [diff] [blame] | 42 | patternProperties: |
Kunihiko Hayashi | 4b2545d | 2021-07-19 11:31:03 +0900 | [diff] [blame] | 43 | "@[0-9a-f]+(,[0-7])?$": |
Maxime Ripard | c61f025 | 2019-06-27 16:10:37 +0100 | [diff] [blame] | 44 | type: object |
| 45 | |
| 46 | properties: |
| 47 | reg: |
| 48 | maxItems: 1 |
| 49 | description: |
| 50 | Offset and size in bytes within the storage device. |
| 51 | |
| 52 | bits: |
| 53 | maxItems: 1 |
| 54 | items: |
| 55 | items: |
| 56 | - minimum: 0 |
| 57 | maximum: 7 |
| 58 | description: |
| 59 | Offset in bit within the address range specified by reg. |
| 60 | - minimum: 1 |
| 61 | description: |
| 62 | Size in bit within the address range specified by reg. |
| 63 | |
| 64 | required: |
| 65 | - reg |
| 66 | |
Rob Herring | 6a0e321 | 2020-10-05 13:38:30 -0500 | [diff] [blame] | 67 | additionalProperties: true |
| 68 | |
Maxime Ripard | c61f025 | 2019-06-27 16:10:37 +0100 | [diff] [blame] | 69 | examples: |
| 70 | - | |
Khouloud Touil | 14f4957 | 2020-01-07 10:29:18 +0100 | [diff] [blame] | 71 | #include <dt-bindings/gpio/gpio.h> |
| 72 | |
Maxime Ripard | c61f025 | 2019-06-27 16:10:37 +0100 | [diff] [blame] | 73 | qfprom: eeprom@700000 { |
| 74 | #address-cells = <1>; |
| 75 | #size-cells = <1>; |
Rob Herring | 51a21e0 | 2020-02-21 16:27:10 -0600 | [diff] [blame] | 76 | reg = <0x00700000 0x100000>; |
| 77 | |
Khouloud Touil | 14f4957 | 2020-01-07 10:29:18 +0100 | [diff] [blame] | 78 | wp-gpios = <&gpio1 3 GPIO_ACTIVE_HIGH>; |
Maxime Ripard | c61f025 | 2019-06-27 16:10:37 +0100 | [diff] [blame] | 79 | |
| 80 | /* ... */ |
| 81 | |
| 82 | /* Data cells */ |
| 83 | tsens_calibration: calib@404 { |
| 84 | reg = <0x404 0x10>; |
| 85 | }; |
| 86 | |
| 87 | tsens_calibration_bckp: calib_bckp@504 { |
| 88 | reg = <0x504 0x11>; |
| 89 | bits = <6 128>; |
| 90 | }; |
| 91 | |
| 92 | pvs_version: pvs-version@6 { |
| 93 | reg = <0x6 0x2>; |
| 94 | bits = <7 2>; |
| 95 | }; |
| 96 | |
| 97 | speed_bin: speed-bin@c{ |
| 98 | reg = <0xc 0x1>; |
| 99 | bits = <2 3>; |
| 100 | }; |
| 101 | }; |
| 102 | |
| 103 | ... |