blob: 59724d18e6f32c2709718f9f080d5c57e0983c40 [file] [log] [blame]
Nobuhiro Iwamatsue6a39502021-02-16 00:24:35 +09001# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: "http://devicetree.org/schemas/net/toshiba,visconti-dwmac.yaml#"
5$schema: "http://devicetree.org/meta-schemas/core.yaml#"
6
7title: Toshiba Visconti DWMAC Ethernet controller
8
9maintainers:
10 - Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp>
11
12select:
13 properties:
14 compatible:
15 contains:
16 enum:
17 - toshiba,visconti-dwmac
18 required:
19 - compatible
20
21allOf:
22 - $ref: "snps,dwmac.yaml#"
23
24properties:
25 compatible:
26 oneOf:
27 - items:
28 - enum:
29 - toshiba,visconti-dwmac
30 - const: snps,dwmac-4.20a
31
32 reg:
33 maxItems: 1
34
35 clocks:
36 items:
37 - description: main clock
38 - description: PHY reference clock
39
40 clock-names:
41 items:
42 - const: stmmaceth
43 - const: phy_ref_clk
44
45required:
46 - compatible
47 - reg
48 - clocks
49 - clock-names
50
51unevaluatedProperties: false
52
53examples:
54 - |
55 #include <dt-bindings/interrupt-controller/arm-gic.h>
56
57 soc {
58 #address-cells = <2>;
59 #size-cells = <2>;
60
61 piether: ethernet@28000000 {
62 compatible = "toshiba,visconti-dwmac", "snps,dwmac-4.20a";
63 reg = <0 0x28000000 0 0x10000>;
64 interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
65 interrupt-names = "macirq";
66 clocks = <&clk300mhz>, <&clk125mhz>;
67 clock-names = "stmmaceth", "phy_ref_clk";
68 snps,txpbl = <4>;
69 snps,rxpbl = <4>;
70 snps,tso;
71 phy-mode = "rgmii-id";
72 phy-handle = <&phy0>;
73
74 mdio0 {
75 #address-cells = <0x1>;
76 #size-cells = <0x0>;
77 compatible = "snps,dwmac-mdio";
78
79 phy0: ethernet-phy@1 {
80 device_type = "ethernet-phy";
81 reg = <0x1>;
82 };
83 };
84 };
85 };