blob: 240abb6f102c99b21500f8308f3522d0ddf37049 [file] [log] [blame]
Johan Jonker8655ff22020-01-16 16:22:28 +01001# SPDX-License-Identifier: GPL-2.0
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/mmc/synopsys-dw-mshc.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Synopsys Designware Mobile Storage Host Controller Binding
8
9allOf:
10 - $ref: "synopsys-dw-mshc-common.yaml#"
11
12maintainers:
13 - Ulf Hansson <ulf.hansson@linaro.org>
14
15# Everything else is described in the common file
16properties:
17 compatible:
18 const: snps,dw-mshc
19
20 reg:
21 maxItems: 1
22
23 interrupts:
24 maxItems: 1
25
26 clocks:
27 minItems: 2
28 maxItems: 2
29 description:
30 Handle to "biu" and "ciu" clocks for the
31 bus interface unit clock and the card interface unit clock.
32
33 clock-names:
34 items:
35 - const: biu
36 - const: ciu
37
38required:
39 - compatible
40 - reg
41 - interrupts
42 - clocks
43 - clock-names
44
Rob Herring6fdc6e22020-10-05 13:38:27 -050045unevaluatedProperties: false
46
Johan Jonker8655ff22020-01-16 16:22:28 +010047examples:
48 - |
49 mmc@12200000 {
50 compatible = "snps,dw-mshc";
51 reg = <0x12200000 0x1000>;
52 interrupts = <0 75 0>;
53 clocks = <&clock 351>, <&clock 132>;
54 clock-names = "biu", "ciu";
55 dmas = <&pdma 12>;
56 dma-names = "rx-tx";
57 resets = <&rst 20>;
58 reset-names = "reset";
59 vmmc-supply = <&buck8>;
60 #address-cells = <1>;
61 #size-cells = <0>;
62 broken-cd;
63 bus-width = <8>;
64 cap-mmc-highspeed;
65 cap-sd-highspeed;
66 card-detect-delay = <200>;
Johan Jonker398b2502020-03-07 17:05:56 +010067 max-frequency = <200000000>;
Johan Jonker8655ff22020-01-16 16:22:28 +010068 clock-frequency = <400000000>;
69 data-addr = <0x200>;
70 fifo-depth = <0x80>;
71 fifo-watermark-aligned;
72 };