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Al Cooperd3b2cd02016-06-16 12:47:17 -04001* BROADCOM BRCMSTB/BMIPS SDHCI Controller
2
3This file documents differences between the core properties in mmc.txt
4and the properties used by the sdhci-brcmstb driver.
5
6NOTE: The driver disables all UHS speed modes by default and depends
7on Device Tree properties to enable them for SoC/Board combinations
8that support them.
9
10Required properties:
Jaedon Shin5a3ab282016-09-09 11:08:39 +090011- compatible: should be one of the following
12 - "brcm,bcm7425-sdhci"
13 - "brcm,bcm7445-sdhci"
Al Cooper61696bb2020-01-13 16:07:01 -050014 - "brcm,bcm7216-sdhci"
Al Cooperd3b2cd02016-06-16 12:47:17 -040015
16Refer to clocks/clock-bindings.txt for generic clock consumer properties.
17
18Example:
19
Al Cooper61696bb2020-01-13 16:07:01 -050020 sdhci@84b0000 {
Al Cooperd3b2cd02016-06-16 12:47:17 -040021 sd-uhs-sdr50;
22 sd-uhs-ddr50;
Al Cooper61696bb2020-01-13 16:07:01 -050023 sd-uhs-sdr104;
24 sdhci,auto-cmd12;
25 compatible = "brcm,bcm7216-sdhci",
26 "brcm,bcm7445-sdhci",
27 "brcm,sdhci-brcmstb";
28 reg = <0x84b0000 0x260 0x84b0300 0x200>;
29 reg-names = "host", "cfg";
30 interrupts = <0x0 0x26 0x4>;
31 interrupt-names = "sdio0_0";
32 clocks = <&scmi_clk 245>;
33 clock-names = "sw_sdio";
Al Cooperd3b2cd02016-06-16 12:47:17 -040034 };
35
Al Cooper61696bb2020-01-13 16:07:01 -050036 sdhci@84b1000 {
37 mmc-ddr-1_8v;
38 mmc-hs200-1_8v;
39 mmc-hs400-1_8v;
40 mmc-hs400-enhanced-strobe;
41 supports-cqe;
Al Cooperd3b2cd02016-06-16 12:47:17 -040042 non-removable;
43 bus-width = <0x8>;
Al Cooper61696bb2020-01-13 16:07:01 -050044 compatible = "brcm,bcm7216-sdhci",
45 "brcm,bcm7445-sdhci",
46 "brcm,sdhci-brcmstb";
47 reg = <0x84b1000 0x260 0x84b1300 0x200>;
48 reg-names = "host", "cfg";
49 interrupts = <0x0 0x27 0x4>;
50 interrupt-names = "sdio1_0";
51 clocks = <&scmi_clk 245>;
52 clock-names = "sw_sdio";
Al Cooperd3b2cd02016-06-16 12:47:17 -040053 };