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Benjamin Gaignard3130c262019-10-15 14:31:51 +02001# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/display/st,stm32-dsi.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: STMicroelectronics STM32 DSI host controller
8
9maintainers:
Patrice Chotardf4eedeb2021-11-10 16:01:44 +010010 - Philippe Cornu <philippe.cornu@foss.st.com>
11 - Yannick Fertre <yannick.fertre@foss.st.com>
Benjamin Gaignard3130c262019-10-15 14:31:51 +020012
13description:
14 The STMicroelectronics STM32 DSI controller uses the Synopsys DesignWare MIPI-DSI host controller.
15
Rob Herring24d59792020-10-02 17:59:24 -050016allOf:
17 - $ref: dsi-controller.yaml#
18
Benjamin Gaignard3130c262019-10-15 14:31:51 +020019properties:
20 compatible:
21 const: st,stm32-dsi
22
23 reg:
24 maxItems: 1
25
26 clocks:
27 items:
28 - description: Module Clock
29 - description: DSI bus clock
30 - description: Pixel clock
31 minItems: 2
Benjamin Gaignard3130c262019-10-15 14:31:51 +020032
33 clock-names:
34 items:
35 - const: pclk
36 - const: ref
37 - const: px_clk
38 minItems: 2
Benjamin Gaignard3130c262019-10-15 14:31:51 +020039
40 resets:
41 maxItems: 1
42
43 reset-names:
44 items:
45 - const: apb
46
47 phy-dsi-supply:
48 description:
Rob Herringf516fb72020-04-20 21:24:47 -050049 Phandle of the regulator that provides the supply voltage.
Benjamin Gaignard3130c262019-10-15 14:31:51 +020050
51 ports:
Rob Herringb6755422021-01-04 11:07:23 -070052 $ref: /schemas/graph.yaml#/properties/ports
53
Benjamin Gaignard3130c262019-10-15 14:31:51 +020054 properties:
55 port@0:
Rob Herringb6755422021-01-04 11:07:23 -070056 $ref: /schemas/graph.yaml#/properties/port
Benjamin Gaignard3130c262019-10-15 14:31:51 +020057 description:
58 DSI input port node, connected to the ltdc rgb output port.
59
60 port@1:
Rob Herringb6755422021-01-04 11:07:23 -070061 $ref: /schemas/graph.yaml#/properties/port
Benjamin Gaignard3130c262019-10-15 14:31:51 +020062 description:
63 DSI output port node, connected to a panel or a bridge input port"
64
Benjamin Gaignard3130c262019-10-15 14:31:51 +020065required:
66 - "#address-cells"
67 - "#size-cells"
68 - compatible
69 - reg
70 - clocks
71 - clock-names
72 - ports
73
Rob Herring24d59792020-10-02 17:59:24 -050074unevaluatedProperties: false
Benjamin Gaignard3130c262019-10-15 14:31:51 +020075
76examples:
77 - |
78 #include <dt-bindings/interrupt-controller/arm-gic.h>
79 #include <dt-bindings/clock/stm32mp1-clks.h>
80 #include <dt-bindings/reset/stm32mp1-resets.h>
81 #include <dt-bindings/gpio/gpio.h>
82 dsi: dsi@5a000000 {
83 compatible = "st,stm32-dsi";
84 reg = <0x5a000000 0x800>;
85 clocks = <&rcc DSI_K>, <&clk_hse>, <&rcc DSI_PX>;
86 clock-names = "pclk", "ref", "px_clk";
87 resets = <&rcc DSI_R>;
88 reset-names = "apb";
89 phy-dsi-supply = <&reg18>;
Krzysztof Kozlowskiffe9fc12019-10-21 17:18:47 +020090
Benjamin Gaignard3130c262019-10-15 14:31:51 +020091 #address-cells = <1>;
92 #size-cells = <0>;
93
94 ports {
95 #address-cells = <1>;
96 #size-cells = <0>;
97
98 port@0 {
99 reg = <0>;
100 dsi_in: endpoint {
101 remote-endpoint = <&ltdc_ep1_out>;
102 };
103 };
104
105 port@1 {
106 reg = <1>;
107 dsi_out: endpoint {
108 remote-endpoint = <&panel_in>;
109 };
110 };
111 };
112
113 panel-dsi@0 {
114 compatible = "orisetech,otm8009a";
115 reg = <0>;
116 reset-gpios = <&gpioe 4 GPIO_ACTIVE_LOW>;
117 power-supply = <&v3v3>;
118
119 port {
120 panel_in: endpoint {
121 remote-endpoint = <&dsi_out>;
122 };
123 };
124 };
125 };
126
127...
128