Benjamin Gaignard | 3130c26 | 2019-10-15 14:31:51 +0200 | [diff] [blame] | 1 | # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) |
| 2 | %YAML 1.2 |
| 3 | --- |
| 4 | $id: http://devicetree.org/schemas/display/st,stm32-dsi.yaml# |
| 5 | $schema: http://devicetree.org/meta-schemas/core.yaml# |
| 6 | |
| 7 | title: STMicroelectronics STM32 DSI host controller |
| 8 | |
| 9 | maintainers: |
Patrice Chotard | f4eedeb | 2021-11-10 16:01:44 +0100 | [diff] [blame] | 10 | - Philippe Cornu <philippe.cornu@foss.st.com> |
| 11 | - Yannick Fertre <yannick.fertre@foss.st.com> |
Benjamin Gaignard | 3130c26 | 2019-10-15 14:31:51 +0200 | [diff] [blame] | 12 | |
| 13 | description: |
| 14 | The STMicroelectronics STM32 DSI controller uses the Synopsys DesignWare MIPI-DSI host controller. |
| 15 | |
Rob Herring | 24d5979 | 2020-10-02 17:59:24 -0500 | [diff] [blame] | 16 | allOf: |
| 17 | - $ref: dsi-controller.yaml# |
| 18 | |
Benjamin Gaignard | 3130c26 | 2019-10-15 14:31:51 +0200 | [diff] [blame] | 19 | properties: |
| 20 | compatible: |
| 21 | const: st,stm32-dsi |
| 22 | |
| 23 | reg: |
| 24 | maxItems: 1 |
| 25 | |
| 26 | clocks: |
| 27 | items: |
| 28 | - description: Module Clock |
| 29 | - description: DSI bus clock |
| 30 | - description: Pixel clock |
| 31 | minItems: 2 |
Benjamin Gaignard | 3130c26 | 2019-10-15 14:31:51 +0200 | [diff] [blame] | 32 | |
| 33 | clock-names: |
| 34 | items: |
| 35 | - const: pclk |
| 36 | - const: ref |
| 37 | - const: px_clk |
| 38 | minItems: 2 |
Benjamin Gaignard | 3130c26 | 2019-10-15 14:31:51 +0200 | [diff] [blame] | 39 | |
| 40 | resets: |
| 41 | maxItems: 1 |
| 42 | |
| 43 | reset-names: |
| 44 | items: |
| 45 | - const: apb |
| 46 | |
| 47 | phy-dsi-supply: |
| 48 | description: |
Rob Herring | f516fb7 | 2020-04-20 21:24:47 -0500 | [diff] [blame] | 49 | Phandle of the regulator that provides the supply voltage. |
Benjamin Gaignard | 3130c26 | 2019-10-15 14:31:51 +0200 | [diff] [blame] | 50 | |
| 51 | ports: |
Rob Herring | b675542 | 2021-01-04 11:07:23 -0700 | [diff] [blame] | 52 | $ref: /schemas/graph.yaml#/properties/ports |
| 53 | |
Benjamin Gaignard | 3130c26 | 2019-10-15 14:31:51 +0200 | [diff] [blame] | 54 | properties: |
| 55 | port@0: |
Rob Herring | b675542 | 2021-01-04 11:07:23 -0700 | [diff] [blame] | 56 | $ref: /schemas/graph.yaml#/properties/port |
Benjamin Gaignard | 3130c26 | 2019-10-15 14:31:51 +0200 | [diff] [blame] | 57 | description: |
| 58 | DSI input port node, connected to the ltdc rgb output port. |
| 59 | |
| 60 | port@1: |
Rob Herring | b675542 | 2021-01-04 11:07:23 -0700 | [diff] [blame] | 61 | $ref: /schemas/graph.yaml#/properties/port |
Benjamin Gaignard | 3130c26 | 2019-10-15 14:31:51 +0200 | [diff] [blame] | 62 | description: |
| 63 | DSI output port node, connected to a panel or a bridge input port" |
| 64 | |
Benjamin Gaignard | 3130c26 | 2019-10-15 14:31:51 +0200 | [diff] [blame] | 65 | required: |
| 66 | - "#address-cells" |
| 67 | - "#size-cells" |
| 68 | - compatible |
| 69 | - reg |
| 70 | - clocks |
| 71 | - clock-names |
| 72 | - ports |
| 73 | |
Rob Herring | 24d5979 | 2020-10-02 17:59:24 -0500 | [diff] [blame] | 74 | unevaluatedProperties: false |
Benjamin Gaignard | 3130c26 | 2019-10-15 14:31:51 +0200 | [diff] [blame] | 75 | |
| 76 | examples: |
| 77 | - | |
| 78 | #include <dt-bindings/interrupt-controller/arm-gic.h> |
| 79 | #include <dt-bindings/clock/stm32mp1-clks.h> |
| 80 | #include <dt-bindings/reset/stm32mp1-resets.h> |
| 81 | #include <dt-bindings/gpio/gpio.h> |
| 82 | dsi: dsi@5a000000 { |
| 83 | compatible = "st,stm32-dsi"; |
| 84 | reg = <0x5a000000 0x800>; |
| 85 | clocks = <&rcc DSI_K>, <&clk_hse>, <&rcc DSI_PX>; |
| 86 | clock-names = "pclk", "ref", "px_clk"; |
| 87 | resets = <&rcc DSI_R>; |
| 88 | reset-names = "apb"; |
| 89 | phy-dsi-supply = <®18>; |
Krzysztof Kozlowski | ffe9fc1 | 2019-10-21 17:18:47 +0200 | [diff] [blame] | 90 | |
Benjamin Gaignard | 3130c26 | 2019-10-15 14:31:51 +0200 | [diff] [blame] | 91 | #address-cells = <1>; |
| 92 | #size-cells = <0>; |
| 93 | |
| 94 | ports { |
| 95 | #address-cells = <1>; |
| 96 | #size-cells = <0>; |
| 97 | |
| 98 | port@0 { |
| 99 | reg = <0>; |
| 100 | dsi_in: endpoint { |
| 101 | remote-endpoint = <<dc_ep1_out>; |
| 102 | }; |
| 103 | }; |
| 104 | |
| 105 | port@1 { |
| 106 | reg = <1>; |
| 107 | dsi_out: endpoint { |
| 108 | remote-endpoint = <&panel_in>; |
| 109 | }; |
| 110 | }; |
| 111 | }; |
| 112 | |
| 113 | panel-dsi@0 { |
| 114 | compatible = "orisetech,otm8009a"; |
| 115 | reg = <0>; |
| 116 | reset-gpios = <&gpioe 4 GPIO_ACTIVE_LOW>; |
| 117 | power-supply = <&v3v3>; |
| 118 | |
| 119 | port { |
| 120 | panel_in: endpoint { |
| 121 | remote-endpoint = <&dsi_out>; |
| 122 | }; |
| 123 | }; |
| 124 | }; |
| 125 | }; |
| 126 | |
| 127 | ... |
| 128 | |