Sean Wang | 808ecf4 | 2017-10-05 11:50:22 +0800 | [diff] [blame] | 1 | MediaTek SGMIISYS controller |
| 2 | ============================ |
| 3 | |
| 4 | The MediaTek SGMIISYS controller provides various clocks to the system. |
| 5 | |
| 6 | Required Properties: |
| 7 | |
| 8 | - compatible: Should be: |
| 9 | - "mediatek,mt7622-sgmiisys", "syscon" |
Ryder Lee | 0cd41af | 2018-11-05 16:43:56 +0800 | [diff] [blame] | 10 | - "mediatek,mt7629-sgmiisys", "syscon" |
Sean Wang | 808ecf4 | 2017-10-05 11:50:22 +0800 | [diff] [blame] | 11 | - #clock-cells: Must be 1 |
Sean Wang | 808ecf4 | 2017-10-05 11:50:22 +0800 | [diff] [blame] | 12 | |
| 13 | The SGMIISYS controller uses the common clk binding from |
| 14 | Documentation/devicetree/bindings/clock/clock-bindings.txt |
| 15 | The available clocks are defined in dt-bindings/clock/mt*-clk.h. |
| 16 | |
| 17 | Example: |
| 18 | |
| 19 | sgmiisys: sgmiisys@1b128000 { |
| 20 | compatible = "mediatek,mt7622-sgmiisys", "syscon"; |
| 21 | reg = <0 0x1b128000 0 0x1000>; |
| 22 | #clock-cells = <1>; |
| 23 | }; |