Laurent Pinchart | 0bb9267 | 2012-12-15 23:51:37 +0100 | [diff] [blame] | 1 | /* |
| 2 | * SH7757 (B0 step) Pinmux |
| 3 | * |
| 4 | * Copyright (C) 2009-2010 Renesas Solutions Corp. |
| 5 | * |
| 6 | * Author : Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com> |
| 7 | * |
| 8 | * Based on SH7723 Pinmux |
| 9 | * Copyright (C) 2008 Magnus Damm |
| 10 | * |
| 11 | * This file is subject to the terms and conditions of the GNU General Public |
| 12 | * License. See the file "COPYING" in the main directory of this archive |
| 13 | * for more details. |
| 14 | */ |
| 15 | |
| 16 | #include <linux/init.h> |
| 17 | #include <linux/kernel.h> |
Laurent Pinchart | 0bb9267 | 2012-12-15 23:51:37 +0100 | [diff] [blame] | 18 | #include <cpu/sh7757.h> |
| 19 | |
Laurent Pinchart | c332380 | 2012-12-15 23:51:55 +0100 | [diff] [blame] | 20 | #include "sh_pfc.h" |
| 21 | |
Laurent Pinchart | 0bb9267 | 2012-12-15 23:51:37 +0100 | [diff] [blame] | 22 | enum { |
| 23 | PINMUX_RESERVED = 0, |
| 24 | |
| 25 | PINMUX_DATA_BEGIN, |
| 26 | PTA7_DATA, PTA6_DATA, PTA5_DATA, PTA4_DATA, |
| 27 | PTA3_DATA, PTA2_DATA, PTA1_DATA, PTA0_DATA, |
| 28 | PTB7_DATA, PTB6_DATA, PTB5_DATA, PTB4_DATA, |
| 29 | PTB3_DATA, PTB2_DATA, PTB1_DATA, PTB0_DATA, |
| 30 | PTC7_DATA, PTC6_DATA, PTC5_DATA, PTC4_DATA, |
| 31 | PTC3_DATA, PTC2_DATA, PTC1_DATA, PTC0_DATA, |
| 32 | PTD7_DATA, PTD6_DATA, PTD5_DATA, PTD4_DATA, |
| 33 | PTD3_DATA, PTD2_DATA, PTD1_DATA, PTD0_DATA, |
| 34 | PTE7_DATA, PTE6_DATA, PTE5_DATA, PTE4_DATA, |
| 35 | PTE3_DATA, PTE2_DATA, PTE1_DATA, PTE0_DATA, |
| 36 | PTF7_DATA, PTF6_DATA, PTF5_DATA, PTF4_DATA, |
| 37 | PTF3_DATA, PTF2_DATA, PTF1_DATA, PTF0_DATA, |
| 38 | PTG7_DATA, PTG6_DATA, PTG5_DATA, PTG4_DATA, |
| 39 | PTG3_DATA, PTG2_DATA, PTG1_DATA, PTG0_DATA, |
| 40 | PTH7_DATA, PTH6_DATA, PTH5_DATA, PTH4_DATA, |
| 41 | PTH3_DATA, PTH2_DATA, PTH1_DATA, PTH0_DATA, |
| 42 | PTI7_DATA, PTI6_DATA, PTI5_DATA, PTI4_DATA, |
| 43 | PTI3_DATA, PTI2_DATA, PTI1_DATA, PTI0_DATA, |
| 44 | PTJ6_DATA, PTJ5_DATA, PTJ4_DATA, |
| 45 | PTJ3_DATA, PTJ2_DATA, PTJ1_DATA, PTJ0_DATA, |
| 46 | PTK7_DATA, PTK6_DATA, PTK5_DATA, PTK4_DATA, |
| 47 | PTK3_DATA, PTK2_DATA, PTK1_DATA, PTK0_DATA, |
| 48 | PTL6_DATA, PTL5_DATA, PTL4_DATA, |
| 49 | PTL3_DATA, PTL2_DATA, PTL1_DATA, PTL0_DATA, |
| 50 | PTM7_DATA, PTM6_DATA, PTM5_DATA, PTM4_DATA, |
| 51 | PTM3_DATA, PTM2_DATA, PTM1_DATA, PTM0_DATA, |
| 52 | PTN6_DATA, PTN5_DATA, PTN4_DATA, |
| 53 | PTN3_DATA, PTN2_DATA, PTN1_DATA, PTN0_DATA, |
| 54 | PTO7_DATA, PTO6_DATA, PTO5_DATA, PTO4_DATA, |
| 55 | PTO3_DATA, PTO2_DATA, PTO1_DATA, PTO0_DATA, |
| 56 | PTP7_DATA, PTP6_DATA, PTP5_DATA, PTP4_DATA, |
| 57 | PTP3_DATA, PTP2_DATA, PTP1_DATA, PTP0_DATA, |
| 58 | PTQ6_DATA, PTQ5_DATA, PTQ4_DATA, |
| 59 | PTQ3_DATA, PTQ2_DATA, PTQ1_DATA, PTQ0_DATA, |
| 60 | PTR7_DATA, PTR6_DATA, PTR5_DATA, PTR4_DATA, |
| 61 | PTR3_DATA, PTR2_DATA, PTR1_DATA, PTR0_DATA, |
| 62 | PTS7_DATA, PTS6_DATA, PTS5_DATA, PTS4_DATA, |
| 63 | PTS3_DATA, PTS2_DATA, PTS1_DATA, PTS0_DATA, |
| 64 | PTT7_DATA, PTT6_DATA, PTT5_DATA, PTT4_DATA, |
| 65 | PTT3_DATA, PTT2_DATA, PTT1_DATA, PTT0_DATA, |
| 66 | PTU7_DATA, PTU6_DATA, PTU5_DATA, PTU4_DATA, |
| 67 | PTU3_DATA, PTU2_DATA, PTU1_DATA, PTU0_DATA, |
| 68 | PTV7_DATA, PTV6_DATA, PTV5_DATA, PTV4_DATA, |
| 69 | PTV3_DATA, PTV2_DATA, PTV1_DATA, PTV0_DATA, |
| 70 | PTW7_DATA, PTW6_DATA, PTW5_DATA, PTW4_DATA, |
| 71 | PTW3_DATA, PTW2_DATA, PTW1_DATA, PTW0_DATA, |
| 72 | PTX7_DATA, PTX6_DATA, PTX5_DATA, PTX4_DATA, |
| 73 | PTX3_DATA, PTX2_DATA, PTX1_DATA, PTX0_DATA, |
| 74 | PTY7_DATA, PTY6_DATA, PTY5_DATA, PTY4_DATA, |
| 75 | PTY3_DATA, PTY2_DATA, PTY1_DATA, PTY0_DATA, |
| 76 | PTZ7_DATA, PTZ6_DATA, PTZ5_DATA, PTZ4_DATA, |
| 77 | PTZ3_DATA, PTZ2_DATA, PTZ1_DATA, PTZ0_DATA, |
| 78 | PINMUX_DATA_END, |
| 79 | |
| 80 | PINMUX_INPUT_BEGIN, |
| 81 | PTA7_IN, PTA6_IN, PTA5_IN, PTA4_IN, |
| 82 | PTA3_IN, PTA2_IN, PTA1_IN, PTA0_IN, |
| 83 | PTB7_IN, PTB6_IN, PTB5_IN, PTB4_IN, |
| 84 | PTB3_IN, PTB2_IN, PTB1_IN, PTB0_IN, |
| 85 | PTC7_IN, PTC6_IN, PTC5_IN, PTC4_IN, |
| 86 | PTC3_IN, PTC2_IN, PTC1_IN, PTC0_IN, |
| 87 | PTD7_IN, PTD6_IN, PTD5_IN, PTD4_IN, |
| 88 | PTD3_IN, PTD2_IN, PTD1_IN, PTD0_IN, |
| 89 | PTE7_IN, PTE6_IN, PTE5_IN, PTE4_IN, |
| 90 | PTE3_IN, PTE2_IN, PTE1_IN, PTE0_IN, |
| 91 | PTF7_IN, PTF6_IN, PTF5_IN, PTF4_IN, |
| 92 | PTF3_IN, PTF2_IN, PTF1_IN, PTF0_IN, |
| 93 | PTG7_IN, PTG6_IN, PTG5_IN, PTG4_IN, |
| 94 | PTG3_IN, PTG2_IN, PTG1_IN, PTG0_IN, |
| 95 | PTH7_IN, PTH6_IN, PTH5_IN, PTH4_IN, |
| 96 | PTH3_IN, PTH2_IN, PTH1_IN, PTH0_IN, |
| 97 | PTI7_IN, PTI6_IN, PTI5_IN, PTI4_IN, |
| 98 | PTI3_IN, PTI2_IN, PTI1_IN, PTI0_IN, |
| 99 | PTJ6_IN, PTJ5_IN, PTJ4_IN, |
| 100 | PTJ3_IN, PTJ2_IN, PTJ1_IN, PTJ0_IN, |
| 101 | PTK7_IN, PTK6_IN, PTK5_IN, PTK4_IN, |
| 102 | PTK3_IN, PTK2_IN, PTK1_IN, PTK0_IN, |
| 103 | PTL6_IN, PTL5_IN, PTL4_IN, |
| 104 | PTL3_IN, PTL2_IN, PTL1_IN, PTL0_IN, |
| 105 | PTM7_IN, PTM6_IN, PTM5_IN, PTM4_IN, |
| 106 | PTM3_IN, PTM2_IN, PTM1_IN, PTM0_IN, |
| 107 | PTN6_IN, PTN5_IN, PTN4_IN, |
| 108 | PTN3_IN, PTN2_IN, PTN1_IN, PTN0_IN, |
| 109 | PTO7_IN, PTO6_IN, PTO5_IN, PTO4_IN, |
| 110 | PTO3_IN, PTO2_IN, PTO1_IN, PTO0_IN, |
| 111 | PTP7_IN, PTP6_IN, PTP5_IN, PTP4_IN, |
| 112 | PTP3_IN, PTP2_IN, PTP1_IN, PTP0_IN, |
| 113 | PTQ6_IN, PTQ5_IN, PTQ4_IN, |
| 114 | PTQ3_IN, PTQ2_IN, PTQ1_IN, PTQ0_IN, |
| 115 | PTR7_IN, PTR6_IN, PTR5_IN, PTR4_IN, |
| 116 | PTR3_IN, PTR2_IN, PTR1_IN, PTR0_IN, |
| 117 | PTS7_IN, PTS6_IN, PTS5_IN, PTS4_IN, |
| 118 | PTS3_IN, PTS2_IN, PTS1_IN, PTS0_IN, |
| 119 | PTT7_IN, PTT6_IN, PTT5_IN, PTT4_IN, |
| 120 | PTT3_IN, PTT2_IN, PTT1_IN, PTT0_IN, |
| 121 | PTU7_IN, PTU6_IN, PTU5_IN, PTU4_IN, |
| 122 | PTU3_IN, PTU2_IN, PTU1_IN, PTU0_IN, |
| 123 | PTV7_IN, PTV6_IN, PTV5_IN, PTV4_IN, |
| 124 | PTV3_IN, PTV2_IN, PTV1_IN, PTV0_IN, |
| 125 | PTW7_IN, PTW6_IN, PTW5_IN, PTW4_IN, |
| 126 | PTW3_IN, PTW2_IN, PTW1_IN, PTW0_IN, |
| 127 | PTX7_IN, PTX6_IN, PTX5_IN, PTX4_IN, |
| 128 | PTX3_IN, PTX2_IN, PTX1_IN, PTX0_IN, |
| 129 | PTY7_IN, PTY6_IN, PTY5_IN, PTY4_IN, |
| 130 | PTY3_IN, PTY2_IN, PTY1_IN, PTY0_IN, |
| 131 | PTZ7_IN, PTZ6_IN, PTZ5_IN, PTZ4_IN, |
| 132 | PTZ3_IN, PTZ2_IN, PTZ1_IN, PTZ0_IN, |
| 133 | PINMUX_INPUT_END, |
| 134 | |
Laurent Pinchart | 0bb9267 | 2012-12-15 23:51:37 +0100 | [diff] [blame] | 135 | PINMUX_OUTPUT_BEGIN, |
| 136 | PTA7_OUT, PTA6_OUT, PTA5_OUT, PTA4_OUT, |
| 137 | PTA3_OUT, PTA2_OUT, PTA1_OUT, PTA0_OUT, |
| 138 | PTB7_OUT, PTB6_OUT, PTB5_OUT, PTB4_OUT, |
| 139 | PTB3_OUT, PTB2_OUT, PTB1_OUT, PTB0_OUT, |
| 140 | PTC7_OUT, PTC6_OUT, PTC5_OUT, PTC4_OUT, |
| 141 | PTC3_OUT, PTC2_OUT, PTC1_OUT, PTC0_OUT, |
| 142 | PTD7_OUT, PTD6_OUT, PTD5_OUT, PTD4_OUT, |
| 143 | PTD3_OUT, PTD2_OUT, PTD1_OUT, PTD0_OUT, |
| 144 | PTE7_OUT, PTE6_OUT, PTE5_OUT, PTE4_OUT, |
| 145 | PTE3_OUT, PTE2_OUT, PTE1_OUT, PTE0_OUT, |
| 146 | PTF7_OUT, PTF6_OUT, PTF5_OUT, PTF4_OUT, |
| 147 | PTF3_OUT, PTF2_OUT, PTF1_OUT, PTF0_OUT, |
| 148 | PTG7_OUT, PTG6_OUT, PTG5_OUT, PTG4_OUT, |
| 149 | PTG3_OUT, PTG2_OUT, PTG1_OUT, PTG0_OUT, |
| 150 | PTH7_OUT, PTH6_OUT, PTH5_OUT, PTH4_OUT, |
| 151 | PTH3_OUT, PTH2_OUT, PTH1_OUT, PTH0_OUT, |
| 152 | PTI7_OUT, PTI6_OUT, PTI5_OUT, PTI4_OUT, |
| 153 | PTI3_OUT, PTI2_OUT, PTI1_OUT, PTI0_OUT, |
| 154 | PTJ6_OUT, PTJ5_OUT, PTJ4_OUT, |
| 155 | PTJ3_OUT, PTJ2_OUT, PTJ1_OUT, PTJ0_OUT, |
| 156 | PTK7_OUT, PTK6_OUT, PTK5_OUT, PTK4_OUT, |
| 157 | PTK3_OUT, PTK2_OUT, PTK1_OUT, PTK0_OUT, |
| 158 | PTL6_OUT, PTL5_OUT, PTL4_OUT, |
| 159 | PTL3_OUT, PTL2_OUT, PTL1_OUT, PTL0_OUT, |
| 160 | PTM7_OUT, PTM6_OUT, PTM5_OUT, PTM4_OUT, |
| 161 | PTM3_OUT, PTM2_OUT, PTM1_OUT, PTM0_OUT, |
| 162 | PTN6_OUT, PTN5_OUT, PTN4_OUT, |
| 163 | PTN3_OUT, PTN2_OUT, PTN1_OUT, PTN0_OUT, |
| 164 | PTO7_OUT, PTO6_OUT, PTO5_OUT, PTO4_OUT, |
| 165 | PTO3_OUT, PTO2_OUT, PTO1_OUT, PTO0_OUT, |
| 166 | PTP7_OUT, PTP6_OUT, PTP5_OUT, PTP4_OUT, |
| 167 | PTP3_OUT, PTP2_OUT, PTP1_OUT, PTP0_OUT, |
| 168 | PTQ6_OUT, PTQ5_OUT, PTQ4_OUT, |
| 169 | PTQ3_OUT, PTQ2_OUT, PTQ1_OUT, PTQ0_OUT, |
| 170 | PTR7_OUT, PTR6_OUT, PTR5_OUT, PTR4_OUT, |
| 171 | PTR3_OUT, PTR2_OUT, PTR1_OUT, PTR0_OUT, |
| 172 | PTS7_OUT, PTS6_OUT, PTS5_OUT, PTS4_OUT, |
| 173 | PTS3_OUT, PTS2_OUT, PTS1_OUT, PTS0_OUT, |
| 174 | PTT7_OUT, PTT6_OUT, PTT5_OUT, PTT4_OUT, |
| 175 | PTT3_OUT, PTT2_OUT, PTT1_OUT, PTT0_OUT, |
| 176 | PTU7_OUT, PTU6_OUT, PTU5_OUT, PTU4_OUT, |
| 177 | PTU3_OUT, PTU2_OUT, PTU1_OUT, PTU0_OUT, |
| 178 | PTV7_OUT, PTV6_OUT, PTV5_OUT, PTV4_OUT, |
| 179 | PTV3_OUT, PTV2_OUT, PTV1_OUT, PTV0_OUT, |
| 180 | PTW7_OUT, PTW6_OUT, PTW5_OUT, PTW4_OUT, |
| 181 | PTW3_OUT, PTW2_OUT, PTW1_OUT, PTW0_OUT, |
| 182 | PTX7_OUT, PTX6_OUT, PTX5_OUT, PTX4_OUT, |
| 183 | PTX3_OUT, PTX2_OUT, PTX1_OUT, PTX0_OUT, |
| 184 | PTY7_OUT, PTY6_OUT, PTY5_OUT, PTY4_OUT, |
| 185 | PTY3_OUT, PTY2_OUT, PTY1_OUT, PTY0_OUT, |
| 186 | PTZ7_OUT, PTZ6_OUT, PTZ5_OUT, PTZ4_OUT, |
| 187 | PTZ3_OUT, PTZ2_OUT, PTZ1_OUT, PTZ0_OUT, |
| 188 | PINMUX_OUTPUT_END, |
| 189 | |
| 190 | PINMUX_FUNCTION_BEGIN, |
| 191 | PTA7_FN, PTA6_FN, PTA5_FN, PTA4_FN, |
| 192 | PTA3_FN, PTA2_FN, PTA1_FN, PTA0_FN, |
| 193 | PTB7_FN, PTB6_FN, PTB5_FN, PTB4_FN, |
| 194 | PTB3_FN, PTB2_FN, PTB1_FN, PTB0_FN, |
| 195 | PTC7_FN, PTC6_FN, PTC5_FN, PTC4_FN, |
| 196 | PTC3_FN, PTC2_FN, PTC1_FN, PTC0_FN, |
| 197 | PTD7_FN, PTD6_FN, PTD5_FN, PTD4_FN, |
| 198 | PTD3_FN, PTD2_FN, PTD1_FN, PTD0_FN, |
| 199 | PTE7_FN, PTE6_FN, PTE5_FN, PTE4_FN, |
| 200 | PTE3_FN, PTE2_FN, PTE1_FN, PTE0_FN, |
| 201 | PTF7_FN, PTF6_FN, PTF5_FN, PTF4_FN, |
| 202 | PTF3_FN, PTF2_FN, PTF1_FN, PTF0_FN, |
| 203 | PTG7_FN, PTG6_FN, PTG5_FN, PTG4_FN, |
| 204 | PTG3_FN, PTG2_FN, PTG1_FN, PTG0_FN, |
| 205 | PTH7_FN, PTH6_FN, PTH5_FN, PTH4_FN, |
| 206 | PTH3_FN, PTH2_FN, PTH1_FN, PTH0_FN, |
| 207 | PTI7_FN, PTI6_FN, PTI5_FN, PTI4_FN, |
| 208 | PTI3_FN, PTI2_FN, PTI1_FN, PTI0_FN, |
| 209 | PTJ6_FN, PTJ5_FN, PTJ4_FN, |
| 210 | PTJ3_FN, PTJ2_FN, PTJ1_FN, PTJ0_FN, |
| 211 | PTK7_FN, PTK6_FN, PTK5_FN, PTK4_FN, |
| 212 | PTK3_FN, PTK2_FN, PTK1_FN, PTK0_FN, |
| 213 | PTL6_FN, PTL5_FN, PTL4_FN, |
| 214 | PTL3_FN, PTL2_FN, PTL1_FN, PTL0_FN, |
| 215 | PTM7_FN, PTM6_FN, PTM5_FN, PTM4_FN, |
| 216 | PTM3_FN, PTM2_FN, PTM1_FN, PTM0_FN, |
| 217 | PTN6_FN, PTN5_FN, PTN4_FN, |
| 218 | PTN3_FN, PTN2_FN, PTN1_FN, PTN0_FN, |
| 219 | PTO7_FN, PTO6_FN, PTO5_FN, PTO4_FN, |
| 220 | PTO3_FN, PTO2_FN, PTO1_FN, PTO0_FN, |
| 221 | PTP7_FN, PTP6_FN, PTP5_FN, PTP4_FN, |
| 222 | PTP3_FN, PTP2_FN, PTP1_FN, PTP0_FN, |
| 223 | PTQ6_FN, PTQ5_FN, PTQ4_FN, |
| 224 | PTQ3_FN, PTQ2_FN, PTQ1_FN, PTQ0_FN, |
| 225 | PTR7_FN, PTR6_FN, PTR5_FN, PTR4_FN, |
| 226 | PTR3_FN, PTR2_FN, PTR1_FN, PTR0_FN, |
| 227 | PTS7_FN, PTS6_FN, PTS5_FN, PTS4_FN, |
| 228 | PTS3_FN, PTS2_FN, PTS1_FN, PTS0_FN, |
| 229 | PTT7_FN, PTT6_FN, PTT5_FN, PTT4_FN, |
| 230 | PTT3_FN, PTT2_FN, PTT1_FN, PTT0_FN, |
| 231 | PTU7_FN, PTU6_FN, PTU5_FN, PTU4_FN, |
| 232 | PTU3_FN, PTU2_FN, PTU1_FN, PTU0_FN, |
| 233 | PTV7_FN, PTV6_FN, PTV5_FN, PTV4_FN, |
| 234 | PTV3_FN, PTV2_FN, PTV1_FN, PTV0_FN, |
| 235 | PTW7_FN, PTW6_FN, PTW5_FN, PTW4_FN, |
| 236 | PTW3_FN, PTW2_FN, PTW1_FN, PTW0_FN, |
| 237 | PTX7_FN, PTX6_FN, PTX5_FN, PTX4_FN, |
| 238 | PTX3_FN, PTX2_FN, PTX1_FN, PTX0_FN, |
| 239 | PTY7_FN, PTY6_FN, PTY5_FN, PTY4_FN, |
| 240 | PTY3_FN, PTY2_FN, PTY1_FN, PTY0_FN, |
| 241 | PTZ7_FN, PTZ6_FN, PTZ5_FN, PTZ4_FN, |
| 242 | PTZ3_FN, PTZ2_FN, PTZ1_FN, PTZ0_FN, |
| 243 | |
| 244 | PS0_15_FN1, PS0_15_FN2, |
| 245 | PS0_14_FN1, PS0_14_FN2, |
| 246 | PS0_13_FN1, PS0_13_FN2, |
| 247 | PS0_12_FN1, PS0_12_FN2, |
| 248 | PS0_11_FN1, PS0_11_FN2, |
| 249 | PS0_10_FN1, PS0_10_FN2, |
| 250 | PS0_9_FN1, PS0_9_FN2, |
| 251 | PS0_8_FN1, PS0_8_FN2, |
| 252 | PS0_7_FN1, PS0_7_FN2, |
| 253 | PS0_6_FN1, PS0_6_FN2, |
| 254 | PS0_5_FN1, PS0_5_FN2, |
| 255 | PS0_4_FN1, PS0_4_FN2, |
| 256 | PS0_3_FN1, PS0_3_FN2, |
| 257 | PS0_2_FN1, PS0_2_FN2, |
| 258 | |
| 259 | PS1_10_FN1, PS1_10_FN2, |
| 260 | PS1_9_FN1, PS1_9_FN2, |
| 261 | PS1_8_FN1, PS1_8_FN2, |
| 262 | PS1_2_FN1, PS1_2_FN2, |
| 263 | |
| 264 | PS2_13_FN1, PS2_13_FN2, |
| 265 | PS2_12_FN1, PS2_12_FN2, |
| 266 | PS2_7_FN1, PS2_7_FN2, |
| 267 | PS2_6_FN1, PS2_6_FN2, |
| 268 | PS2_5_FN1, PS2_5_FN2, |
| 269 | PS2_4_FN1, PS2_4_FN2, |
| 270 | PS2_2_FN1, PS2_2_FN2, |
| 271 | |
| 272 | PS3_15_FN1, PS3_15_FN2, |
| 273 | PS3_14_FN1, PS3_14_FN2, |
| 274 | PS3_13_FN1, PS3_13_FN2, |
| 275 | PS3_12_FN1, PS3_12_FN2, |
| 276 | PS3_11_FN1, PS3_11_FN2, |
| 277 | PS3_10_FN1, PS3_10_FN2, |
| 278 | PS3_9_FN1, PS3_9_FN2, |
| 279 | PS3_8_FN1, PS3_8_FN2, |
| 280 | PS3_7_FN1, PS3_7_FN2, |
| 281 | PS3_2_FN1, PS3_2_FN2, |
| 282 | PS3_1_FN1, PS3_1_FN2, |
| 283 | |
| 284 | PS4_14_FN1, PS4_14_FN2, |
| 285 | PS4_13_FN1, PS4_13_FN2, |
| 286 | PS4_12_FN1, PS4_12_FN2, |
| 287 | PS4_10_FN1, PS4_10_FN2, |
| 288 | PS4_9_FN1, PS4_9_FN2, |
| 289 | PS4_8_FN1, PS4_8_FN2, |
| 290 | PS4_4_FN1, PS4_4_FN2, |
| 291 | PS4_3_FN1, PS4_3_FN2, |
| 292 | PS4_2_FN1, PS4_2_FN2, |
| 293 | PS4_1_FN1, PS4_1_FN2, |
| 294 | PS4_0_FN1, PS4_0_FN2, |
| 295 | |
| 296 | PS5_11_FN1, PS5_11_FN2, |
| 297 | PS5_10_FN1, PS5_10_FN2, |
| 298 | PS5_9_FN1, PS5_9_FN2, |
| 299 | PS5_8_FN1, PS5_8_FN2, |
| 300 | PS5_7_FN1, PS5_7_FN2, |
| 301 | PS5_6_FN1, PS5_6_FN2, |
| 302 | PS5_5_FN1, PS5_5_FN2, |
| 303 | PS5_4_FN1, PS5_4_FN2, |
| 304 | PS5_3_FN1, PS5_3_FN2, |
| 305 | PS5_2_FN1, PS5_2_FN2, |
| 306 | |
| 307 | PS6_15_FN1, PS6_15_FN2, |
| 308 | PS6_14_FN1, PS6_14_FN2, |
| 309 | PS6_13_FN1, PS6_13_FN2, |
| 310 | PS6_12_FN1, PS6_12_FN2, |
| 311 | PS6_11_FN1, PS6_11_FN2, |
| 312 | PS6_10_FN1, PS6_10_FN2, |
| 313 | PS6_9_FN1, PS6_9_FN2, |
| 314 | PS6_8_FN1, PS6_8_FN2, |
| 315 | PS6_7_FN1, PS6_7_FN2, |
| 316 | PS6_6_FN1, PS6_6_FN2, |
| 317 | PS6_5_FN1, PS6_5_FN2, |
| 318 | PS6_4_FN1, PS6_4_FN2, |
| 319 | PS6_3_FN1, PS6_3_FN2, |
| 320 | PS6_2_FN1, PS6_2_FN2, |
| 321 | PS6_1_FN1, PS6_1_FN2, |
| 322 | PS6_0_FN1, PS6_0_FN2, |
| 323 | |
| 324 | PS7_15_FN1, PS7_15_FN2, |
| 325 | PS7_14_FN1, PS7_14_FN2, |
| 326 | PS7_13_FN1, PS7_13_FN2, |
| 327 | PS7_12_FN1, PS7_12_FN2, |
| 328 | PS7_11_FN1, PS7_11_FN2, |
| 329 | PS7_10_FN1, PS7_10_FN2, |
| 330 | PS7_9_FN1, PS7_9_FN2, |
| 331 | PS7_8_FN1, PS7_8_FN2, |
| 332 | PS7_7_FN1, PS7_7_FN2, |
| 333 | PS7_6_FN1, PS7_6_FN2, |
| 334 | PS7_5_FN1, PS7_5_FN2, |
| 335 | PS7_4_FN1, PS7_4_FN2, |
| 336 | |
| 337 | PS8_15_FN1, PS8_15_FN2, |
| 338 | PS8_14_FN1, PS8_14_FN2, |
| 339 | PS8_13_FN1, PS8_13_FN2, |
| 340 | PS8_12_FN1, PS8_12_FN2, |
| 341 | PS8_11_FN1, PS8_11_FN2, |
| 342 | PS8_10_FN1, PS8_10_FN2, |
| 343 | PS8_9_FN1, PS8_9_FN2, |
| 344 | PS8_8_FN1, PS8_8_FN2, |
| 345 | PINMUX_FUNCTION_END, |
| 346 | |
| 347 | PINMUX_MARK_BEGIN, |
| 348 | /* PTA (mobule: LBSC, RGMII) */ |
| 349 | BS_MARK, RDWR_MARK, WE1_MARK, RDY_MARK, |
| 350 | ET0_MDC_MARK, ET0_MDIO_MARK, ET1_MDC_MARK, ET1_MDIO_MARK, |
| 351 | |
| 352 | /* PTB (mobule: INTC, ONFI, TMU) */ |
| 353 | IRQ15_MARK, IRQ14_MARK, IRQ13_MARK, IRQ12_MARK, |
| 354 | IRQ11_MARK, IRQ10_MARK, IRQ9_MARK, IRQ8_MARK, |
| 355 | ON_NRE_MARK, ON_NWE_MARK, ON_NWP_MARK, ON_NCE0_MARK, |
| 356 | ON_R_B0_MARK, ON_ALE_MARK, ON_CLE_MARK, TCLK_MARK, |
| 357 | |
| 358 | /* PTC (mobule: IRQ, PWMU) */ |
| 359 | IRQ7_MARK, IRQ6_MARK, IRQ5_MARK, IRQ4_MARK, |
| 360 | IRQ3_MARK, IRQ2_MARK, IRQ1_MARK, IRQ0_MARK, |
| 361 | PWMU0_MARK, PWMU1_MARK, PWMU2_MARK, PWMU3_MARK, |
| 362 | PWMU4_MARK, PWMU5_MARK, |
| 363 | |
| 364 | /* PTD (mobule: SPI0, DMAC) */ |
| 365 | SP0_MOSI_MARK, SP0_MISO_MARK, SP0_SCK_MARK, SP0_SCK_FB_MARK, |
| 366 | SP0_SS0_MARK, SP0_SS1_MARK, SP0_SS2_MARK, SP0_SS3_MARK, |
| 367 | DREQ0_MARK, DACK0_MARK, TEND0_MARK, |
| 368 | |
| 369 | /* PTE (mobule: RMII) */ |
| 370 | RMII0_CRS_DV_MARK, RMII0_TXD1_MARK, |
| 371 | RMII0_TXD0_MARK, RMII0_TXEN_MARK, |
| 372 | RMII0_REFCLK_MARK, RMII0_RXD1_MARK, |
| 373 | RMII0_RXD0_MARK, RMII0_RX_ER_MARK, |
| 374 | |
| 375 | /* PTF (mobule: RMII, SerMux) */ |
| 376 | RMII1_CRS_DV_MARK, RMII1_TXD1_MARK, |
| 377 | RMII1_TXD0_MARK, RMII1_TXEN_MARK, |
| 378 | RMII1_REFCLK_MARK, RMII1_RXD1_MARK, |
| 379 | RMII1_RXD0_MARK, RMII1_RX_ER_MARK, |
| 380 | RAC_RI_MARK, |
| 381 | |
| 382 | /* PTG (mobule: system, LBSC, LPC, WDT, LPC, eMMC) */ |
| 383 | BOOTFMS_MARK, BOOTWP_MARK, A25_MARK, A24_MARK, |
| 384 | SERIRQ_MARK, WDTOVF_MARK, LPCPD_MARK, LDRQ_MARK, |
| 385 | MMCCLK_MARK, MMCCMD_MARK, |
| 386 | |
| 387 | /* PTH (mobule: SPI1, LPC, DMAC, ADC) */ |
| 388 | SP1_MOSI_MARK, SP1_MISO_MARK, SP1_SCK_MARK, SP1_SCK_FB_MARK, |
| 389 | SP1_SS0_MARK, SP1_SS1_MARK, WP_MARK, FMS0_MARK, |
| 390 | TEND1_MARK, DREQ1_MARK, DACK1_MARK, ADTRG1_MARK, |
| 391 | ADTRG0_MARK, |
| 392 | |
| 393 | /* PTI (mobule: LBSC, SDHI) */ |
| 394 | D15_MARK, D14_MARK, D13_MARK, D12_MARK, |
| 395 | D11_MARK, D10_MARK, D9_MARK, D8_MARK, |
| 396 | SD_WP_MARK, SD_CD_MARK, SD_CLK_MARK, SD_CMD_MARK, |
| 397 | SD_D3_MARK, SD_D2_MARK, SD_D1_MARK, SD_D0_MARK, |
| 398 | |
| 399 | /* PTJ (mobule: SCIF234) */ |
| 400 | RTS3_MARK, CTS3_MARK, TXD3_MARK, RXD3_MARK, |
| 401 | RTS4_MARK, RXD4_MARK, TXD4_MARK, |
| 402 | |
| 403 | /* PTK (mobule: SERMUX, LBSC, SCIF) */ |
| 404 | COM2_TXD_MARK, COM2_RXD_MARK, COM2_RTS_MARK, COM2_CTS_MARK, |
| 405 | COM2_DTR_MARK, COM2_DSR_MARK, COM2_DCD_MARK, CLKOUT_MARK, |
| 406 | SCK2_MARK, SCK4_MARK, SCK3_MARK, |
| 407 | |
| 408 | /* PTL (mobule: SERMUX, SCIF, LBSC, AUD) */ |
| 409 | RAC_RXD_MARK, RAC_RTS_MARK, RAC_CTS_MARK, RAC_DTR_MARK, |
| 410 | RAC_DSR_MARK, RAC_DCD_MARK, RAC_TXD_MARK, RXD2_MARK, |
| 411 | CS5_MARK, CS6_MARK, AUDSYNC_MARK, AUDCK_MARK, |
| 412 | TXD2_MARK, |
| 413 | |
| 414 | /* PTM (mobule: LBSC, IIC) */ |
| 415 | CS4_MARK, RD_MARK, WE0_MARK, CS0_MARK, |
| 416 | SDA6_MARK, SCL6_MARK, SDA7_MARK, SCL7_MARK, |
| 417 | |
| 418 | /* PTN (mobule: USB, JMC, SGPIO, WDT) */ |
| 419 | VBUS_EN_MARK, VBUS_OC_MARK, JMCTCK_MARK, JMCTMS_MARK, |
| 420 | JMCTDO_MARK, JMCTDI_MARK, JMCTRST_MARK, |
| 421 | SGPIO1_CLK_MARK, SGPIO1_LOAD_MARK, SGPIO1_DI_MARK, |
| 422 | SGPIO1_DO_MARK, SUB_CLKIN_MARK, |
| 423 | |
| 424 | /* PTO (mobule: SGPIO, SerMux) */ |
| 425 | SGPIO0_CLK_MARK, SGPIO0_LOAD_MARK, SGPIO0_DI_MARK, |
| 426 | SGPIO0_DO_MARK, SGPIO2_CLK_MARK, SGPIO2_LOAD_MARK, |
| 427 | SGPIO2_DI_MARK, SGPIO2_DO_MARK, |
| 428 | COM1_TXD_MARK, COM1_RXD_MARK, COM1_RTS_MARK, COM1_CTS_MARK, |
| 429 | |
| 430 | /* PTQ (mobule: LPC) */ |
| 431 | LAD3_MARK, LAD2_MARK, LAD1_MARK, LAD0_MARK, |
| 432 | LFRAME_MARK, LRESET_MARK, LCLK_MARK, |
| 433 | |
| 434 | /* PTR (mobule: GRA, IIC) */ |
| 435 | DDC3_MARK, DDC2_MARK, SDA2_MARK, SCL2_MARK, |
| 436 | SDA1_MARK, SCL1_MARK, SDA0_MARK, SCL0_MARK, |
| 437 | SDA8_MARK, SCL8_MARK, |
| 438 | |
| 439 | /* PTS (mobule: GRA, IIC) */ |
| 440 | DDC1_MARK, DDC0_MARK, SDA5_MARK, SCL5_MARK, |
| 441 | SDA4_MARK, SCL4_MARK, SDA3_MARK, SCL3_MARK, |
| 442 | SDA9_MARK, SCL9_MARK, |
| 443 | |
| 444 | /* PTT (mobule: PWMX, AUD) */ |
| 445 | PWMX7_MARK, PWMX6_MARK, PWMX5_MARK, PWMX4_MARK, |
| 446 | PWMX3_MARK, PWMX2_MARK, PWMX1_MARK, PWMX0_MARK, |
| 447 | AUDATA3_MARK, AUDATA2_MARK, AUDATA1_MARK, AUDATA0_MARK, |
| 448 | STATUS1_MARK, STATUS0_MARK, |
| 449 | |
| 450 | /* PTU (mobule: LPC, APM) */ |
| 451 | LGPIO7_MARK, LGPIO6_MARK, LGPIO5_MARK, LGPIO4_MARK, |
| 452 | LGPIO3_MARK, LGPIO2_MARK, LGPIO1_MARK, LGPIO0_MARK, |
| 453 | APMONCTL_O_MARK, APMPWBTOUT_O_MARK, APMSCI_O_MARK, |
| 454 | APMVDDON_MARK, APMSLPBTN_MARK, APMPWRBTN_MARK, APMS5N_MARK, |
| 455 | APMS3N_MARK, |
| 456 | |
| 457 | /* PTV (mobule: LBSC, SerMux, R-SPI, EVC, GRA) */ |
| 458 | A23_MARK, A22_MARK, A21_MARK, A20_MARK, |
| 459 | A19_MARK, A18_MARK, A17_MARK, A16_MARK, |
| 460 | COM2_RI_MARK, R_SPI_MOSI_MARK, R_SPI_MISO_MARK, |
| 461 | R_SPI_RSPCK_MARK, R_SPI_SSL0_MARK, R_SPI_SSL1_MARK, |
| 462 | EVENT7_MARK, EVENT6_MARK, VBIOS_DI_MARK, VBIOS_DO_MARK, |
| 463 | VBIOS_CLK_MARK, VBIOS_CS_MARK, |
| 464 | |
| 465 | /* PTW (mobule: LBSC, EVC, SCIF) */ |
| 466 | A15_MARK, A14_MARK, A13_MARK, A12_MARK, |
| 467 | A11_MARK, A10_MARK, A9_MARK, A8_MARK, |
| 468 | EVENT5_MARK, EVENT4_MARK, EVENT3_MARK, EVENT2_MARK, |
| 469 | EVENT1_MARK, EVENT0_MARK, CTS4_MARK, CTS2_MARK, |
| 470 | |
| 471 | /* PTX (mobule: LBSC, SCIF, SIM) */ |
| 472 | A7_MARK, A6_MARK, A5_MARK, A4_MARK, |
| 473 | A3_MARK, A2_MARK, A1_MARK, A0_MARK, |
| 474 | RTS2_MARK, SIM_D_MARK, SIM_CLK_MARK, SIM_RST_MARK, |
| 475 | |
| 476 | /* PTY (mobule: LBSC) */ |
| 477 | D7_MARK, D6_MARK, D5_MARK, D4_MARK, |
| 478 | D3_MARK, D2_MARK, D1_MARK, D0_MARK, |
| 479 | |
| 480 | /* PTZ (mobule: eMMC, ONFI) */ |
| 481 | MMCDAT7_MARK, MMCDAT6_MARK, MMCDAT5_MARK, MMCDAT4_MARK, |
| 482 | MMCDAT3_MARK, MMCDAT2_MARK, MMCDAT1_MARK, MMCDAT0_MARK, |
| 483 | ON_DQ7_MARK, ON_DQ6_MARK, ON_DQ5_MARK, ON_DQ4_MARK, |
| 484 | ON_DQ3_MARK, ON_DQ2_MARK, ON_DQ1_MARK, ON_DQ0_MARK, |
| 485 | |
| 486 | PINMUX_MARK_END, |
| 487 | }; |
| 488 | |
Laurent Pinchart | 533743d | 2013-07-15 13:03:20 +0200 | [diff] [blame] | 489 | static const u16 pinmux_data[] = { |
Laurent Pinchart | 0bb9267 | 2012-12-15 23:51:37 +0100 | [diff] [blame] | 490 | /* PTA GPIO */ |
| 491 | PINMUX_DATA(PTA7_DATA, PTA7_IN, PTA7_OUT), |
| 492 | PINMUX_DATA(PTA6_DATA, PTA6_IN, PTA6_OUT), |
| 493 | PINMUX_DATA(PTA5_DATA, PTA5_IN, PTA5_OUT), |
| 494 | PINMUX_DATA(PTA4_DATA, PTA4_IN, PTA4_OUT), |
| 495 | PINMUX_DATA(PTA3_DATA, PTA3_IN, PTA3_OUT), |
| 496 | PINMUX_DATA(PTA2_DATA, PTA2_IN, PTA2_OUT), |
| 497 | PINMUX_DATA(PTA1_DATA, PTA1_IN, PTA1_OUT), |
| 498 | PINMUX_DATA(PTA0_DATA, PTA0_IN, PTA0_OUT), |
| 499 | |
| 500 | /* PTB GPIO */ |
| 501 | PINMUX_DATA(PTB7_DATA, PTB7_IN, PTB7_OUT), |
| 502 | PINMUX_DATA(PTB6_DATA, PTB6_IN, PTB6_OUT), |
| 503 | PINMUX_DATA(PTB5_DATA, PTB5_IN, PTB5_OUT), |
| 504 | PINMUX_DATA(PTB4_DATA, PTB4_IN, PTB4_OUT), |
| 505 | PINMUX_DATA(PTB3_DATA, PTB3_IN, PTB3_OUT), |
| 506 | PINMUX_DATA(PTB2_DATA, PTB2_IN, PTB2_OUT), |
| 507 | PINMUX_DATA(PTB1_DATA, PTB1_IN, PTB1_OUT), |
| 508 | PINMUX_DATA(PTB0_DATA, PTB0_IN, PTB0_OUT), |
| 509 | |
| 510 | /* PTC GPIO */ |
| 511 | PINMUX_DATA(PTC7_DATA, PTC7_IN, PTC7_OUT), |
| 512 | PINMUX_DATA(PTC6_DATA, PTC6_IN, PTC6_OUT), |
| 513 | PINMUX_DATA(PTC5_DATA, PTC5_IN, PTC5_OUT), |
| 514 | PINMUX_DATA(PTC4_DATA, PTC4_IN, PTC4_OUT), |
| 515 | PINMUX_DATA(PTC3_DATA, PTC3_IN, PTC3_OUT), |
| 516 | PINMUX_DATA(PTC2_DATA, PTC2_IN, PTC2_OUT), |
| 517 | PINMUX_DATA(PTC1_DATA, PTC1_IN, PTC1_OUT), |
| 518 | PINMUX_DATA(PTC0_DATA, PTC0_IN, PTC0_OUT), |
| 519 | |
| 520 | /* PTD GPIO */ |
| 521 | PINMUX_DATA(PTD7_DATA, PTD7_IN, PTD7_OUT), |
| 522 | PINMUX_DATA(PTD6_DATA, PTD6_IN, PTD6_OUT), |
| 523 | PINMUX_DATA(PTD5_DATA, PTD5_IN, PTD5_OUT), |
| 524 | PINMUX_DATA(PTD4_DATA, PTD4_IN, PTD4_OUT), |
| 525 | PINMUX_DATA(PTD3_DATA, PTD3_IN, PTD3_OUT), |
| 526 | PINMUX_DATA(PTD2_DATA, PTD2_IN, PTD2_OUT), |
| 527 | PINMUX_DATA(PTD1_DATA, PTD1_IN, PTD1_OUT), |
| 528 | PINMUX_DATA(PTD0_DATA, PTD0_IN, PTD0_OUT), |
| 529 | |
| 530 | /* PTE GPIO */ |
| 531 | PINMUX_DATA(PTE7_DATA, PTE7_IN, PTE7_OUT), |
| 532 | PINMUX_DATA(PTE6_DATA, PTE6_IN, PTE6_OUT), |
| 533 | PINMUX_DATA(PTE5_DATA, PTE5_IN, PTE5_OUT), |
| 534 | PINMUX_DATA(PTE4_DATA, PTE4_IN, PTE4_OUT), |
| 535 | PINMUX_DATA(PTE3_DATA, PTE3_IN, PTE3_OUT), |
| 536 | PINMUX_DATA(PTE2_DATA, PTE2_IN, PTE2_OUT), |
| 537 | PINMUX_DATA(PTE1_DATA, PTE1_IN, PTE1_OUT), |
| 538 | PINMUX_DATA(PTE0_DATA, PTE0_IN, PTE0_OUT), |
| 539 | |
| 540 | /* PTF GPIO */ |
| 541 | PINMUX_DATA(PTF7_DATA, PTF7_IN, PTF7_OUT), |
| 542 | PINMUX_DATA(PTF6_DATA, PTF6_IN, PTF6_OUT), |
| 543 | PINMUX_DATA(PTF5_DATA, PTF5_IN, PTF5_OUT), |
| 544 | PINMUX_DATA(PTF4_DATA, PTF4_IN, PTF4_OUT), |
| 545 | PINMUX_DATA(PTF3_DATA, PTF3_IN, PTF3_OUT), |
| 546 | PINMUX_DATA(PTF2_DATA, PTF2_IN, PTF2_OUT), |
| 547 | PINMUX_DATA(PTF1_DATA, PTF1_IN, PTF1_OUT), |
| 548 | PINMUX_DATA(PTF0_DATA, PTF0_IN, PTF0_OUT), |
| 549 | |
| 550 | /* PTG GPIO */ |
| 551 | PINMUX_DATA(PTG7_DATA, PTG7_IN, PTG7_OUT), |
| 552 | PINMUX_DATA(PTG6_DATA, PTG6_IN, PTG6_OUT), |
| 553 | PINMUX_DATA(PTG5_DATA, PTG5_IN, PTG5_OUT), |
| 554 | PINMUX_DATA(PTG4_DATA, PTG4_IN, PTG4_OUT), |
| 555 | PINMUX_DATA(PTG3_DATA, PTG3_IN, PTG3_OUT), |
| 556 | PINMUX_DATA(PTG2_DATA, PTG2_IN, PTG2_OUT), |
| 557 | PINMUX_DATA(PTG1_DATA, PTG1_IN, PTG1_OUT), |
| 558 | PINMUX_DATA(PTG0_DATA, PTG0_IN, PTG0_OUT), |
| 559 | |
| 560 | /* PTH GPIO */ |
| 561 | PINMUX_DATA(PTH7_DATA, PTH7_IN, PTH7_OUT), |
| 562 | PINMUX_DATA(PTH6_DATA, PTH6_IN, PTH6_OUT), |
| 563 | PINMUX_DATA(PTH5_DATA, PTH5_IN, PTH5_OUT), |
| 564 | PINMUX_DATA(PTH4_DATA, PTH4_IN, PTH4_OUT), |
| 565 | PINMUX_DATA(PTH3_DATA, PTH3_IN, PTH3_OUT), |
| 566 | PINMUX_DATA(PTH2_DATA, PTH2_IN, PTH2_OUT), |
| 567 | PINMUX_DATA(PTH1_DATA, PTH1_IN, PTH1_OUT), |
| 568 | PINMUX_DATA(PTH0_DATA, PTH0_IN, PTH0_OUT), |
| 569 | |
| 570 | /* PTI GPIO */ |
| 571 | PINMUX_DATA(PTI7_DATA, PTI7_IN, PTI7_OUT), |
| 572 | PINMUX_DATA(PTI6_DATA, PTI6_IN, PTI6_OUT), |
| 573 | PINMUX_DATA(PTI5_DATA, PTI5_IN, PTI5_OUT), |
| 574 | PINMUX_DATA(PTI4_DATA, PTI4_IN, PTI4_OUT), |
| 575 | PINMUX_DATA(PTI3_DATA, PTI3_IN, PTI3_OUT), |
| 576 | PINMUX_DATA(PTI2_DATA, PTI2_IN, PTI2_OUT), |
| 577 | PINMUX_DATA(PTI1_DATA, PTI1_IN, PTI1_OUT), |
| 578 | PINMUX_DATA(PTI0_DATA, PTI0_IN, PTI0_OUT), |
| 579 | |
| 580 | /* PTJ GPIO */ |
| 581 | PINMUX_DATA(PTJ6_DATA, PTJ6_IN, PTJ6_OUT), |
| 582 | PINMUX_DATA(PTJ5_DATA, PTJ5_IN, PTJ5_OUT), |
| 583 | PINMUX_DATA(PTJ4_DATA, PTJ4_IN, PTJ4_OUT), |
| 584 | PINMUX_DATA(PTJ3_DATA, PTJ3_IN, PTJ3_OUT), |
| 585 | PINMUX_DATA(PTJ2_DATA, PTJ2_IN, PTJ2_OUT), |
| 586 | PINMUX_DATA(PTJ1_DATA, PTJ1_IN, PTJ1_OUT), |
| 587 | PINMUX_DATA(PTJ0_DATA, PTJ0_IN, PTJ0_OUT), |
| 588 | |
| 589 | /* PTK GPIO */ |
| 590 | PINMUX_DATA(PTK7_DATA, PTK7_IN, PTK7_OUT), |
| 591 | PINMUX_DATA(PTK6_DATA, PTK6_IN, PTK6_OUT), |
| 592 | PINMUX_DATA(PTK5_DATA, PTK5_IN, PTK5_OUT), |
| 593 | PINMUX_DATA(PTK4_DATA, PTK4_IN, PTK4_OUT), |
| 594 | PINMUX_DATA(PTK3_DATA, PTK3_IN, PTK3_OUT), |
| 595 | PINMUX_DATA(PTK2_DATA, PTK2_IN, PTK2_OUT), |
| 596 | PINMUX_DATA(PTK1_DATA, PTK1_IN, PTK1_OUT), |
| 597 | PINMUX_DATA(PTK0_DATA, PTK0_IN, PTK0_OUT), |
| 598 | |
| 599 | /* PTL GPIO */ |
| 600 | PINMUX_DATA(PTL6_DATA, PTL6_IN, PTL6_OUT), |
| 601 | PINMUX_DATA(PTL5_DATA, PTL5_IN, PTL5_OUT), |
| 602 | PINMUX_DATA(PTL4_DATA, PTL4_IN, PTL4_OUT), |
| 603 | PINMUX_DATA(PTL3_DATA, PTL3_IN, PTL3_OUT), |
| 604 | PINMUX_DATA(PTL2_DATA, PTL2_IN, PTL2_OUT), |
| 605 | PINMUX_DATA(PTL1_DATA, PTL1_IN, PTL1_OUT), |
| 606 | PINMUX_DATA(PTL0_DATA, PTL0_IN, PTL0_OUT), |
| 607 | |
| 608 | /* PTM GPIO */ |
| 609 | PINMUX_DATA(PTM6_DATA, PTM6_IN, PTM6_OUT), |
| 610 | PINMUX_DATA(PTM5_DATA, PTM5_IN, PTM5_OUT), |
| 611 | PINMUX_DATA(PTM4_DATA, PTM4_IN, PTM4_OUT), |
| 612 | PINMUX_DATA(PTM3_DATA, PTM3_IN, PTM3_OUT), |
| 613 | PINMUX_DATA(PTM2_DATA, PTM2_IN, PTM2_OUT), |
| 614 | PINMUX_DATA(PTM1_DATA, PTM1_IN, PTM1_OUT), |
| 615 | PINMUX_DATA(PTM0_DATA, PTM0_IN, PTM0_OUT), |
| 616 | |
| 617 | /* PTN GPIO */ |
| 618 | PINMUX_DATA(PTN6_DATA, PTN6_IN, PTN6_OUT), |
| 619 | PINMUX_DATA(PTN5_DATA, PTN5_IN, PTN5_OUT), |
| 620 | PINMUX_DATA(PTN4_DATA, PTN4_IN, PTN4_OUT), |
| 621 | PINMUX_DATA(PTN3_DATA, PTN3_IN, PTN3_OUT), |
| 622 | PINMUX_DATA(PTN2_DATA, PTN2_IN, PTN2_OUT), |
| 623 | PINMUX_DATA(PTN1_DATA, PTN1_IN, PTN1_OUT), |
| 624 | PINMUX_DATA(PTN0_DATA, PTN0_IN, PTN0_OUT), |
| 625 | |
| 626 | /* PTO GPIO */ |
| 627 | PINMUX_DATA(PTO7_DATA, PTO7_IN, PTO7_OUT), |
| 628 | PINMUX_DATA(PTO6_DATA, PTO6_IN, PTO6_OUT), |
| 629 | PINMUX_DATA(PTO5_DATA, PTO5_IN, PTO5_OUT), |
| 630 | PINMUX_DATA(PTO4_DATA, PTO4_IN, PTO4_OUT), |
| 631 | PINMUX_DATA(PTO3_DATA, PTO3_IN, PTO3_OUT), |
| 632 | PINMUX_DATA(PTO2_DATA, PTO2_IN, PTO2_OUT), |
| 633 | PINMUX_DATA(PTO1_DATA, PTO1_IN, PTO1_OUT), |
| 634 | PINMUX_DATA(PTO0_DATA, PTO0_IN, PTO0_OUT), |
| 635 | |
| 636 | /* PTQ GPIO */ |
| 637 | PINMUX_DATA(PTQ6_DATA, PTQ6_IN, PTQ6_OUT), |
| 638 | PINMUX_DATA(PTQ5_DATA, PTQ5_IN, PTQ5_OUT), |
| 639 | PINMUX_DATA(PTQ4_DATA, PTQ4_IN, PTQ4_OUT), |
| 640 | PINMUX_DATA(PTQ3_DATA, PTQ3_IN, PTQ3_OUT), |
| 641 | PINMUX_DATA(PTQ2_DATA, PTQ2_IN, PTQ2_OUT), |
| 642 | PINMUX_DATA(PTQ1_DATA, PTQ1_IN, PTQ1_OUT), |
| 643 | PINMUX_DATA(PTQ0_DATA, PTQ0_IN, PTQ0_OUT), |
| 644 | |
| 645 | /* PTR GPIO */ |
| 646 | PINMUX_DATA(PTR7_DATA, PTR7_IN, PTR7_OUT), |
| 647 | PINMUX_DATA(PTR6_DATA, PTR6_IN, PTR6_OUT), |
| 648 | PINMUX_DATA(PTR5_DATA, PTR5_IN, PTR5_OUT), |
| 649 | PINMUX_DATA(PTR4_DATA, PTR4_IN, PTR4_OUT), |
| 650 | PINMUX_DATA(PTR3_DATA, PTR3_IN, PTR3_OUT), |
| 651 | PINMUX_DATA(PTR2_DATA, PTR2_IN, PTR2_OUT), |
| 652 | PINMUX_DATA(PTR1_DATA, PTR1_IN, PTR1_OUT), |
| 653 | PINMUX_DATA(PTR0_DATA, PTR0_IN, PTR0_OUT), |
| 654 | |
| 655 | /* PTS GPIO */ |
| 656 | PINMUX_DATA(PTS7_DATA, PTS7_IN, PTS7_OUT), |
| 657 | PINMUX_DATA(PTS6_DATA, PTS6_IN, PTS6_OUT), |
| 658 | PINMUX_DATA(PTS5_DATA, PTS5_IN, PTS5_OUT), |
| 659 | PINMUX_DATA(PTS4_DATA, PTS4_IN, PTS4_OUT), |
| 660 | PINMUX_DATA(PTS3_DATA, PTS3_IN, PTS3_OUT), |
| 661 | PINMUX_DATA(PTS2_DATA, PTS2_IN, PTS2_OUT), |
| 662 | PINMUX_DATA(PTS1_DATA, PTS1_IN, PTS1_OUT), |
| 663 | PINMUX_DATA(PTS0_DATA, PTS0_IN, PTS0_OUT), |
| 664 | |
| 665 | /* PTT GPIO */ |
| 666 | PINMUX_DATA(PTT7_DATA, PTT7_IN, PTT7_OUT), |
| 667 | PINMUX_DATA(PTT6_DATA, PTT6_IN, PTT6_OUT), |
| 668 | PINMUX_DATA(PTT5_DATA, PTT5_IN, PTT5_OUT), |
| 669 | PINMUX_DATA(PTT4_DATA, PTT4_IN, PTT4_OUT), |
| 670 | PINMUX_DATA(PTT3_DATA, PTT3_IN, PTT3_OUT), |
| 671 | PINMUX_DATA(PTT2_DATA, PTT2_IN, PTT2_OUT), |
| 672 | PINMUX_DATA(PTT1_DATA, PTT1_IN, PTT1_OUT), |
| 673 | PINMUX_DATA(PTT0_DATA, PTT0_IN, PTT0_OUT), |
| 674 | |
| 675 | /* PTU GPIO */ |
| 676 | PINMUX_DATA(PTU7_DATA, PTU7_IN, PTU7_OUT), |
| 677 | PINMUX_DATA(PTU6_DATA, PTU6_IN, PTU6_OUT), |
| 678 | PINMUX_DATA(PTU5_DATA, PTU5_IN, PTU5_OUT), |
| 679 | PINMUX_DATA(PTU4_DATA, PTU4_IN, PTU4_OUT), |
| 680 | PINMUX_DATA(PTU3_DATA, PTU3_IN, PTU3_OUT), |
| 681 | PINMUX_DATA(PTU2_DATA, PTU2_IN, PTU2_OUT), |
| 682 | PINMUX_DATA(PTU1_DATA, PTU1_IN, PTU1_OUT), |
| 683 | PINMUX_DATA(PTU0_DATA, PTU0_IN, PTU0_OUT), |
| 684 | |
| 685 | /* PTV GPIO */ |
| 686 | PINMUX_DATA(PTV7_DATA, PTV7_IN, PTV7_OUT), |
| 687 | PINMUX_DATA(PTV6_DATA, PTV6_IN, PTV6_OUT), |
| 688 | PINMUX_DATA(PTV5_DATA, PTV5_IN, PTV5_OUT), |
| 689 | PINMUX_DATA(PTV4_DATA, PTV4_IN, PTV4_OUT), |
| 690 | PINMUX_DATA(PTV3_DATA, PTV3_IN, PTV3_OUT), |
| 691 | PINMUX_DATA(PTV2_DATA, PTV2_IN, PTV2_OUT), |
| 692 | PINMUX_DATA(PTV1_DATA, PTV1_IN, PTV1_OUT), |
| 693 | PINMUX_DATA(PTV0_DATA, PTV0_IN, PTV0_OUT), |
| 694 | |
| 695 | /* PTW GPIO */ |
| 696 | PINMUX_DATA(PTW7_DATA, PTW7_IN, PTW7_OUT), |
| 697 | PINMUX_DATA(PTW6_DATA, PTW6_IN, PTW6_OUT), |
| 698 | PINMUX_DATA(PTW5_DATA, PTW5_IN, PTW5_OUT), |
| 699 | PINMUX_DATA(PTW4_DATA, PTW4_IN, PTW4_OUT), |
| 700 | PINMUX_DATA(PTW3_DATA, PTW3_IN, PTW3_OUT), |
| 701 | PINMUX_DATA(PTW2_DATA, PTW2_IN, PTW2_OUT), |
| 702 | PINMUX_DATA(PTW1_DATA, PTW1_IN, PTW1_OUT), |
| 703 | PINMUX_DATA(PTW0_DATA, PTW0_IN, PTW0_OUT), |
| 704 | |
| 705 | /* PTX GPIO */ |
| 706 | PINMUX_DATA(PTX7_DATA, PTX7_IN, PTX7_OUT), |
| 707 | PINMUX_DATA(PTX6_DATA, PTX6_IN, PTX6_OUT), |
| 708 | PINMUX_DATA(PTX5_DATA, PTX5_IN, PTX5_OUT), |
| 709 | PINMUX_DATA(PTX4_DATA, PTX4_IN, PTX4_OUT), |
| 710 | PINMUX_DATA(PTX3_DATA, PTX3_IN, PTX3_OUT), |
| 711 | PINMUX_DATA(PTX2_DATA, PTX2_IN, PTX2_OUT), |
| 712 | PINMUX_DATA(PTX1_DATA, PTX1_IN, PTX1_OUT), |
| 713 | PINMUX_DATA(PTX0_DATA, PTX0_IN, PTX0_OUT), |
| 714 | |
| 715 | /* PTY GPIO */ |
| 716 | PINMUX_DATA(PTY7_DATA, PTY7_IN, PTY7_OUT), |
| 717 | PINMUX_DATA(PTY6_DATA, PTY6_IN, PTY6_OUT), |
| 718 | PINMUX_DATA(PTY5_DATA, PTY5_IN, PTY5_OUT), |
| 719 | PINMUX_DATA(PTY4_DATA, PTY4_IN, PTY4_OUT), |
| 720 | PINMUX_DATA(PTY3_DATA, PTY3_IN, PTY3_OUT), |
| 721 | PINMUX_DATA(PTY2_DATA, PTY2_IN, PTY2_OUT), |
| 722 | PINMUX_DATA(PTY1_DATA, PTY1_IN, PTY1_OUT), |
| 723 | PINMUX_DATA(PTY0_DATA, PTY0_IN, PTY0_OUT), |
| 724 | |
| 725 | /* PTZ GPIO */ |
| 726 | PINMUX_DATA(PTZ7_DATA, PTZ7_IN, PTZ7_OUT), |
| 727 | PINMUX_DATA(PTZ6_DATA, PTZ6_IN, PTZ6_OUT), |
| 728 | PINMUX_DATA(PTZ5_DATA, PTZ5_IN, PTZ5_OUT), |
| 729 | PINMUX_DATA(PTZ4_DATA, PTZ4_IN, PTZ4_OUT), |
| 730 | PINMUX_DATA(PTZ3_DATA, PTZ3_IN, PTZ3_OUT), |
| 731 | PINMUX_DATA(PTZ2_DATA, PTZ2_IN, PTZ2_OUT), |
| 732 | PINMUX_DATA(PTZ1_DATA, PTZ1_IN, PTZ1_OUT), |
| 733 | PINMUX_DATA(PTZ0_DATA, PTZ0_IN, PTZ0_OUT), |
| 734 | |
| 735 | /* PTA FN */ |
| 736 | PINMUX_DATA(BS_MARK, PTA7_FN), |
| 737 | PINMUX_DATA(RDWR_MARK, PTA6_FN), |
| 738 | PINMUX_DATA(WE1_MARK, PTA5_FN), |
| 739 | PINMUX_DATA(RDY_MARK, PTA4_FN), |
| 740 | PINMUX_DATA(ET0_MDC_MARK, PTA3_FN), |
| 741 | PINMUX_DATA(ET0_MDIO_MARK, PTA2_FN), |
| 742 | PINMUX_DATA(ET1_MDC_MARK, PTA1_FN), |
| 743 | PINMUX_DATA(ET1_MDIO_MARK, PTA0_FN), |
| 744 | |
| 745 | /* PTB FN */ |
| 746 | PINMUX_DATA(IRQ15_MARK, PS0_15_FN1, PTB7_FN), |
| 747 | PINMUX_DATA(ON_NRE_MARK, PS0_15_FN2, PTB7_FN), |
| 748 | PINMUX_DATA(IRQ14_MARK, PS0_14_FN1, PTB6_FN), |
| 749 | PINMUX_DATA(ON_NWE_MARK, PS0_14_FN2, PTB6_FN), |
| 750 | PINMUX_DATA(IRQ13_MARK, PS0_13_FN1, PTB5_FN), |
| 751 | PINMUX_DATA(ON_NWP_MARK, PS0_13_FN2, PTB5_FN), |
| 752 | PINMUX_DATA(IRQ12_MARK, PS0_12_FN1, PTB4_FN), |
| 753 | PINMUX_DATA(ON_NCE0_MARK, PS0_12_FN2, PTB4_FN), |
| 754 | PINMUX_DATA(IRQ11_MARK, PS0_11_FN1, PTB3_FN), |
| 755 | PINMUX_DATA(ON_R_B0_MARK, PS0_11_FN2, PTB3_FN), |
| 756 | PINMUX_DATA(IRQ10_MARK, PS0_10_FN1, PTB2_FN), |
| 757 | PINMUX_DATA(ON_ALE_MARK, PS0_10_FN2, PTB2_FN), |
| 758 | PINMUX_DATA(IRQ9_MARK, PS0_9_FN1, PTB1_FN), |
| 759 | PINMUX_DATA(ON_CLE_MARK, PS0_9_FN2, PTB1_FN), |
| 760 | PINMUX_DATA(IRQ8_MARK, PS0_8_FN1, PTB0_FN), |
| 761 | PINMUX_DATA(TCLK_MARK, PS0_8_FN2, PTB0_FN), |
| 762 | |
| 763 | /* PTC FN */ |
| 764 | PINMUX_DATA(IRQ7_MARK, PS0_7_FN1, PTC7_FN), |
| 765 | PINMUX_DATA(PWMU0_MARK, PS0_7_FN2, PTC7_FN), |
| 766 | PINMUX_DATA(IRQ6_MARK, PS0_6_FN1, PTC6_FN), |
| 767 | PINMUX_DATA(PWMU1_MARK, PS0_6_FN2, PTC6_FN), |
| 768 | PINMUX_DATA(IRQ5_MARK, PS0_5_FN1, PTC5_FN), |
| 769 | PINMUX_DATA(PWMU2_MARK, PS0_5_FN2, PTC5_FN), |
| 770 | PINMUX_DATA(IRQ4_MARK, PS0_4_FN1, PTC5_FN), |
| 771 | PINMUX_DATA(PWMU3_MARK, PS0_4_FN2, PTC4_FN), |
| 772 | PINMUX_DATA(IRQ3_MARK, PS0_3_FN1, PTC3_FN), |
| 773 | PINMUX_DATA(PWMU4_MARK, PS0_3_FN2, PTC3_FN), |
| 774 | PINMUX_DATA(IRQ2_MARK, PS0_2_FN1, PTC2_FN), |
| 775 | PINMUX_DATA(PWMU5_MARK, PS0_2_FN2, PTC2_FN), |
| 776 | PINMUX_DATA(IRQ1_MARK, PTC1_FN), |
| 777 | PINMUX_DATA(IRQ0_MARK, PTC0_FN), |
| 778 | |
| 779 | /* PTD FN */ |
| 780 | PINMUX_DATA(SP0_MOSI_MARK, PTD7_FN), |
| 781 | PINMUX_DATA(SP0_MISO_MARK, PTD6_FN), |
| 782 | PINMUX_DATA(SP0_SCK_MARK, PTD5_FN), |
| 783 | PINMUX_DATA(SP0_SCK_FB_MARK, PTD4_FN), |
| 784 | PINMUX_DATA(SP0_SS0_MARK, PTD3_FN), |
| 785 | PINMUX_DATA(SP0_SS1_MARK, PS1_10_FN1, PTD2_FN), |
| 786 | PINMUX_DATA(DREQ0_MARK, PS1_10_FN2, PTD2_FN), |
| 787 | PINMUX_DATA(SP0_SS2_MARK, PS1_9_FN1, PTD1_FN), |
| 788 | PINMUX_DATA(DACK0_MARK, PS1_9_FN2, PTD1_FN), |
| 789 | PINMUX_DATA(SP0_SS3_MARK, PS1_8_FN1, PTD0_FN), |
| 790 | PINMUX_DATA(TEND0_MARK, PS1_8_FN2, PTD0_FN), |
| 791 | |
| 792 | /* PTE FN */ |
| 793 | PINMUX_DATA(RMII0_CRS_DV_MARK, PTE7_FN), |
| 794 | PINMUX_DATA(RMII0_TXD1_MARK, PTE6_FN), |
| 795 | PINMUX_DATA(RMII0_TXD0_MARK, PTE5_FN), |
| 796 | PINMUX_DATA(RMII0_TXEN_MARK, PTE4_FN), |
| 797 | PINMUX_DATA(RMII0_REFCLK_MARK, PTE3_FN), |
| 798 | PINMUX_DATA(RMII0_RXD1_MARK, PTE2_FN), |
| 799 | PINMUX_DATA(RMII0_RXD0_MARK, PTE1_FN), |
| 800 | PINMUX_DATA(RMII0_RX_ER_MARK, PTE0_FN), |
| 801 | |
| 802 | /* PTF FN */ |
| 803 | PINMUX_DATA(RMII1_CRS_DV_MARK, PTF7_FN), |
| 804 | PINMUX_DATA(RMII1_TXD1_MARK, PTF6_FN), |
| 805 | PINMUX_DATA(RMII1_TXD0_MARK, PTF5_FN), |
| 806 | PINMUX_DATA(RMII1_TXEN_MARK, PTF4_FN), |
| 807 | PINMUX_DATA(RMII1_REFCLK_MARK, PTF3_FN), |
| 808 | PINMUX_DATA(RMII1_RXD1_MARK, PS1_2_FN1, PTF2_FN), |
| 809 | PINMUX_DATA(RAC_RI_MARK, PS1_2_FN2, PTF2_FN), |
| 810 | PINMUX_DATA(RMII1_RXD0_MARK, PTF1_FN), |
| 811 | PINMUX_DATA(RMII1_RX_ER_MARK, PTF0_FN), |
| 812 | |
| 813 | /* PTG FN */ |
| 814 | PINMUX_DATA(BOOTFMS_MARK, PTG7_FN), |
| 815 | PINMUX_DATA(BOOTWP_MARK, PTG6_FN), |
| 816 | PINMUX_DATA(A25_MARK, PS2_13_FN1, PTG5_FN), |
| 817 | PINMUX_DATA(MMCCLK_MARK, PS2_13_FN2, PTG5_FN), |
| 818 | PINMUX_DATA(A24_MARK, PS2_12_FN1, PTG4_FN), |
| 819 | PINMUX_DATA(MMCCMD_MARK, PS2_12_FN2, PTG4_FN), |
| 820 | PINMUX_DATA(SERIRQ_MARK, PTG3_FN), |
| 821 | PINMUX_DATA(WDTOVF_MARK, PTG2_FN), |
| 822 | PINMUX_DATA(LPCPD_MARK, PTG1_FN), |
| 823 | PINMUX_DATA(LDRQ_MARK, PTG0_FN), |
| 824 | |
| 825 | /* PTH FN */ |
| 826 | PINMUX_DATA(SP1_MOSI_MARK, PS2_7_FN1, PTH7_FN), |
| 827 | PINMUX_DATA(TEND1_MARK, PS2_7_FN2, PTH7_FN), |
| 828 | PINMUX_DATA(SP1_MISO_MARK, PS2_6_FN1, PTH6_FN), |
| 829 | PINMUX_DATA(DREQ1_MARK, PS2_6_FN2, PTH6_FN), |
| 830 | PINMUX_DATA(SP1_SCK_MARK, PS2_5_FN1, PTH5_FN), |
| 831 | PINMUX_DATA(DACK1_MARK, PS2_5_FN2, PTH5_FN), |
| 832 | PINMUX_DATA(SP1_SCK_FB_MARK, PS2_4_FN1, PTH4_FN), |
| 833 | PINMUX_DATA(ADTRG1_MARK, PS2_4_FN2, PTH4_FN), |
| 834 | PINMUX_DATA(SP1_SS0_MARK, PTH3_FN), |
| 835 | PINMUX_DATA(SP1_SS1_MARK, PS2_2_FN1, PTH2_FN), |
| 836 | PINMUX_DATA(ADTRG0_MARK, PS2_2_FN2, PTH2_FN), |
| 837 | PINMUX_DATA(WP_MARK, PTH1_FN), |
| 838 | PINMUX_DATA(FMS0_MARK, PTH0_FN), |
| 839 | |
| 840 | /* PTI FN */ |
| 841 | PINMUX_DATA(D15_MARK, PS3_15_FN1, PTI7_FN), |
| 842 | PINMUX_DATA(SD_WP_MARK, PS3_15_FN2, PTI7_FN), |
| 843 | PINMUX_DATA(D14_MARK, PS3_14_FN1, PTI6_FN), |
| 844 | PINMUX_DATA(SD_CD_MARK, PS3_14_FN2, PTI6_FN), |
| 845 | PINMUX_DATA(D13_MARK, PS3_13_FN1, PTI5_FN), |
| 846 | PINMUX_DATA(SD_CLK_MARK, PS3_13_FN2, PTI5_FN), |
| 847 | PINMUX_DATA(D12_MARK, PS3_12_FN1, PTI4_FN), |
| 848 | PINMUX_DATA(SD_CMD_MARK, PS3_12_FN2, PTI4_FN), |
| 849 | PINMUX_DATA(D11_MARK, PS3_11_FN1, PTI3_FN), |
| 850 | PINMUX_DATA(SD_D3_MARK, PS3_11_FN2, PTI3_FN), |
| 851 | PINMUX_DATA(D10_MARK, PS3_10_FN1, PTI2_FN), |
| 852 | PINMUX_DATA(SD_D2_MARK, PS3_10_FN2, PTI2_FN), |
| 853 | PINMUX_DATA(D9_MARK, PS3_9_FN1, PTI1_FN), |
| 854 | PINMUX_DATA(SD_D1_MARK, PS3_9_FN2, PTI1_FN), |
| 855 | PINMUX_DATA(D8_MARK, PS3_8_FN1, PTI0_FN), |
| 856 | PINMUX_DATA(SD_D0_MARK, PS3_8_FN2, PTI0_FN), |
| 857 | |
| 858 | /* PTJ FN */ |
| 859 | PINMUX_DATA(RTS3_MARK, PTJ6_FN), |
| 860 | PINMUX_DATA(CTS3_MARK, PTJ5_FN), |
| 861 | PINMUX_DATA(TXD3_MARK, PTJ4_FN), |
| 862 | PINMUX_DATA(RXD3_MARK, PTJ3_FN), |
| 863 | PINMUX_DATA(RTS4_MARK, PTJ2_FN), |
| 864 | PINMUX_DATA(RXD4_MARK, PTJ1_FN), |
| 865 | PINMUX_DATA(TXD4_MARK, PTJ0_FN), |
| 866 | |
| 867 | /* PTK FN */ |
| 868 | PINMUX_DATA(COM2_TXD_MARK, PS3_7_FN1, PTK7_FN), |
| 869 | PINMUX_DATA(SCK2_MARK, PS3_7_FN2, PTK7_FN), |
| 870 | PINMUX_DATA(COM2_RXD_MARK, PTK6_FN), |
| 871 | PINMUX_DATA(COM2_RTS_MARK, PTK5_FN), |
| 872 | PINMUX_DATA(COM2_CTS_MARK, PTK4_FN), |
| 873 | PINMUX_DATA(COM2_DTR_MARK, PTK3_FN), |
| 874 | PINMUX_DATA(COM2_DSR_MARK, PS3_2_FN1, PTK2_FN), |
| 875 | PINMUX_DATA(SCK4_MARK, PS3_2_FN2, PTK2_FN), |
| 876 | PINMUX_DATA(COM2_DCD_MARK, PS3_1_FN1, PTK1_FN), |
| 877 | PINMUX_DATA(SCK3_MARK, PS3_1_FN2, PTK1_FN), |
| 878 | PINMUX_DATA(CLKOUT_MARK, PTK0_FN), |
| 879 | |
| 880 | /* PTL FN */ |
| 881 | PINMUX_DATA(RAC_RXD_MARK, PS4_14_FN1, PTL6_FN), |
| 882 | PINMUX_DATA(RXD2_MARK, PS4_14_FN2, PTL6_FN), |
| 883 | PINMUX_DATA(RAC_RTS_MARK, PS4_13_FN1, PTL5_FN), |
| 884 | PINMUX_DATA(CS5_MARK, PS4_13_FN2, PTL5_FN), |
| 885 | PINMUX_DATA(RAC_CTS_MARK, PS4_12_FN1, PTL4_FN), |
| 886 | PINMUX_DATA(CS6_MARK, PS4_12_FN2, PTL4_FN), |
| 887 | PINMUX_DATA(RAC_DTR_MARK, PTL3_FN), |
| 888 | PINMUX_DATA(RAC_DSR_MARK, PS4_10_FN1, PTL2_FN), |
| 889 | PINMUX_DATA(AUDSYNC_MARK, PS4_10_FN2, PTL2_FN), |
| 890 | PINMUX_DATA(RAC_DCD_MARK, PS4_9_FN1, PTL1_FN), |
| 891 | PINMUX_DATA(AUDCK_MARK, PS4_9_FN2, PTL1_FN), |
| 892 | PINMUX_DATA(RAC_TXD_MARK, PS4_8_FN1, PTL0_FN), |
| 893 | PINMUX_DATA(TXD2_MARK, PS4_8_FN1, PTL0_FN), |
| 894 | |
| 895 | /* PTM FN */ |
| 896 | PINMUX_DATA(CS4_MARK, PTM7_FN), |
| 897 | PINMUX_DATA(RD_MARK, PTM6_FN), |
| 898 | PINMUX_DATA(WE0_MARK, PTM7_FN), |
| 899 | PINMUX_DATA(CS0_MARK, PTM4_FN), |
| 900 | PINMUX_DATA(SDA6_MARK, PTM3_FN), |
| 901 | PINMUX_DATA(SCL6_MARK, PTM2_FN), |
| 902 | PINMUX_DATA(SDA7_MARK, PTM1_FN), |
| 903 | PINMUX_DATA(SCL7_MARK, PTM0_FN), |
| 904 | |
| 905 | /* PTN FN */ |
| 906 | PINMUX_DATA(VBUS_EN_MARK, PTN6_FN), |
| 907 | PINMUX_DATA(VBUS_OC_MARK, PTN5_FN), |
| 908 | PINMUX_DATA(JMCTCK_MARK, PS4_4_FN1, PTN4_FN), |
| 909 | PINMUX_DATA(SGPIO1_CLK_MARK, PS4_4_FN2, PTN4_FN), |
| 910 | PINMUX_DATA(JMCTMS_MARK, PS4_3_FN1, PTN5_FN), |
| 911 | PINMUX_DATA(SGPIO1_LOAD_MARK, PS4_3_FN2, PTN5_FN), |
| 912 | PINMUX_DATA(JMCTDO_MARK, PS4_2_FN1, PTN2_FN), |
| 913 | PINMUX_DATA(SGPIO1_DO_MARK, PS4_2_FN2, PTN2_FN), |
| 914 | PINMUX_DATA(JMCTDI_MARK, PS4_1_FN1, PTN1_FN), |
| 915 | PINMUX_DATA(SGPIO1_DI_MARK, PS4_1_FN2, PTN1_FN), |
| 916 | PINMUX_DATA(JMCTRST_MARK, PS4_0_FN1, PTN0_FN), |
| 917 | PINMUX_DATA(SUB_CLKIN_MARK, PS4_0_FN2, PTN0_FN), |
| 918 | |
| 919 | /* PTO FN */ |
| 920 | PINMUX_DATA(SGPIO0_CLK_MARK, PTO7_FN), |
| 921 | PINMUX_DATA(SGPIO0_LOAD_MARK, PTO6_FN), |
| 922 | PINMUX_DATA(SGPIO0_DI_MARK, PTO5_FN), |
| 923 | PINMUX_DATA(SGPIO0_DO_MARK, PTO4_FN), |
| 924 | PINMUX_DATA(SGPIO2_CLK_MARK, PS5_11_FN1, PTO3_FN), |
| 925 | PINMUX_DATA(COM1_TXD_MARK, PS5_11_FN2, PTO3_FN), |
| 926 | PINMUX_DATA(SGPIO2_LOAD_MARK, PS5_10_FN1, PTO2_FN), |
| 927 | PINMUX_DATA(COM1_RXD_MARK, PS5_10_FN2, PTO2_FN), |
| 928 | PINMUX_DATA(SGPIO2_DI_MARK, PS5_9_FN1, PTO1_FN), |
| 929 | PINMUX_DATA(COM1_RTS_MARK, PS5_9_FN2, PTO1_FN), |
| 930 | PINMUX_DATA(SGPIO2_DO_MARK, PS5_8_FN1, PTO0_FN), |
| 931 | PINMUX_DATA(COM1_CTS_MARK, PS5_8_FN2, PTO0_FN), |
| 932 | |
| 933 | /* PTP FN */ |
| 934 | |
| 935 | /* PTQ FN */ |
| 936 | PINMUX_DATA(LAD3_MARK, PTQ6_FN), |
| 937 | PINMUX_DATA(LAD2_MARK, PTQ5_FN), |
| 938 | PINMUX_DATA(LAD1_MARK, PTQ4_FN), |
| 939 | PINMUX_DATA(LAD0_MARK, PTQ3_FN), |
| 940 | PINMUX_DATA(LFRAME_MARK, PTQ2_FN), |
| 941 | PINMUX_DATA(LRESET_MARK, PTQ1_FN), |
| 942 | PINMUX_DATA(LCLK_MARK, PTQ0_FN), |
| 943 | |
| 944 | /* PTR FN */ |
| 945 | PINMUX_DATA(SDA8_MARK, PTR7_FN), /* DDC3? */ |
| 946 | PINMUX_DATA(SCL8_MARK, PTR6_FN), /* DDC2? */ |
| 947 | PINMUX_DATA(SDA2_MARK, PTR5_FN), |
| 948 | PINMUX_DATA(SCL2_MARK, PTR4_FN), |
| 949 | PINMUX_DATA(SDA1_MARK, PTR3_FN), |
| 950 | PINMUX_DATA(SCL1_MARK, PTR2_FN), |
| 951 | PINMUX_DATA(SDA0_MARK, PTR1_FN), |
| 952 | PINMUX_DATA(SCL0_MARK, PTR0_FN), |
| 953 | |
| 954 | /* PTS FN */ |
| 955 | PINMUX_DATA(SDA9_MARK, PTS7_FN), /* DDC1? */ |
| 956 | PINMUX_DATA(SCL9_MARK, PTS6_FN), /* DDC0? */ |
| 957 | PINMUX_DATA(SDA5_MARK, PTS5_FN), |
| 958 | PINMUX_DATA(SCL5_MARK, PTS4_FN), |
| 959 | PINMUX_DATA(SDA4_MARK, PTS3_FN), |
| 960 | PINMUX_DATA(SCL4_MARK, PTS2_FN), |
| 961 | PINMUX_DATA(SDA3_MARK, PTS1_FN), |
| 962 | PINMUX_DATA(SCL3_MARK, PTS0_FN), |
| 963 | |
| 964 | /* PTT FN */ |
| 965 | PINMUX_DATA(PWMX7_MARK, PS5_7_FN1, PTT7_FN), |
| 966 | PINMUX_DATA(AUDATA3_MARK, PS5_7_FN2, PTT7_FN), |
| 967 | PINMUX_DATA(PWMX6_MARK, PS5_6_FN1, PTT6_FN), |
| 968 | PINMUX_DATA(AUDATA2_MARK, PS5_6_FN2, PTT6_FN), |
| 969 | PINMUX_DATA(PWMX5_MARK, PS5_5_FN1, PTT5_FN), |
| 970 | PINMUX_DATA(AUDATA1_MARK, PS5_5_FN2, PTT5_FN), |
| 971 | PINMUX_DATA(PWMX4_MARK, PS5_4_FN1, PTT4_FN), |
| 972 | PINMUX_DATA(AUDATA0_MARK, PS5_4_FN2, PTT4_FN), |
| 973 | PINMUX_DATA(PWMX3_MARK, PS5_3_FN1, PTT3_FN), |
| 974 | PINMUX_DATA(STATUS1_MARK, PS5_3_FN2, PTT3_FN), |
| 975 | PINMUX_DATA(PWMX2_MARK, PS5_2_FN1, PTT2_FN), |
| 976 | PINMUX_DATA(STATUS0_MARK, PS5_2_FN2, PTT2_FN), |
| 977 | PINMUX_DATA(PWMX1_MARK, PTT1_FN), |
| 978 | PINMUX_DATA(PWMX0_MARK, PTT0_FN), |
| 979 | |
| 980 | /* PTU FN */ |
| 981 | PINMUX_DATA(LGPIO7_MARK, PS6_15_FN1, PTU7_FN), |
| 982 | PINMUX_DATA(APMONCTL_O_MARK, PS6_15_FN2, PTU7_FN), |
| 983 | PINMUX_DATA(LGPIO6_MARK, PS6_14_FN1, PTU6_FN), |
| 984 | PINMUX_DATA(APMPWBTOUT_O_MARK, PS6_14_FN2, PTU6_FN), |
| 985 | PINMUX_DATA(LGPIO5_MARK, PS6_13_FN1, PTU5_FN), |
| 986 | PINMUX_DATA(APMSCI_O_MARK, PS6_13_FN2, PTU5_FN), |
| 987 | PINMUX_DATA(LGPIO4_MARK, PS6_12_FN1, PTU4_FN), |
| 988 | PINMUX_DATA(APMVDDON_MARK, PS6_12_FN2, PTU4_FN), |
| 989 | PINMUX_DATA(LGPIO3_MARK, PS6_11_FN1, PTU3_FN), |
| 990 | PINMUX_DATA(APMSLPBTN_MARK, PS6_11_FN2, PTU3_FN), |
| 991 | PINMUX_DATA(LGPIO2_MARK, PS6_10_FN1, PTU2_FN), |
| 992 | PINMUX_DATA(APMPWRBTN_MARK, PS6_10_FN2, PTU2_FN), |
| 993 | PINMUX_DATA(LGPIO1_MARK, PS6_9_FN1, PTU1_FN), |
| 994 | PINMUX_DATA(APMS5N_MARK, PS6_9_FN2, PTU1_FN), |
| 995 | PINMUX_DATA(LGPIO0_MARK, PS6_8_FN1, PTU0_FN), |
| 996 | PINMUX_DATA(APMS3N_MARK, PS6_8_FN2, PTU0_FN), |
| 997 | |
| 998 | /* PTV FN */ |
| 999 | PINMUX_DATA(A23_MARK, PS6_7_FN1, PTV7_FN), |
| 1000 | PINMUX_DATA(COM2_RI_MARK, PS6_7_FN2, PTV7_FN), |
| 1001 | PINMUX_DATA(A22_MARK, PS6_6_FN1, PTV6_FN), |
| 1002 | PINMUX_DATA(R_SPI_MOSI_MARK, PS6_6_FN2, PTV6_FN), |
| 1003 | PINMUX_DATA(A21_MARK, PS6_5_FN1, PTV5_FN), |
| 1004 | PINMUX_DATA(R_SPI_MISO_MARK, PS6_5_FN2, PTV5_FN), |
| 1005 | PINMUX_DATA(A20_MARK, PS6_4_FN1, PTV4_FN), |
| 1006 | PINMUX_DATA(R_SPI_RSPCK_MARK, PS6_4_FN2, PTV4_FN), |
| 1007 | PINMUX_DATA(A19_MARK, PS6_3_FN1, PTV3_FN), |
| 1008 | PINMUX_DATA(R_SPI_SSL0_MARK, PS6_3_FN2, PTV3_FN), |
| 1009 | PINMUX_DATA(A18_MARK, PS6_2_FN1, PTV2_FN), |
| 1010 | PINMUX_DATA(R_SPI_SSL1_MARK, PS6_2_FN2, PTV2_FN), |
| 1011 | PINMUX_DATA(A17_MARK, PS6_1_FN1, PTV1_FN), |
| 1012 | PINMUX_DATA(EVENT7_MARK, PS6_1_FN2, PTV1_FN), |
| 1013 | PINMUX_DATA(A16_MARK, PS6_0_FN1, PTV0_FN), |
| 1014 | PINMUX_DATA(EVENT6_MARK, PS6_0_FN1, PTV0_FN), |
| 1015 | |
| 1016 | /* PTW FN */ |
| 1017 | PINMUX_DATA(A15_MARK, PS7_15_FN1, PTW7_FN), |
| 1018 | PINMUX_DATA(EVENT5_MARK, PS7_15_FN2, PTW7_FN), |
| 1019 | PINMUX_DATA(A14_MARK, PS7_14_FN1, PTW6_FN), |
| 1020 | PINMUX_DATA(EVENT4_MARK, PS7_14_FN2, PTW6_FN), |
| 1021 | PINMUX_DATA(A13_MARK, PS7_13_FN1, PTW5_FN), |
| 1022 | PINMUX_DATA(EVENT3_MARK, PS7_13_FN2, PTW5_FN), |
| 1023 | PINMUX_DATA(A12_MARK, PS7_12_FN1, PTW4_FN), |
| 1024 | PINMUX_DATA(EVENT2_MARK, PS7_12_FN2, PTW4_FN), |
| 1025 | PINMUX_DATA(A11_MARK, PS7_11_FN1, PTW3_FN), |
| 1026 | PINMUX_DATA(EVENT1_MARK, PS7_11_FN2, PTW3_FN), |
| 1027 | PINMUX_DATA(A10_MARK, PS7_10_FN1, PTW2_FN), |
| 1028 | PINMUX_DATA(EVENT0_MARK, PS7_10_FN2, PTW2_FN), |
| 1029 | PINMUX_DATA(A9_MARK, PS7_9_FN1, PTW1_FN), |
| 1030 | PINMUX_DATA(CTS4_MARK, PS7_9_FN2, PTW1_FN), |
| 1031 | PINMUX_DATA(A8_MARK, PS7_8_FN1, PTW0_FN), |
| 1032 | PINMUX_DATA(CTS2_MARK, PS7_8_FN2, PTW0_FN), |
| 1033 | |
| 1034 | /* PTX FN */ |
| 1035 | PINMUX_DATA(A7_MARK, PS7_7_FN1, PTX7_FN), |
| 1036 | PINMUX_DATA(RTS2_MARK, PS7_7_FN2, PTX7_FN), |
| 1037 | PINMUX_DATA(A6_MARK, PS7_6_FN1, PTX6_FN), |
| 1038 | PINMUX_DATA(SIM_D_MARK, PS7_6_FN2, PTX6_FN), |
| 1039 | PINMUX_DATA(A5_MARK, PS7_5_FN1, PTX5_FN), |
| 1040 | PINMUX_DATA(SIM_CLK_MARK, PS7_5_FN2, PTX5_FN), |
| 1041 | PINMUX_DATA(A4_MARK, PS7_4_FN1, PTX4_FN), |
| 1042 | PINMUX_DATA(SIM_RST_MARK, PS7_4_FN2, PTX4_FN), |
| 1043 | PINMUX_DATA(A3_MARK, PTX3_FN), |
| 1044 | PINMUX_DATA(A2_MARK, PTX2_FN), |
| 1045 | PINMUX_DATA(A1_MARK, PTX1_FN), |
| 1046 | PINMUX_DATA(A0_MARK, PTX0_FN), |
| 1047 | |
| 1048 | /* PTY FN */ |
| 1049 | PINMUX_DATA(D7_MARK, PTY7_FN), |
| 1050 | PINMUX_DATA(D6_MARK, PTY6_FN), |
| 1051 | PINMUX_DATA(D5_MARK, PTY5_FN), |
| 1052 | PINMUX_DATA(D4_MARK, PTY4_FN), |
| 1053 | PINMUX_DATA(D3_MARK, PTY3_FN), |
| 1054 | PINMUX_DATA(D2_MARK, PTY2_FN), |
| 1055 | PINMUX_DATA(D1_MARK, PTY1_FN), |
| 1056 | PINMUX_DATA(D0_MARK, PTY0_FN), |
| 1057 | |
| 1058 | /* PTZ FN */ |
| 1059 | PINMUX_DATA(MMCDAT7_MARK, PS8_15_FN1, PTZ7_FN), |
| 1060 | PINMUX_DATA(ON_DQ7_MARK, PS8_15_FN2, PTZ7_FN), |
| 1061 | PINMUX_DATA(MMCDAT6_MARK, PS8_14_FN1, PTZ6_FN), |
| 1062 | PINMUX_DATA(ON_DQ6_MARK, PS8_14_FN2, PTZ6_FN), |
| 1063 | PINMUX_DATA(MMCDAT5_MARK, PS8_13_FN1, PTZ5_FN), |
| 1064 | PINMUX_DATA(ON_DQ5_MARK, PS8_13_FN2, PTZ5_FN), |
| 1065 | PINMUX_DATA(MMCDAT4_MARK, PS8_12_FN1, PTZ4_FN), |
| 1066 | PINMUX_DATA(ON_DQ4_MARK, PS8_12_FN2, PTZ4_FN), |
| 1067 | PINMUX_DATA(MMCDAT3_MARK, PS8_11_FN1, PTZ3_FN), |
| 1068 | PINMUX_DATA(ON_DQ3_MARK, PS8_11_FN2, PTZ3_FN), |
| 1069 | PINMUX_DATA(MMCDAT2_MARK, PS8_10_FN1, PTZ2_FN), |
| 1070 | PINMUX_DATA(ON_DQ2_MARK, PS8_10_FN2, PTZ2_FN), |
| 1071 | PINMUX_DATA(MMCDAT1_MARK, PS8_9_FN1, PTZ1_FN), |
| 1072 | PINMUX_DATA(ON_DQ1_MARK, PS8_9_FN2, PTZ1_FN), |
| 1073 | PINMUX_DATA(MMCDAT0_MARK, PS8_8_FN1, PTZ0_FN), |
| 1074 | PINMUX_DATA(ON_DQ0_MARK, PS8_8_FN2, PTZ0_FN), |
| 1075 | }; |
| 1076 | |
Laurent Pinchart | a3db40a | 2013-01-02 14:53:37 +0100 | [diff] [blame] | 1077 | static struct sh_pfc_pin pinmux_pins[] = { |
Laurent Pinchart | 0bb9267 | 2012-12-15 23:51:37 +0100 | [diff] [blame] | 1078 | /* PTA */ |
Laurent Pinchart | 7cbb0e5 | 2013-07-15 21:16:25 +0200 | [diff] [blame^] | 1079 | PINMUX_GPIO(PTA7), |
| 1080 | PINMUX_GPIO(PTA6), |
| 1081 | PINMUX_GPIO(PTA5), |
| 1082 | PINMUX_GPIO(PTA4), |
| 1083 | PINMUX_GPIO(PTA3), |
| 1084 | PINMUX_GPIO(PTA2), |
| 1085 | PINMUX_GPIO(PTA1), |
| 1086 | PINMUX_GPIO(PTA0), |
Laurent Pinchart | 0bb9267 | 2012-12-15 23:51:37 +0100 | [diff] [blame] | 1087 | |
| 1088 | /* PTB */ |
Laurent Pinchart | 7cbb0e5 | 2013-07-15 21:16:25 +0200 | [diff] [blame^] | 1089 | PINMUX_GPIO(PTB7), |
| 1090 | PINMUX_GPIO(PTB6), |
| 1091 | PINMUX_GPIO(PTB5), |
| 1092 | PINMUX_GPIO(PTB4), |
| 1093 | PINMUX_GPIO(PTB3), |
| 1094 | PINMUX_GPIO(PTB2), |
| 1095 | PINMUX_GPIO(PTB1), |
| 1096 | PINMUX_GPIO(PTB0), |
Laurent Pinchart | 0bb9267 | 2012-12-15 23:51:37 +0100 | [diff] [blame] | 1097 | |
| 1098 | /* PTC */ |
Laurent Pinchart | 7cbb0e5 | 2013-07-15 21:16:25 +0200 | [diff] [blame^] | 1099 | PINMUX_GPIO(PTC7), |
| 1100 | PINMUX_GPIO(PTC6), |
| 1101 | PINMUX_GPIO(PTC5), |
| 1102 | PINMUX_GPIO(PTC4), |
| 1103 | PINMUX_GPIO(PTC3), |
| 1104 | PINMUX_GPIO(PTC2), |
| 1105 | PINMUX_GPIO(PTC1), |
| 1106 | PINMUX_GPIO(PTC0), |
Laurent Pinchart | 0bb9267 | 2012-12-15 23:51:37 +0100 | [diff] [blame] | 1107 | |
| 1108 | /* PTD */ |
Laurent Pinchart | 7cbb0e5 | 2013-07-15 21:16:25 +0200 | [diff] [blame^] | 1109 | PINMUX_GPIO(PTD7), |
| 1110 | PINMUX_GPIO(PTD6), |
| 1111 | PINMUX_GPIO(PTD5), |
| 1112 | PINMUX_GPIO(PTD4), |
| 1113 | PINMUX_GPIO(PTD3), |
| 1114 | PINMUX_GPIO(PTD2), |
| 1115 | PINMUX_GPIO(PTD1), |
| 1116 | PINMUX_GPIO(PTD0), |
Laurent Pinchart | 0bb9267 | 2012-12-15 23:51:37 +0100 | [diff] [blame] | 1117 | |
| 1118 | /* PTE */ |
Laurent Pinchart | 7cbb0e5 | 2013-07-15 21:16:25 +0200 | [diff] [blame^] | 1119 | PINMUX_GPIO(PTE7), |
| 1120 | PINMUX_GPIO(PTE6), |
| 1121 | PINMUX_GPIO(PTE5), |
| 1122 | PINMUX_GPIO(PTE4), |
| 1123 | PINMUX_GPIO(PTE3), |
| 1124 | PINMUX_GPIO(PTE2), |
| 1125 | PINMUX_GPIO(PTE1), |
| 1126 | PINMUX_GPIO(PTE0), |
Laurent Pinchart | 0bb9267 | 2012-12-15 23:51:37 +0100 | [diff] [blame] | 1127 | |
| 1128 | /* PTF */ |
Laurent Pinchart | 7cbb0e5 | 2013-07-15 21:16:25 +0200 | [diff] [blame^] | 1129 | PINMUX_GPIO(PTF7), |
| 1130 | PINMUX_GPIO(PTF6), |
| 1131 | PINMUX_GPIO(PTF5), |
| 1132 | PINMUX_GPIO(PTF4), |
| 1133 | PINMUX_GPIO(PTF3), |
| 1134 | PINMUX_GPIO(PTF2), |
| 1135 | PINMUX_GPIO(PTF1), |
| 1136 | PINMUX_GPIO(PTF0), |
Laurent Pinchart | 0bb9267 | 2012-12-15 23:51:37 +0100 | [diff] [blame] | 1137 | |
| 1138 | /* PTG */ |
Laurent Pinchart | 7cbb0e5 | 2013-07-15 21:16:25 +0200 | [diff] [blame^] | 1139 | PINMUX_GPIO(PTG7), |
| 1140 | PINMUX_GPIO(PTG6), |
| 1141 | PINMUX_GPIO(PTG5), |
| 1142 | PINMUX_GPIO(PTG4), |
| 1143 | PINMUX_GPIO(PTG3), |
| 1144 | PINMUX_GPIO(PTG2), |
| 1145 | PINMUX_GPIO(PTG1), |
| 1146 | PINMUX_GPIO(PTG0), |
Laurent Pinchart | 0bb9267 | 2012-12-15 23:51:37 +0100 | [diff] [blame] | 1147 | |
| 1148 | /* PTH */ |
Laurent Pinchart | 7cbb0e5 | 2013-07-15 21:16:25 +0200 | [diff] [blame^] | 1149 | PINMUX_GPIO(PTH7), |
| 1150 | PINMUX_GPIO(PTH6), |
| 1151 | PINMUX_GPIO(PTH5), |
| 1152 | PINMUX_GPIO(PTH4), |
| 1153 | PINMUX_GPIO(PTH3), |
| 1154 | PINMUX_GPIO(PTH2), |
| 1155 | PINMUX_GPIO(PTH1), |
| 1156 | PINMUX_GPIO(PTH0), |
Laurent Pinchart | 0bb9267 | 2012-12-15 23:51:37 +0100 | [diff] [blame] | 1157 | |
| 1158 | /* PTI */ |
Laurent Pinchart | 7cbb0e5 | 2013-07-15 21:16:25 +0200 | [diff] [blame^] | 1159 | PINMUX_GPIO(PTI7), |
| 1160 | PINMUX_GPIO(PTI6), |
| 1161 | PINMUX_GPIO(PTI5), |
| 1162 | PINMUX_GPIO(PTI4), |
| 1163 | PINMUX_GPIO(PTI3), |
| 1164 | PINMUX_GPIO(PTI2), |
| 1165 | PINMUX_GPIO(PTI1), |
| 1166 | PINMUX_GPIO(PTI0), |
Laurent Pinchart | 0bb9267 | 2012-12-15 23:51:37 +0100 | [diff] [blame] | 1167 | |
| 1168 | /* PTJ */ |
Laurent Pinchart | 7cbb0e5 | 2013-07-15 21:16:25 +0200 | [diff] [blame^] | 1169 | PINMUX_GPIO(PTJ6), |
| 1170 | PINMUX_GPIO(PTJ5), |
| 1171 | PINMUX_GPIO(PTJ4), |
| 1172 | PINMUX_GPIO(PTJ3), |
| 1173 | PINMUX_GPIO(PTJ2), |
| 1174 | PINMUX_GPIO(PTJ1), |
| 1175 | PINMUX_GPIO(PTJ0), |
Laurent Pinchart | 0bb9267 | 2012-12-15 23:51:37 +0100 | [diff] [blame] | 1176 | |
| 1177 | /* PTK */ |
Laurent Pinchart | 7cbb0e5 | 2013-07-15 21:16:25 +0200 | [diff] [blame^] | 1178 | PINMUX_GPIO(PTK7), |
| 1179 | PINMUX_GPIO(PTK6), |
| 1180 | PINMUX_GPIO(PTK5), |
| 1181 | PINMUX_GPIO(PTK4), |
| 1182 | PINMUX_GPIO(PTK3), |
| 1183 | PINMUX_GPIO(PTK2), |
| 1184 | PINMUX_GPIO(PTK1), |
| 1185 | PINMUX_GPIO(PTK0), |
Laurent Pinchart | 0bb9267 | 2012-12-15 23:51:37 +0100 | [diff] [blame] | 1186 | |
| 1187 | /* PTL */ |
Laurent Pinchart | 7cbb0e5 | 2013-07-15 21:16:25 +0200 | [diff] [blame^] | 1188 | PINMUX_GPIO(PTL6), |
| 1189 | PINMUX_GPIO(PTL5), |
| 1190 | PINMUX_GPIO(PTL4), |
| 1191 | PINMUX_GPIO(PTL3), |
| 1192 | PINMUX_GPIO(PTL2), |
| 1193 | PINMUX_GPIO(PTL1), |
| 1194 | PINMUX_GPIO(PTL0), |
Laurent Pinchart | 0bb9267 | 2012-12-15 23:51:37 +0100 | [diff] [blame] | 1195 | |
| 1196 | /* PTM */ |
Laurent Pinchart | 7cbb0e5 | 2013-07-15 21:16:25 +0200 | [diff] [blame^] | 1197 | PINMUX_GPIO(PTM7), |
| 1198 | PINMUX_GPIO(PTM6), |
| 1199 | PINMUX_GPIO(PTM5), |
| 1200 | PINMUX_GPIO(PTM4), |
| 1201 | PINMUX_GPIO(PTM3), |
| 1202 | PINMUX_GPIO(PTM2), |
| 1203 | PINMUX_GPIO(PTM1), |
| 1204 | PINMUX_GPIO(PTM0), |
Laurent Pinchart | 0bb9267 | 2012-12-15 23:51:37 +0100 | [diff] [blame] | 1205 | |
| 1206 | /* PTN */ |
Laurent Pinchart | 7cbb0e5 | 2013-07-15 21:16:25 +0200 | [diff] [blame^] | 1207 | PINMUX_GPIO(PTN6), |
| 1208 | PINMUX_GPIO(PTN5), |
| 1209 | PINMUX_GPIO(PTN4), |
| 1210 | PINMUX_GPIO(PTN3), |
| 1211 | PINMUX_GPIO(PTN2), |
| 1212 | PINMUX_GPIO(PTN1), |
| 1213 | PINMUX_GPIO(PTN0), |
Laurent Pinchart | 0bb9267 | 2012-12-15 23:51:37 +0100 | [diff] [blame] | 1214 | |
| 1215 | /* PTO */ |
Laurent Pinchart | 7cbb0e5 | 2013-07-15 21:16:25 +0200 | [diff] [blame^] | 1216 | PINMUX_GPIO(PTO7), |
| 1217 | PINMUX_GPIO(PTO6), |
| 1218 | PINMUX_GPIO(PTO5), |
| 1219 | PINMUX_GPIO(PTO4), |
| 1220 | PINMUX_GPIO(PTO3), |
| 1221 | PINMUX_GPIO(PTO2), |
| 1222 | PINMUX_GPIO(PTO1), |
| 1223 | PINMUX_GPIO(PTO0), |
Laurent Pinchart | 0bb9267 | 2012-12-15 23:51:37 +0100 | [diff] [blame] | 1224 | |
| 1225 | /* PTP */ |
Laurent Pinchart | 7cbb0e5 | 2013-07-15 21:16:25 +0200 | [diff] [blame^] | 1226 | PINMUX_GPIO(PTP7), |
| 1227 | PINMUX_GPIO(PTP6), |
| 1228 | PINMUX_GPIO(PTP5), |
| 1229 | PINMUX_GPIO(PTP4), |
| 1230 | PINMUX_GPIO(PTP3), |
| 1231 | PINMUX_GPIO(PTP2), |
| 1232 | PINMUX_GPIO(PTP1), |
| 1233 | PINMUX_GPIO(PTP0), |
Laurent Pinchart | 0bb9267 | 2012-12-15 23:51:37 +0100 | [diff] [blame] | 1234 | |
| 1235 | /* PTQ */ |
Laurent Pinchart | 7cbb0e5 | 2013-07-15 21:16:25 +0200 | [diff] [blame^] | 1236 | PINMUX_GPIO(PTQ6), |
| 1237 | PINMUX_GPIO(PTQ5), |
| 1238 | PINMUX_GPIO(PTQ4), |
| 1239 | PINMUX_GPIO(PTQ3), |
| 1240 | PINMUX_GPIO(PTQ2), |
| 1241 | PINMUX_GPIO(PTQ1), |
| 1242 | PINMUX_GPIO(PTQ0), |
Laurent Pinchart | 0bb9267 | 2012-12-15 23:51:37 +0100 | [diff] [blame] | 1243 | |
| 1244 | /* PTR */ |
Laurent Pinchart | 7cbb0e5 | 2013-07-15 21:16:25 +0200 | [diff] [blame^] | 1245 | PINMUX_GPIO(PTR7), |
| 1246 | PINMUX_GPIO(PTR6), |
| 1247 | PINMUX_GPIO(PTR5), |
| 1248 | PINMUX_GPIO(PTR4), |
| 1249 | PINMUX_GPIO(PTR3), |
| 1250 | PINMUX_GPIO(PTR2), |
| 1251 | PINMUX_GPIO(PTR1), |
| 1252 | PINMUX_GPIO(PTR0), |
Laurent Pinchart | 0bb9267 | 2012-12-15 23:51:37 +0100 | [diff] [blame] | 1253 | |
| 1254 | /* PTS */ |
Laurent Pinchart | 7cbb0e5 | 2013-07-15 21:16:25 +0200 | [diff] [blame^] | 1255 | PINMUX_GPIO(PTS7), |
| 1256 | PINMUX_GPIO(PTS6), |
| 1257 | PINMUX_GPIO(PTS5), |
| 1258 | PINMUX_GPIO(PTS4), |
| 1259 | PINMUX_GPIO(PTS3), |
| 1260 | PINMUX_GPIO(PTS2), |
| 1261 | PINMUX_GPIO(PTS1), |
| 1262 | PINMUX_GPIO(PTS0), |
Laurent Pinchart | 0bb9267 | 2012-12-15 23:51:37 +0100 | [diff] [blame] | 1263 | |
| 1264 | /* PTT */ |
Laurent Pinchart | 7cbb0e5 | 2013-07-15 21:16:25 +0200 | [diff] [blame^] | 1265 | PINMUX_GPIO(PTT7), |
| 1266 | PINMUX_GPIO(PTT6), |
| 1267 | PINMUX_GPIO(PTT5), |
| 1268 | PINMUX_GPIO(PTT4), |
| 1269 | PINMUX_GPIO(PTT3), |
| 1270 | PINMUX_GPIO(PTT2), |
| 1271 | PINMUX_GPIO(PTT1), |
| 1272 | PINMUX_GPIO(PTT0), |
Laurent Pinchart | 0bb9267 | 2012-12-15 23:51:37 +0100 | [diff] [blame] | 1273 | |
| 1274 | /* PTU */ |
Laurent Pinchart | 7cbb0e5 | 2013-07-15 21:16:25 +0200 | [diff] [blame^] | 1275 | PINMUX_GPIO(PTU7), |
| 1276 | PINMUX_GPIO(PTU6), |
| 1277 | PINMUX_GPIO(PTU5), |
| 1278 | PINMUX_GPIO(PTU4), |
| 1279 | PINMUX_GPIO(PTU3), |
| 1280 | PINMUX_GPIO(PTU2), |
| 1281 | PINMUX_GPIO(PTU1), |
| 1282 | PINMUX_GPIO(PTU0), |
Laurent Pinchart | 0bb9267 | 2012-12-15 23:51:37 +0100 | [diff] [blame] | 1283 | |
| 1284 | /* PTV */ |
Laurent Pinchart | 7cbb0e5 | 2013-07-15 21:16:25 +0200 | [diff] [blame^] | 1285 | PINMUX_GPIO(PTV7), |
| 1286 | PINMUX_GPIO(PTV6), |
| 1287 | PINMUX_GPIO(PTV5), |
| 1288 | PINMUX_GPIO(PTV4), |
| 1289 | PINMUX_GPIO(PTV3), |
| 1290 | PINMUX_GPIO(PTV2), |
| 1291 | PINMUX_GPIO(PTV1), |
| 1292 | PINMUX_GPIO(PTV0), |
Laurent Pinchart | 0bb9267 | 2012-12-15 23:51:37 +0100 | [diff] [blame] | 1293 | |
| 1294 | /* PTW */ |
Laurent Pinchart | 7cbb0e5 | 2013-07-15 21:16:25 +0200 | [diff] [blame^] | 1295 | PINMUX_GPIO(PTW7), |
| 1296 | PINMUX_GPIO(PTW6), |
| 1297 | PINMUX_GPIO(PTW5), |
| 1298 | PINMUX_GPIO(PTW4), |
| 1299 | PINMUX_GPIO(PTW3), |
| 1300 | PINMUX_GPIO(PTW2), |
| 1301 | PINMUX_GPIO(PTW1), |
| 1302 | PINMUX_GPIO(PTW0), |
Laurent Pinchart | 0bb9267 | 2012-12-15 23:51:37 +0100 | [diff] [blame] | 1303 | |
| 1304 | /* PTX */ |
Laurent Pinchart | 7cbb0e5 | 2013-07-15 21:16:25 +0200 | [diff] [blame^] | 1305 | PINMUX_GPIO(PTX7), |
| 1306 | PINMUX_GPIO(PTX6), |
| 1307 | PINMUX_GPIO(PTX5), |
| 1308 | PINMUX_GPIO(PTX4), |
| 1309 | PINMUX_GPIO(PTX3), |
| 1310 | PINMUX_GPIO(PTX2), |
| 1311 | PINMUX_GPIO(PTX1), |
| 1312 | PINMUX_GPIO(PTX0), |
Laurent Pinchart | 0bb9267 | 2012-12-15 23:51:37 +0100 | [diff] [blame] | 1313 | |
| 1314 | /* PTY */ |
Laurent Pinchart | 7cbb0e5 | 2013-07-15 21:16:25 +0200 | [diff] [blame^] | 1315 | PINMUX_GPIO(PTY7), |
| 1316 | PINMUX_GPIO(PTY6), |
| 1317 | PINMUX_GPIO(PTY5), |
| 1318 | PINMUX_GPIO(PTY4), |
| 1319 | PINMUX_GPIO(PTY3), |
| 1320 | PINMUX_GPIO(PTY2), |
| 1321 | PINMUX_GPIO(PTY1), |
| 1322 | PINMUX_GPIO(PTY0), |
Laurent Pinchart | 0bb9267 | 2012-12-15 23:51:37 +0100 | [diff] [blame] | 1323 | |
| 1324 | /* PTZ */ |
Laurent Pinchart | 7cbb0e5 | 2013-07-15 21:16:25 +0200 | [diff] [blame^] | 1325 | PINMUX_GPIO(PTZ7), |
| 1326 | PINMUX_GPIO(PTZ6), |
| 1327 | PINMUX_GPIO(PTZ5), |
| 1328 | PINMUX_GPIO(PTZ4), |
| 1329 | PINMUX_GPIO(PTZ3), |
| 1330 | PINMUX_GPIO(PTZ2), |
| 1331 | PINMUX_GPIO(PTZ1), |
| 1332 | PINMUX_GPIO(PTZ0), |
Laurent Pinchart | a373ed0 | 2012-11-29 13:24:07 +0100 | [diff] [blame] | 1333 | }; |
Laurent Pinchart | 0bb9267 | 2012-12-15 23:51:37 +0100 | [diff] [blame] | 1334 | |
Laurent Pinchart | a373ed0 | 2012-11-29 13:24:07 +0100 | [diff] [blame] | 1335 | #define PINMUX_FN_BASE ARRAY_SIZE(pinmux_pins) |
| 1336 | |
Laurent Pinchart | cd3c1be | 2013-02-16 18:47:05 +0100 | [diff] [blame] | 1337 | static const struct pinmux_func pinmux_func_gpios[] = { |
Laurent Pinchart | 0bb9267 | 2012-12-15 23:51:37 +0100 | [diff] [blame] | 1338 | /* PTA (mobule: LBSC, RGMII) */ |
Laurent Pinchart | 35ad427 | 2012-11-28 22:05:49 +0100 | [diff] [blame] | 1339 | GPIO_FN(BS), |
| 1340 | GPIO_FN(RDWR), |
| 1341 | GPIO_FN(WE1), |
| 1342 | GPIO_FN(RDY), |
| 1343 | GPIO_FN(ET0_MDC), |
| 1344 | GPIO_FN(ET0_MDIO), |
| 1345 | GPIO_FN(ET1_MDC), |
| 1346 | GPIO_FN(ET1_MDIO), |
Laurent Pinchart | 0bb9267 | 2012-12-15 23:51:37 +0100 | [diff] [blame] | 1347 | |
| 1348 | /* PTB (mobule: INTC, ONFI, TMU) */ |
Laurent Pinchart | 35ad427 | 2012-11-28 22:05:49 +0100 | [diff] [blame] | 1349 | GPIO_FN(IRQ15), |
| 1350 | GPIO_FN(IRQ14), |
| 1351 | GPIO_FN(IRQ13), |
| 1352 | GPIO_FN(IRQ12), |
| 1353 | GPIO_FN(IRQ11), |
| 1354 | GPIO_FN(IRQ10), |
| 1355 | GPIO_FN(IRQ9), |
| 1356 | GPIO_FN(IRQ8), |
| 1357 | GPIO_FN(ON_NRE), |
| 1358 | GPIO_FN(ON_NWE), |
| 1359 | GPIO_FN(ON_NWP), |
| 1360 | GPIO_FN(ON_NCE0), |
| 1361 | GPIO_FN(ON_R_B0), |
| 1362 | GPIO_FN(ON_ALE), |
| 1363 | GPIO_FN(ON_CLE), |
| 1364 | GPIO_FN(TCLK), |
Laurent Pinchart | 0bb9267 | 2012-12-15 23:51:37 +0100 | [diff] [blame] | 1365 | |
| 1366 | /* PTC (mobule: IRQ, PWMU) */ |
Laurent Pinchart | 35ad427 | 2012-11-28 22:05:49 +0100 | [diff] [blame] | 1367 | GPIO_FN(IRQ7), |
| 1368 | GPIO_FN(IRQ6), |
| 1369 | GPIO_FN(IRQ5), |
| 1370 | GPIO_FN(IRQ4), |
| 1371 | GPIO_FN(IRQ3), |
| 1372 | GPIO_FN(IRQ2), |
| 1373 | GPIO_FN(IRQ1), |
| 1374 | GPIO_FN(IRQ0), |
| 1375 | GPIO_FN(PWMU0), |
| 1376 | GPIO_FN(PWMU1), |
| 1377 | GPIO_FN(PWMU2), |
| 1378 | GPIO_FN(PWMU3), |
| 1379 | GPIO_FN(PWMU4), |
| 1380 | GPIO_FN(PWMU5), |
Laurent Pinchart | 0bb9267 | 2012-12-15 23:51:37 +0100 | [diff] [blame] | 1381 | |
| 1382 | /* PTD (mobule: SPI0, DMAC) */ |
Laurent Pinchart | 35ad427 | 2012-11-28 22:05:49 +0100 | [diff] [blame] | 1383 | GPIO_FN(SP0_MOSI), |
| 1384 | GPIO_FN(SP0_MISO), |
| 1385 | GPIO_FN(SP0_SCK), |
| 1386 | GPIO_FN(SP0_SCK_FB), |
| 1387 | GPIO_FN(SP0_SS0), |
| 1388 | GPIO_FN(SP0_SS1), |
| 1389 | GPIO_FN(SP0_SS2), |
| 1390 | GPIO_FN(SP0_SS3), |
| 1391 | GPIO_FN(DREQ0), |
| 1392 | GPIO_FN(DACK0), |
| 1393 | GPIO_FN(TEND0), |
Laurent Pinchart | 0bb9267 | 2012-12-15 23:51:37 +0100 | [diff] [blame] | 1394 | |
| 1395 | /* PTE (mobule: RMII) */ |
Laurent Pinchart | 35ad427 | 2012-11-28 22:05:49 +0100 | [diff] [blame] | 1396 | GPIO_FN(RMII0_CRS_DV), |
| 1397 | GPIO_FN(RMII0_TXD1), |
| 1398 | GPIO_FN(RMII0_TXD0), |
| 1399 | GPIO_FN(RMII0_TXEN), |
| 1400 | GPIO_FN(RMII0_REFCLK), |
| 1401 | GPIO_FN(RMII0_RXD1), |
| 1402 | GPIO_FN(RMII0_RXD0), |
| 1403 | GPIO_FN(RMII0_RX_ER), |
Laurent Pinchart | 0bb9267 | 2012-12-15 23:51:37 +0100 | [diff] [blame] | 1404 | |
| 1405 | /* PTF (mobule: RMII, SerMux) */ |
Laurent Pinchart | 35ad427 | 2012-11-28 22:05:49 +0100 | [diff] [blame] | 1406 | GPIO_FN(RMII1_CRS_DV), |
| 1407 | GPIO_FN(RMII1_TXD1), |
| 1408 | GPIO_FN(RMII1_TXD0), |
| 1409 | GPIO_FN(RMII1_TXEN), |
| 1410 | GPIO_FN(RMII1_REFCLK), |
| 1411 | GPIO_FN(RMII1_RXD1), |
| 1412 | GPIO_FN(RMII1_RXD0), |
| 1413 | GPIO_FN(RMII1_RX_ER), |
| 1414 | GPIO_FN(RAC_RI), |
Laurent Pinchart | 0bb9267 | 2012-12-15 23:51:37 +0100 | [diff] [blame] | 1415 | |
| 1416 | /* PTG (mobule: system, LBSC, LPC, WDT, LPC, eMMC) */ |
Laurent Pinchart | 35ad427 | 2012-11-28 22:05:49 +0100 | [diff] [blame] | 1417 | GPIO_FN(BOOTFMS), |
| 1418 | GPIO_FN(BOOTWP), |
| 1419 | GPIO_FN(A25), |
| 1420 | GPIO_FN(A24), |
| 1421 | GPIO_FN(SERIRQ), |
| 1422 | GPIO_FN(WDTOVF), |
| 1423 | GPIO_FN(LPCPD), |
| 1424 | GPIO_FN(LDRQ), |
| 1425 | GPIO_FN(MMCCLK), |
| 1426 | GPIO_FN(MMCCMD), |
Laurent Pinchart | 0bb9267 | 2012-12-15 23:51:37 +0100 | [diff] [blame] | 1427 | |
| 1428 | /* PTH (mobule: SPI1, LPC, DMAC, ADC) */ |
Laurent Pinchart | 35ad427 | 2012-11-28 22:05:49 +0100 | [diff] [blame] | 1429 | GPIO_FN(SP1_MOSI), |
| 1430 | GPIO_FN(SP1_MISO), |
| 1431 | GPIO_FN(SP1_SCK), |
| 1432 | GPIO_FN(SP1_SCK_FB), |
| 1433 | GPIO_FN(SP1_SS0), |
| 1434 | GPIO_FN(SP1_SS1), |
| 1435 | GPIO_FN(WP), |
| 1436 | GPIO_FN(FMS0), |
| 1437 | GPIO_FN(TEND1), |
| 1438 | GPIO_FN(DREQ1), |
| 1439 | GPIO_FN(DACK1), |
| 1440 | GPIO_FN(ADTRG1), |
| 1441 | GPIO_FN(ADTRG0), |
Laurent Pinchart | 0bb9267 | 2012-12-15 23:51:37 +0100 | [diff] [blame] | 1442 | |
| 1443 | /* PTI (mobule: LBSC, SDHI) */ |
Laurent Pinchart | 35ad427 | 2012-11-28 22:05:49 +0100 | [diff] [blame] | 1444 | GPIO_FN(D15), |
| 1445 | GPIO_FN(D14), |
| 1446 | GPIO_FN(D13), |
| 1447 | GPIO_FN(D12), |
| 1448 | GPIO_FN(D11), |
| 1449 | GPIO_FN(D10), |
| 1450 | GPIO_FN(D9), |
| 1451 | GPIO_FN(D8), |
| 1452 | GPIO_FN(SD_WP), |
| 1453 | GPIO_FN(SD_CD), |
| 1454 | GPIO_FN(SD_CLK), |
| 1455 | GPIO_FN(SD_CMD), |
| 1456 | GPIO_FN(SD_D3), |
| 1457 | GPIO_FN(SD_D2), |
| 1458 | GPIO_FN(SD_D1), |
| 1459 | GPIO_FN(SD_D0), |
Laurent Pinchart | 0bb9267 | 2012-12-15 23:51:37 +0100 | [diff] [blame] | 1460 | |
| 1461 | /* PTJ (mobule: SCIF234, SERMUX) */ |
Laurent Pinchart | 35ad427 | 2012-11-28 22:05:49 +0100 | [diff] [blame] | 1462 | GPIO_FN(RTS3), |
| 1463 | GPIO_FN(CTS3), |
| 1464 | GPIO_FN(TXD3), |
| 1465 | GPIO_FN(RXD3), |
| 1466 | GPIO_FN(RTS4), |
| 1467 | GPIO_FN(RXD4), |
| 1468 | GPIO_FN(TXD4), |
Laurent Pinchart | 0bb9267 | 2012-12-15 23:51:37 +0100 | [diff] [blame] | 1469 | |
| 1470 | /* PTK (mobule: SERMUX, LBSC, SCIF) */ |
Laurent Pinchart | 35ad427 | 2012-11-28 22:05:49 +0100 | [diff] [blame] | 1471 | GPIO_FN(COM2_TXD), |
| 1472 | GPIO_FN(COM2_RXD), |
| 1473 | GPIO_FN(COM2_RTS), |
| 1474 | GPIO_FN(COM2_CTS), |
| 1475 | GPIO_FN(COM2_DTR), |
| 1476 | GPIO_FN(COM2_DSR), |
| 1477 | GPIO_FN(COM2_DCD), |
| 1478 | GPIO_FN(CLKOUT), |
| 1479 | GPIO_FN(SCK2), |
| 1480 | GPIO_FN(SCK4), |
| 1481 | GPIO_FN(SCK3), |
Laurent Pinchart | 0bb9267 | 2012-12-15 23:51:37 +0100 | [diff] [blame] | 1482 | |
| 1483 | /* PTL (mobule: SERMUX, SCIF, LBSC, AUD) */ |
Laurent Pinchart | 35ad427 | 2012-11-28 22:05:49 +0100 | [diff] [blame] | 1484 | GPIO_FN(RAC_RXD), |
| 1485 | GPIO_FN(RAC_RTS), |
| 1486 | GPIO_FN(RAC_CTS), |
| 1487 | GPIO_FN(RAC_DTR), |
| 1488 | GPIO_FN(RAC_DSR), |
| 1489 | GPIO_FN(RAC_DCD), |
| 1490 | GPIO_FN(RAC_TXD), |
| 1491 | GPIO_FN(RXD2), |
| 1492 | GPIO_FN(CS5), |
| 1493 | GPIO_FN(CS6), |
| 1494 | GPIO_FN(AUDSYNC), |
| 1495 | GPIO_FN(AUDCK), |
| 1496 | GPIO_FN(TXD2), |
Laurent Pinchart | 0bb9267 | 2012-12-15 23:51:37 +0100 | [diff] [blame] | 1497 | |
| 1498 | /* PTM (mobule: LBSC, IIC) */ |
Laurent Pinchart | 35ad427 | 2012-11-28 22:05:49 +0100 | [diff] [blame] | 1499 | GPIO_FN(CS4), |
| 1500 | GPIO_FN(RD), |
| 1501 | GPIO_FN(WE0), |
| 1502 | GPIO_FN(CS0), |
| 1503 | GPIO_FN(SDA6), |
| 1504 | GPIO_FN(SCL6), |
| 1505 | GPIO_FN(SDA7), |
| 1506 | GPIO_FN(SCL7), |
Laurent Pinchart | 0bb9267 | 2012-12-15 23:51:37 +0100 | [diff] [blame] | 1507 | |
| 1508 | /* PTN (mobule: USB, JMC, SGPIO, WDT) */ |
Laurent Pinchart | 35ad427 | 2012-11-28 22:05:49 +0100 | [diff] [blame] | 1509 | GPIO_FN(VBUS_EN), |
| 1510 | GPIO_FN(VBUS_OC), |
| 1511 | GPIO_FN(JMCTCK), |
| 1512 | GPIO_FN(JMCTMS), |
| 1513 | GPIO_FN(JMCTDO), |
| 1514 | GPIO_FN(JMCTDI), |
| 1515 | GPIO_FN(JMCTRST), |
| 1516 | GPIO_FN(SGPIO1_CLK), |
| 1517 | GPIO_FN(SGPIO1_LOAD), |
| 1518 | GPIO_FN(SGPIO1_DI), |
| 1519 | GPIO_FN(SGPIO1_DO), |
| 1520 | GPIO_FN(SUB_CLKIN), |
Laurent Pinchart | 0bb9267 | 2012-12-15 23:51:37 +0100 | [diff] [blame] | 1521 | |
| 1522 | /* PTO (mobule: SGPIO, SerMux) */ |
Laurent Pinchart | 35ad427 | 2012-11-28 22:05:49 +0100 | [diff] [blame] | 1523 | GPIO_FN(SGPIO0_CLK), |
| 1524 | GPIO_FN(SGPIO0_LOAD), |
| 1525 | GPIO_FN(SGPIO0_DI), |
| 1526 | GPIO_FN(SGPIO0_DO), |
| 1527 | GPIO_FN(SGPIO2_CLK), |
| 1528 | GPIO_FN(SGPIO2_LOAD), |
| 1529 | GPIO_FN(SGPIO2_DI), |
| 1530 | GPIO_FN(SGPIO2_DO), |
| 1531 | GPIO_FN(COM1_TXD), |
| 1532 | GPIO_FN(COM1_RXD), |
| 1533 | GPIO_FN(COM1_RTS), |
| 1534 | GPIO_FN(COM1_CTS), |
Laurent Pinchart | 0bb9267 | 2012-12-15 23:51:37 +0100 | [diff] [blame] | 1535 | |
| 1536 | /* PTP (mobule: EVC, ADC) */ |
| 1537 | |
| 1538 | /* PTQ (mobule: LPC) */ |
Laurent Pinchart | 35ad427 | 2012-11-28 22:05:49 +0100 | [diff] [blame] | 1539 | GPIO_FN(LAD3), |
| 1540 | GPIO_FN(LAD2), |
| 1541 | GPIO_FN(LAD1), |
| 1542 | GPIO_FN(LAD0), |
| 1543 | GPIO_FN(LFRAME), |
| 1544 | GPIO_FN(LRESET), |
| 1545 | GPIO_FN(LCLK), |
Laurent Pinchart | 0bb9267 | 2012-12-15 23:51:37 +0100 | [diff] [blame] | 1546 | |
| 1547 | /* PTR (mobule: GRA, IIC) */ |
Laurent Pinchart | 35ad427 | 2012-11-28 22:05:49 +0100 | [diff] [blame] | 1548 | GPIO_FN(DDC3), |
| 1549 | GPIO_FN(DDC2), |
| 1550 | GPIO_FN(SDA8), |
| 1551 | GPIO_FN(SCL8), |
| 1552 | GPIO_FN(SDA2), |
| 1553 | GPIO_FN(SCL2), |
| 1554 | GPIO_FN(SDA1), |
| 1555 | GPIO_FN(SCL1), |
| 1556 | GPIO_FN(SDA0), |
| 1557 | GPIO_FN(SCL0), |
Laurent Pinchart | 0bb9267 | 2012-12-15 23:51:37 +0100 | [diff] [blame] | 1558 | |
| 1559 | /* PTS (mobule: GRA, IIC) */ |
Laurent Pinchart | 35ad427 | 2012-11-28 22:05:49 +0100 | [diff] [blame] | 1560 | GPIO_FN(DDC1), |
| 1561 | GPIO_FN(DDC0), |
| 1562 | GPIO_FN(SDA9), |
| 1563 | GPIO_FN(SCL9), |
| 1564 | GPIO_FN(SDA5), |
| 1565 | GPIO_FN(SCL5), |
| 1566 | GPIO_FN(SDA4), |
| 1567 | GPIO_FN(SCL4), |
| 1568 | GPIO_FN(SDA3), |
| 1569 | GPIO_FN(SCL3), |
Laurent Pinchart | 0bb9267 | 2012-12-15 23:51:37 +0100 | [diff] [blame] | 1570 | |
| 1571 | /* PTT (mobule: PWMX, AUD) */ |
Laurent Pinchart | 35ad427 | 2012-11-28 22:05:49 +0100 | [diff] [blame] | 1572 | GPIO_FN(PWMX7), |
| 1573 | GPIO_FN(PWMX6), |
| 1574 | GPIO_FN(PWMX5), |
| 1575 | GPIO_FN(PWMX4), |
| 1576 | GPIO_FN(PWMX3), |
| 1577 | GPIO_FN(PWMX2), |
| 1578 | GPIO_FN(PWMX1), |
| 1579 | GPIO_FN(PWMX0), |
| 1580 | GPIO_FN(AUDATA3), |
| 1581 | GPIO_FN(AUDATA2), |
| 1582 | GPIO_FN(AUDATA1), |
| 1583 | GPIO_FN(AUDATA0), |
| 1584 | GPIO_FN(STATUS1), |
| 1585 | GPIO_FN(STATUS0), |
Laurent Pinchart | 0bb9267 | 2012-12-15 23:51:37 +0100 | [diff] [blame] | 1586 | |
| 1587 | /* PTU (mobule: LPC, APM) */ |
Laurent Pinchart | 35ad427 | 2012-11-28 22:05:49 +0100 | [diff] [blame] | 1588 | GPIO_FN(LGPIO7), |
| 1589 | GPIO_FN(LGPIO6), |
| 1590 | GPIO_FN(LGPIO5), |
| 1591 | GPIO_FN(LGPIO4), |
| 1592 | GPIO_FN(LGPIO3), |
| 1593 | GPIO_FN(LGPIO2), |
| 1594 | GPIO_FN(LGPIO1), |
| 1595 | GPIO_FN(LGPIO0), |
| 1596 | GPIO_FN(APMONCTL_O), |
| 1597 | GPIO_FN(APMPWBTOUT_O), |
| 1598 | GPIO_FN(APMSCI_O), |
| 1599 | GPIO_FN(APMVDDON), |
| 1600 | GPIO_FN(APMSLPBTN), |
| 1601 | GPIO_FN(APMPWRBTN), |
| 1602 | GPIO_FN(APMS5N), |
| 1603 | GPIO_FN(APMS3N), |
Laurent Pinchart | 0bb9267 | 2012-12-15 23:51:37 +0100 | [diff] [blame] | 1604 | |
| 1605 | /* PTV (mobule: LBSC, SerMux, R-SPI, EVC, GRA) */ |
Laurent Pinchart | 35ad427 | 2012-11-28 22:05:49 +0100 | [diff] [blame] | 1606 | GPIO_FN(A23), |
| 1607 | GPIO_FN(A22), |
| 1608 | GPIO_FN(A21), |
| 1609 | GPIO_FN(A20), |
| 1610 | GPIO_FN(A19), |
| 1611 | GPIO_FN(A18), |
| 1612 | GPIO_FN(A17), |
| 1613 | GPIO_FN(A16), |
| 1614 | GPIO_FN(COM2_RI), |
| 1615 | GPIO_FN(R_SPI_MOSI), |
| 1616 | GPIO_FN(R_SPI_MISO), |
| 1617 | GPIO_FN(R_SPI_RSPCK), |
| 1618 | GPIO_FN(R_SPI_SSL0), |
| 1619 | GPIO_FN(R_SPI_SSL1), |
| 1620 | GPIO_FN(EVENT7), |
| 1621 | GPIO_FN(EVENT6), |
| 1622 | GPIO_FN(VBIOS_DI), |
| 1623 | GPIO_FN(VBIOS_DO), |
| 1624 | GPIO_FN(VBIOS_CLK), |
| 1625 | GPIO_FN(VBIOS_CS), |
Laurent Pinchart | 0bb9267 | 2012-12-15 23:51:37 +0100 | [diff] [blame] | 1626 | |
| 1627 | /* PTW (mobule: LBSC, EVC, SCIF) */ |
Laurent Pinchart | 35ad427 | 2012-11-28 22:05:49 +0100 | [diff] [blame] | 1628 | GPIO_FN(A16), |
| 1629 | GPIO_FN(A15), |
| 1630 | GPIO_FN(A14), |
| 1631 | GPIO_FN(A13), |
| 1632 | GPIO_FN(A12), |
| 1633 | GPIO_FN(A11), |
| 1634 | GPIO_FN(A10), |
| 1635 | GPIO_FN(A9), |
| 1636 | GPIO_FN(A8), |
| 1637 | GPIO_FN(EVENT5), |
| 1638 | GPIO_FN(EVENT4), |
| 1639 | GPIO_FN(EVENT3), |
| 1640 | GPIO_FN(EVENT2), |
| 1641 | GPIO_FN(EVENT1), |
| 1642 | GPIO_FN(EVENT0), |
| 1643 | GPIO_FN(CTS4), |
| 1644 | GPIO_FN(CTS2), |
Laurent Pinchart | 0bb9267 | 2012-12-15 23:51:37 +0100 | [diff] [blame] | 1645 | |
| 1646 | /* PTX (mobule: LBSC) */ |
Laurent Pinchart | 35ad427 | 2012-11-28 22:05:49 +0100 | [diff] [blame] | 1647 | GPIO_FN(A7), |
| 1648 | GPIO_FN(A6), |
| 1649 | GPIO_FN(A5), |
| 1650 | GPIO_FN(A4), |
| 1651 | GPIO_FN(A3), |
| 1652 | GPIO_FN(A2), |
| 1653 | GPIO_FN(A1), |
| 1654 | GPIO_FN(A0), |
| 1655 | GPIO_FN(RTS2), |
| 1656 | GPIO_FN(SIM_D), |
| 1657 | GPIO_FN(SIM_CLK), |
| 1658 | GPIO_FN(SIM_RST), |
Laurent Pinchart | 0bb9267 | 2012-12-15 23:51:37 +0100 | [diff] [blame] | 1659 | |
| 1660 | /* PTY (mobule: LBSC) */ |
Laurent Pinchart | 35ad427 | 2012-11-28 22:05:49 +0100 | [diff] [blame] | 1661 | GPIO_FN(D7), |
| 1662 | GPIO_FN(D6), |
| 1663 | GPIO_FN(D5), |
| 1664 | GPIO_FN(D4), |
| 1665 | GPIO_FN(D3), |
| 1666 | GPIO_FN(D2), |
| 1667 | GPIO_FN(D1), |
| 1668 | GPIO_FN(D0), |
Laurent Pinchart | 0bb9267 | 2012-12-15 23:51:37 +0100 | [diff] [blame] | 1669 | |
| 1670 | /* PTZ (mobule: eMMC, ONFI) */ |
Laurent Pinchart | 35ad427 | 2012-11-28 22:05:49 +0100 | [diff] [blame] | 1671 | GPIO_FN(MMCDAT7), |
| 1672 | GPIO_FN(MMCDAT6), |
| 1673 | GPIO_FN(MMCDAT5), |
| 1674 | GPIO_FN(MMCDAT4), |
| 1675 | GPIO_FN(MMCDAT3), |
| 1676 | GPIO_FN(MMCDAT2), |
| 1677 | GPIO_FN(MMCDAT1), |
| 1678 | GPIO_FN(MMCDAT0), |
| 1679 | GPIO_FN(ON_DQ7), |
| 1680 | GPIO_FN(ON_DQ6), |
| 1681 | GPIO_FN(ON_DQ5), |
| 1682 | GPIO_FN(ON_DQ4), |
| 1683 | GPIO_FN(ON_DQ3), |
| 1684 | GPIO_FN(ON_DQ2), |
| 1685 | GPIO_FN(ON_DQ1), |
| 1686 | GPIO_FN(ON_DQ0), |
Laurent Pinchart | 0bb9267 | 2012-12-15 23:51:37 +0100 | [diff] [blame] | 1687 | }; |
| 1688 | |
Laurent Pinchart | cd3c1be | 2013-02-16 18:47:05 +0100 | [diff] [blame] | 1689 | static const struct pinmux_cfg_reg pinmux_config_regs[] = { |
Laurent Pinchart | 0bb9267 | 2012-12-15 23:51:37 +0100 | [diff] [blame] | 1690 | { PINMUX_CFG_REG("PACR", 0xffec0000, 16, 2) { |
Laurent Pinchart | 5f86072 | 2013-07-16 01:54:13 +0200 | [diff] [blame] | 1691 | PTA7_FN, PTA7_OUT, PTA7_IN, 0, |
| 1692 | PTA6_FN, PTA6_OUT, PTA6_IN, 0, |
| 1693 | PTA5_FN, PTA5_OUT, PTA5_IN, 0, |
| 1694 | PTA4_FN, PTA4_OUT, PTA4_IN, 0, |
| 1695 | PTA3_FN, PTA3_OUT, PTA3_IN, 0, |
| 1696 | PTA2_FN, PTA2_OUT, PTA2_IN, 0, |
| 1697 | PTA1_FN, PTA1_OUT, PTA1_IN, 0, |
| 1698 | PTA0_FN, PTA0_OUT, PTA0_IN, 0 } |
Laurent Pinchart | 0bb9267 | 2012-12-15 23:51:37 +0100 | [diff] [blame] | 1699 | }, |
| 1700 | { PINMUX_CFG_REG("PBCR", 0xffec0002, 16, 2) { |
| 1701 | PTB7_FN, PTB7_OUT, PTB7_IN, 0, |
| 1702 | PTB6_FN, PTB6_OUT, PTB6_IN, 0, |
| 1703 | PTB5_FN, PTB5_OUT, PTB5_IN, 0, |
| 1704 | PTB4_FN, PTB4_OUT, PTB4_IN, 0, |
| 1705 | PTB3_FN, PTB3_OUT, PTB3_IN, 0, |
| 1706 | PTB2_FN, PTB2_OUT, PTB2_IN, 0, |
| 1707 | PTB1_FN, PTB1_OUT, PTB1_IN, 0, |
| 1708 | PTB0_FN, PTB0_OUT, PTB0_IN, 0 } |
| 1709 | }, |
| 1710 | { PINMUX_CFG_REG("PCCR", 0xffec0004, 16, 2) { |
| 1711 | PTC7_FN, PTC7_OUT, PTC7_IN, 0, |
| 1712 | PTC6_FN, PTC6_OUT, PTC6_IN, 0, |
| 1713 | PTC5_FN, PTC5_OUT, PTC5_IN, 0, |
| 1714 | PTC4_FN, PTC4_OUT, PTC4_IN, 0, |
| 1715 | PTC3_FN, PTC3_OUT, PTC3_IN, 0, |
| 1716 | PTC2_FN, PTC2_OUT, PTC2_IN, 0, |
| 1717 | PTC1_FN, PTC1_OUT, PTC1_IN, 0, |
| 1718 | PTC0_FN, PTC0_OUT, PTC0_IN, 0 } |
| 1719 | }, |
| 1720 | { PINMUX_CFG_REG("PDCR", 0xffec0006, 16, 2) { |
Laurent Pinchart | 5f86072 | 2013-07-16 01:54:13 +0200 | [diff] [blame] | 1721 | PTD7_FN, PTD7_OUT, PTD7_IN, 0, |
| 1722 | PTD6_FN, PTD6_OUT, PTD6_IN, 0, |
| 1723 | PTD5_FN, PTD5_OUT, PTD5_IN, 0, |
| 1724 | PTD4_FN, PTD4_OUT, PTD4_IN, 0, |
| 1725 | PTD3_FN, PTD3_OUT, PTD3_IN, 0, |
| 1726 | PTD2_FN, PTD2_OUT, PTD2_IN, 0, |
| 1727 | PTD1_FN, PTD1_OUT, PTD1_IN, 0, |
| 1728 | PTD0_FN, PTD0_OUT, PTD0_IN, 0 } |
Laurent Pinchart | 0bb9267 | 2012-12-15 23:51:37 +0100 | [diff] [blame] | 1729 | }, |
| 1730 | { PINMUX_CFG_REG("PECR", 0xffec0008, 16, 2) { |
Laurent Pinchart | 5f86072 | 2013-07-16 01:54:13 +0200 | [diff] [blame] | 1731 | PTE7_FN, PTE7_OUT, PTE7_IN, 0, |
| 1732 | PTE6_FN, PTE6_OUT, PTE6_IN, 0, |
| 1733 | PTE5_FN, PTE5_OUT, PTE5_IN, 0, |
| 1734 | PTE4_FN, PTE4_OUT, PTE4_IN, 0, |
| 1735 | PTE3_FN, PTE3_OUT, PTE3_IN, 0, |
| 1736 | PTE2_FN, PTE2_OUT, PTE2_IN, 0, |
| 1737 | PTE1_FN, PTE1_OUT, PTE1_IN, 0, |
| 1738 | PTE0_FN, PTE0_OUT, PTE0_IN, 0 } |
Laurent Pinchart | 0bb9267 | 2012-12-15 23:51:37 +0100 | [diff] [blame] | 1739 | }, |
| 1740 | { PINMUX_CFG_REG("PFCR", 0xffec000a, 16, 2) { |
Laurent Pinchart | 5f86072 | 2013-07-16 01:54:13 +0200 | [diff] [blame] | 1741 | PTF7_FN, PTF7_OUT, PTF7_IN, 0, |
| 1742 | PTF6_FN, PTF6_OUT, PTF6_IN, 0, |
| 1743 | PTF5_FN, PTF5_OUT, PTF5_IN, 0, |
| 1744 | PTF4_FN, PTF4_OUT, PTF4_IN, 0, |
| 1745 | PTF3_FN, PTF3_OUT, PTF3_IN, 0, |
| 1746 | PTF2_FN, PTF2_OUT, PTF2_IN, 0, |
| 1747 | PTF1_FN, PTF1_OUT, PTF1_IN, 0, |
| 1748 | PTF0_FN, PTF0_OUT, PTF0_IN, 0 } |
Laurent Pinchart | 0bb9267 | 2012-12-15 23:51:37 +0100 | [diff] [blame] | 1749 | }, |
| 1750 | { PINMUX_CFG_REG("PGCR", 0xffec000c, 16, 2) { |
Laurent Pinchart | 5f86072 | 2013-07-16 01:54:13 +0200 | [diff] [blame] | 1751 | PTG7_FN, PTG7_OUT, PTG7_IN, 0, |
| 1752 | PTG6_FN, PTG6_OUT, PTG6_IN, 0, |
Laurent Pinchart | 0bb9267 | 2012-12-15 23:51:37 +0100 | [diff] [blame] | 1753 | PTG5_FN, PTG5_OUT, PTG5_IN, 0, |
Laurent Pinchart | 5f86072 | 2013-07-16 01:54:13 +0200 | [diff] [blame] | 1754 | PTG4_FN, PTG4_OUT, PTG4_IN, 0, |
Laurent Pinchart | 0bb9267 | 2012-12-15 23:51:37 +0100 | [diff] [blame] | 1755 | PTG3_FN, PTG3_OUT, PTG3_IN, 0, |
| 1756 | PTG2_FN, PTG2_OUT, PTG2_IN, 0, |
| 1757 | PTG1_FN, PTG1_OUT, PTG1_IN, 0, |
| 1758 | PTG0_FN, PTG0_OUT, PTG0_IN, 0 } |
| 1759 | }, |
| 1760 | { PINMUX_CFG_REG("PHCR", 0xffec000e, 16, 2) { |
Laurent Pinchart | 5f86072 | 2013-07-16 01:54:13 +0200 | [diff] [blame] | 1761 | PTH7_FN, PTH7_OUT, PTH7_IN, 0, |
| 1762 | PTH6_FN, PTH6_OUT, PTH6_IN, 0, |
| 1763 | PTH5_FN, PTH5_OUT, PTH5_IN, 0, |
| 1764 | PTH4_FN, PTH4_OUT, PTH4_IN, 0, |
| 1765 | PTH3_FN, PTH3_OUT, PTH3_IN, 0, |
| 1766 | PTH2_FN, PTH2_OUT, PTH2_IN, 0, |
| 1767 | PTH1_FN, PTH1_OUT, PTH1_IN, 0, |
| 1768 | PTH0_FN, PTH0_OUT, PTH0_IN, 0 } |
Laurent Pinchart | 0bb9267 | 2012-12-15 23:51:37 +0100 | [diff] [blame] | 1769 | }, |
| 1770 | { PINMUX_CFG_REG("PICR", 0xffec0010, 16, 2) { |
Laurent Pinchart | 5f86072 | 2013-07-16 01:54:13 +0200 | [diff] [blame] | 1771 | PTI7_FN, PTI7_OUT, PTI7_IN, 0, |
| 1772 | PTI6_FN, PTI6_OUT, PTI6_IN, 0, |
Laurent Pinchart | 0bb9267 | 2012-12-15 23:51:37 +0100 | [diff] [blame] | 1773 | PTI5_FN, PTI5_OUT, PTI5_IN, 0, |
Laurent Pinchart | 5f86072 | 2013-07-16 01:54:13 +0200 | [diff] [blame] | 1774 | PTI4_FN, PTI4_OUT, PTI4_IN, 0, |
| 1775 | PTI3_FN, PTI3_OUT, PTI3_IN, 0, |
| 1776 | PTI2_FN, PTI2_OUT, PTI2_IN, 0, |
| 1777 | PTI1_FN, PTI1_OUT, PTI1_IN, 0, |
| 1778 | PTI0_FN, PTI0_OUT, PTI0_IN, 0 } |
Laurent Pinchart | 0bb9267 | 2012-12-15 23:51:37 +0100 | [diff] [blame] | 1779 | }, |
| 1780 | { PINMUX_CFG_REG("PJCR", 0xffec0012, 16, 2) { |
| 1781 | 0, 0, 0, 0, /* reserved: always set 1 */ |
Laurent Pinchart | 5f86072 | 2013-07-16 01:54:13 +0200 | [diff] [blame] | 1782 | PTJ6_FN, PTJ6_OUT, PTJ6_IN, 0, |
| 1783 | PTJ5_FN, PTJ5_OUT, PTJ5_IN, 0, |
| 1784 | PTJ4_FN, PTJ4_OUT, PTJ4_IN, 0, |
| 1785 | PTJ3_FN, PTJ3_OUT, PTJ3_IN, 0, |
| 1786 | PTJ2_FN, PTJ2_OUT, PTJ2_IN, 0, |
| 1787 | PTJ1_FN, PTJ1_OUT, PTJ1_IN, 0, |
| 1788 | PTJ0_FN, PTJ0_OUT, PTJ0_IN, 0 } |
Laurent Pinchart | 0bb9267 | 2012-12-15 23:51:37 +0100 | [diff] [blame] | 1789 | }, |
| 1790 | { PINMUX_CFG_REG("PKCR", 0xffec0014, 16, 2) { |
Laurent Pinchart | 5f86072 | 2013-07-16 01:54:13 +0200 | [diff] [blame] | 1791 | PTK7_FN, PTK7_OUT, PTK7_IN, 0, |
| 1792 | PTK6_FN, PTK6_OUT, PTK6_IN, 0, |
| 1793 | PTK5_FN, PTK5_OUT, PTK5_IN, 0, |
| 1794 | PTK4_FN, PTK4_OUT, PTK4_IN, 0, |
| 1795 | PTK3_FN, PTK3_OUT, PTK3_IN, 0, |
| 1796 | PTK2_FN, PTK2_OUT, PTK2_IN, 0, |
| 1797 | PTK1_FN, PTK1_OUT, PTK1_IN, 0, |
| 1798 | PTK0_FN, PTK0_OUT, PTK0_IN, 0 } |
Laurent Pinchart | 0bb9267 | 2012-12-15 23:51:37 +0100 | [diff] [blame] | 1799 | }, |
| 1800 | { PINMUX_CFG_REG("PLCR", 0xffec0016, 16, 2) { |
| 1801 | 0, 0, 0, 0, /* reserved: always set 1 */ |
Laurent Pinchart | 5f86072 | 2013-07-16 01:54:13 +0200 | [diff] [blame] | 1802 | PTL6_FN, PTL6_OUT, PTL6_IN, 0, |
| 1803 | PTL5_FN, PTL5_OUT, PTL5_IN, 0, |
| 1804 | PTL4_FN, PTL4_OUT, PTL4_IN, 0, |
| 1805 | PTL3_FN, PTL3_OUT, PTL3_IN, 0, |
| 1806 | PTL2_FN, PTL2_OUT, PTL2_IN, 0, |
| 1807 | PTL1_FN, PTL1_OUT, PTL1_IN, 0, |
| 1808 | PTL0_FN, PTL0_OUT, PTL0_IN, 0 } |
Laurent Pinchart | 0bb9267 | 2012-12-15 23:51:37 +0100 | [diff] [blame] | 1809 | }, |
| 1810 | { PINMUX_CFG_REG("PMCR", 0xffec0018, 16, 2) { |
Laurent Pinchart | 5f86072 | 2013-07-16 01:54:13 +0200 | [diff] [blame] | 1811 | PTM7_FN, PTM7_OUT, PTM7_IN, 0, |
| 1812 | PTM6_FN, PTM6_OUT, PTM6_IN, 0, |
| 1813 | PTM5_FN, PTM5_OUT, PTM5_IN, 0, |
| 1814 | PTM4_FN, PTM4_OUT, PTM4_IN, 0, |
Laurent Pinchart | 0bb9267 | 2012-12-15 23:51:37 +0100 | [diff] [blame] | 1815 | PTM3_FN, PTM3_OUT, PTM3_IN, 0, |
| 1816 | PTM2_FN, PTM2_OUT, PTM2_IN, 0, |
| 1817 | PTM1_FN, PTM1_OUT, PTM1_IN, 0, |
| 1818 | PTM0_FN, PTM0_OUT, PTM0_IN, 0 } |
| 1819 | }, |
| 1820 | { PINMUX_CFG_REG("PNCR", 0xffec001a, 16, 2) { |
| 1821 | 0, 0, 0, 0, /* reserved: always set 1 */ |
| 1822 | PTN6_FN, PTN6_OUT, PTN6_IN, 0, |
| 1823 | PTN5_FN, PTN5_OUT, PTN5_IN, 0, |
Laurent Pinchart | 5f86072 | 2013-07-16 01:54:13 +0200 | [diff] [blame] | 1824 | PTN4_FN, PTN4_OUT, PTN4_IN, 0, |
| 1825 | PTN3_FN, PTN3_OUT, PTN3_IN, 0, |
| 1826 | PTN2_FN, PTN2_OUT, PTN2_IN, 0, |
| 1827 | PTN1_FN, PTN1_OUT, PTN1_IN, 0, |
| 1828 | PTN0_FN, PTN0_OUT, PTN0_IN, 0 } |
Laurent Pinchart | 0bb9267 | 2012-12-15 23:51:37 +0100 | [diff] [blame] | 1829 | }, |
| 1830 | { PINMUX_CFG_REG("POCR", 0xffec001c, 16, 2) { |
Laurent Pinchart | 5f86072 | 2013-07-16 01:54:13 +0200 | [diff] [blame] | 1831 | PTO7_FN, PTO7_OUT, PTO7_IN, 0, |
| 1832 | PTO6_FN, PTO6_OUT, PTO6_IN, 0, |
| 1833 | PTO5_FN, PTO5_OUT, PTO5_IN, 0, |
| 1834 | PTO4_FN, PTO4_OUT, PTO4_IN, 0, |
| 1835 | PTO3_FN, PTO3_OUT, PTO3_IN, 0, |
| 1836 | PTO2_FN, PTO2_OUT, PTO2_IN, 0, |
| 1837 | PTO1_FN, PTO1_OUT, PTO1_IN, 0, |
| 1838 | PTO0_FN, PTO0_OUT, PTO0_IN, 0 } |
Laurent Pinchart | 0bb9267 | 2012-12-15 23:51:37 +0100 | [diff] [blame] | 1839 | }, |
| 1840 | #if 0 /* FIXME: Remove it? */ |
| 1841 | { PINMUX_CFG_REG("PPCR", 0xffec001e, 16, 2) { |
| 1842 | 0, 0, 0, 0, /* reserved: always set 1 */ |
| 1843 | PTP6_FN, PTP6_OUT, PTP6_IN, 0, |
| 1844 | PTP5_FN, PTP5_OUT, PTP5_IN, 0, |
| 1845 | PTP4_FN, PTP4_OUT, PTP4_IN, 0, |
| 1846 | PTP3_FN, PTP3_OUT, PTP3_IN, 0, |
| 1847 | PTP2_FN, PTP2_OUT, PTP2_IN, 0, |
| 1848 | PTP1_FN, PTP1_OUT, PTP1_IN, 0, |
| 1849 | PTP0_FN, PTP0_OUT, PTP0_IN, 0 } |
| 1850 | }, |
| 1851 | #endif |
| 1852 | { PINMUX_CFG_REG("PQCR", 0xffec0020, 16, 2) { |
| 1853 | 0, 0, 0, 0, /* reserved: always set 1 */ |
| 1854 | PTQ6_FN, PTQ6_OUT, PTQ6_IN, 0, |
| 1855 | PTQ5_FN, PTQ5_OUT, PTQ5_IN, 0, |
| 1856 | PTQ4_FN, PTQ4_OUT, PTQ4_IN, 0, |
| 1857 | PTQ3_FN, PTQ3_OUT, PTQ3_IN, 0, |
| 1858 | PTQ2_FN, PTQ2_OUT, PTQ2_IN, 0, |
| 1859 | PTQ1_FN, PTQ1_OUT, PTQ1_IN, 0, |
| 1860 | PTQ0_FN, PTQ0_OUT, PTQ0_IN, 0 } |
| 1861 | }, |
| 1862 | { PINMUX_CFG_REG("PRCR", 0xffec0022, 16, 2) { |
| 1863 | PTR7_FN, PTR7_OUT, PTR7_IN, 0, |
| 1864 | PTR6_FN, PTR6_OUT, PTR6_IN, 0, |
| 1865 | PTR5_FN, PTR5_OUT, PTR5_IN, 0, |
| 1866 | PTR4_FN, PTR4_OUT, PTR4_IN, 0, |
| 1867 | PTR3_FN, PTR3_OUT, PTR3_IN, 0, |
| 1868 | PTR2_FN, PTR2_OUT, PTR2_IN, 0, |
| 1869 | PTR1_FN, PTR1_OUT, PTR1_IN, 0, |
| 1870 | PTR0_FN, PTR0_OUT, PTR0_IN, 0 } |
| 1871 | }, |
| 1872 | { PINMUX_CFG_REG("PSCR", 0xffec0024, 16, 2) { |
| 1873 | PTS7_FN, PTS7_OUT, PTS7_IN, 0, |
| 1874 | PTS6_FN, PTS6_OUT, PTS6_IN, 0, |
| 1875 | PTS5_FN, PTS5_OUT, PTS5_IN, 0, |
| 1876 | PTS4_FN, PTS4_OUT, PTS4_IN, 0, |
| 1877 | PTS3_FN, PTS3_OUT, PTS3_IN, 0, |
| 1878 | PTS2_FN, PTS2_OUT, PTS2_IN, 0, |
| 1879 | PTS1_FN, PTS1_OUT, PTS1_IN, 0, |
| 1880 | PTS0_FN, PTS0_OUT, PTS0_IN, 0 } |
| 1881 | }, |
| 1882 | { PINMUX_CFG_REG("PTCR", 0xffec0026, 16, 2) { |
Laurent Pinchart | 5f86072 | 2013-07-16 01:54:13 +0200 | [diff] [blame] | 1883 | PTT7_FN, PTT7_OUT, PTT7_IN, 0, |
| 1884 | PTT6_FN, PTT6_OUT, PTT6_IN, 0, |
| 1885 | PTT5_FN, PTT5_OUT, PTT5_IN, 0, |
| 1886 | PTT4_FN, PTT4_OUT, PTT4_IN, 0, |
| 1887 | PTT3_FN, PTT3_OUT, PTT3_IN, 0, |
| 1888 | PTT2_FN, PTT2_OUT, PTT2_IN, 0, |
| 1889 | PTT1_FN, PTT1_OUT, PTT1_IN, 0, |
| 1890 | PTT0_FN, PTT0_OUT, PTT0_IN, 0 } |
Laurent Pinchart | 0bb9267 | 2012-12-15 23:51:37 +0100 | [diff] [blame] | 1891 | }, |
| 1892 | { PINMUX_CFG_REG("PUCR", 0xffec0028, 16, 2) { |
Laurent Pinchart | 5f86072 | 2013-07-16 01:54:13 +0200 | [diff] [blame] | 1893 | PTU7_FN, PTU7_OUT, PTU7_IN, 0, |
| 1894 | PTU6_FN, PTU6_OUT, PTU6_IN, 0, |
| 1895 | PTU5_FN, PTU5_OUT, PTU5_IN, 0, |
| 1896 | PTU4_FN, PTU4_OUT, PTU4_IN, 0, |
| 1897 | PTU3_FN, PTU3_OUT, PTU3_IN, 0, |
| 1898 | PTU2_FN, PTU2_OUT, PTU2_IN, 0, |
| 1899 | PTU1_FN, PTU1_OUT, PTU1_IN, 0, |
| 1900 | PTU0_FN, PTU0_OUT, PTU0_IN, 0 } |
Laurent Pinchart | 0bb9267 | 2012-12-15 23:51:37 +0100 | [diff] [blame] | 1901 | }, |
| 1902 | { PINMUX_CFG_REG("PVCR", 0xffec002a, 16, 2) { |
Laurent Pinchart | 5f86072 | 2013-07-16 01:54:13 +0200 | [diff] [blame] | 1903 | PTV7_FN, PTV7_OUT, PTV7_IN, 0, |
| 1904 | PTV6_FN, PTV6_OUT, PTV6_IN, 0, |
| 1905 | PTV5_FN, PTV5_OUT, PTV5_IN, 0, |
| 1906 | PTV4_FN, PTV4_OUT, PTV4_IN, 0, |
| 1907 | PTV3_FN, PTV3_OUT, PTV3_IN, 0, |
| 1908 | PTV2_FN, PTV2_OUT, PTV2_IN, 0, |
Laurent Pinchart | 0bb9267 | 2012-12-15 23:51:37 +0100 | [diff] [blame] | 1909 | PTV1_FN, PTV1_OUT, PTV1_IN, 0, |
| 1910 | PTV0_FN, PTV0_OUT, PTV0_IN, 0 } |
| 1911 | }, |
| 1912 | { PINMUX_CFG_REG("PWCR", 0xffec002c, 16, 2) { |
| 1913 | PTW7_FN, PTW7_OUT, PTW7_IN, 0, |
| 1914 | PTW6_FN, PTW6_OUT, PTW6_IN, 0, |
| 1915 | PTW5_FN, PTW5_OUT, PTW5_IN, 0, |
| 1916 | PTW4_FN, PTW4_OUT, PTW4_IN, 0, |
| 1917 | PTW3_FN, PTW3_OUT, PTW3_IN, 0, |
| 1918 | PTW2_FN, PTW2_OUT, PTW2_IN, 0, |
Laurent Pinchart | 5f86072 | 2013-07-16 01:54:13 +0200 | [diff] [blame] | 1919 | PTW1_FN, PTW1_OUT, PTW1_IN, 0, |
| 1920 | PTW0_FN, PTW0_OUT, PTW0_IN, 0 } |
Laurent Pinchart | 0bb9267 | 2012-12-15 23:51:37 +0100 | [diff] [blame] | 1921 | }, |
| 1922 | { PINMUX_CFG_REG("PXCR", 0xffec002e, 16, 2) { |
Laurent Pinchart | 5f86072 | 2013-07-16 01:54:13 +0200 | [diff] [blame] | 1923 | PTX7_FN, PTX7_OUT, PTX7_IN, 0, |
| 1924 | PTX6_FN, PTX6_OUT, PTX6_IN, 0, |
| 1925 | PTX5_FN, PTX5_OUT, PTX5_IN, 0, |
| 1926 | PTX4_FN, PTX4_OUT, PTX4_IN, 0, |
| 1927 | PTX3_FN, PTX3_OUT, PTX3_IN, 0, |
| 1928 | PTX2_FN, PTX2_OUT, PTX2_IN, 0, |
| 1929 | PTX1_FN, PTX1_OUT, PTX1_IN, 0, |
| 1930 | PTX0_FN, PTX0_OUT, PTX0_IN, 0 } |
Laurent Pinchart | 0bb9267 | 2012-12-15 23:51:37 +0100 | [diff] [blame] | 1931 | }, |
| 1932 | { PINMUX_CFG_REG("PYCR", 0xffec0030, 16, 2) { |
Laurent Pinchart | 5f86072 | 2013-07-16 01:54:13 +0200 | [diff] [blame] | 1933 | PTY7_FN, PTY7_OUT, PTY7_IN, 0, |
| 1934 | PTY6_FN, PTY6_OUT, PTY6_IN, 0, |
| 1935 | PTY5_FN, PTY5_OUT, PTY5_IN, 0, |
| 1936 | PTY4_FN, PTY4_OUT, PTY4_IN, 0, |
| 1937 | PTY3_FN, PTY3_OUT, PTY3_IN, 0, |
| 1938 | PTY2_FN, PTY2_OUT, PTY2_IN, 0, |
| 1939 | PTY1_FN, PTY1_OUT, PTY1_IN, 0, |
| 1940 | PTY0_FN, PTY0_OUT, PTY0_IN, 0 } |
Laurent Pinchart | 0bb9267 | 2012-12-15 23:51:37 +0100 | [diff] [blame] | 1941 | }, |
| 1942 | { PINMUX_CFG_REG("PZCR", 0xffec0032, 16, 2) { |
| 1943 | PTZ7_FN, PTZ7_OUT, PTZ7_IN, 0, |
| 1944 | PTZ6_FN, PTZ6_OUT, PTZ6_IN, 0, |
| 1945 | PTZ5_FN, PTZ5_OUT, PTZ5_IN, 0, |
| 1946 | PTZ4_FN, PTZ4_OUT, PTZ4_IN, 0, |
| 1947 | PTZ3_FN, PTZ3_OUT, PTZ3_IN, 0, |
| 1948 | PTZ2_FN, PTZ2_OUT, PTZ2_IN, 0, |
| 1949 | PTZ1_FN, PTZ1_OUT, PTZ1_IN, 0, |
| 1950 | PTZ0_FN, PTZ0_OUT, PTZ0_IN, 0 } |
| 1951 | }, |
| 1952 | |
| 1953 | { PINMUX_CFG_REG("PSEL0", 0xffec0070, 16, 1) { |
| 1954 | PS0_15_FN1, PS0_15_FN2, |
| 1955 | PS0_14_FN1, PS0_14_FN2, |
| 1956 | PS0_13_FN1, PS0_13_FN2, |
| 1957 | PS0_12_FN1, PS0_12_FN2, |
| 1958 | PS0_11_FN1, PS0_11_FN2, |
| 1959 | PS0_10_FN1, PS0_10_FN2, |
| 1960 | PS0_9_FN1, PS0_9_FN2, |
| 1961 | PS0_8_FN1, PS0_8_FN2, |
| 1962 | PS0_7_FN1, PS0_7_FN2, |
| 1963 | PS0_6_FN1, PS0_6_FN2, |
| 1964 | PS0_5_FN1, PS0_5_FN2, |
| 1965 | PS0_4_FN1, PS0_4_FN2, |
| 1966 | PS0_3_FN1, PS0_3_FN2, |
| 1967 | PS0_2_FN1, PS0_2_FN2, |
| 1968 | 0, 0, |
| 1969 | 0, 0, } |
| 1970 | }, |
| 1971 | { PINMUX_CFG_REG("PSEL1", 0xffec0072, 16, 1) { |
| 1972 | 0, 0, |
| 1973 | 0, 0, |
| 1974 | 0, 0, |
| 1975 | 0, 0, |
| 1976 | 0, 0, |
| 1977 | PS1_10_FN1, PS1_10_FN2, |
| 1978 | PS1_9_FN1, PS1_9_FN2, |
| 1979 | PS1_8_FN1, PS1_8_FN2, |
| 1980 | 0, 0, |
| 1981 | 0, 0, |
| 1982 | 0, 0, |
| 1983 | 0, 0, |
| 1984 | 0, 0, |
| 1985 | PS1_2_FN1, PS1_2_FN2, |
| 1986 | 0, 0, |
| 1987 | 0, 0, } |
| 1988 | }, |
| 1989 | { PINMUX_CFG_REG("PSEL2", 0xffec0074, 16, 1) { |
| 1990 | 0, 0, |
| 1991 | 0, 0, |
| 1992 | PS2_13_FN1, PS2_13_FN2, |
| 1993 | PS2_12_FN1, PS2_12_FN2, |
| 1994 | 0, 0, |
| 1995 | 0, 0, |
| 1996 | 0, 0, |
| 1997 | 0, 0, |
| 1998 | PS2_7_FN1, PS2_7_FN2, |
| 1999 | PS2_6_FN1, PS2_6_FN2, |
| 2000 | PS2_5_FN1, PS2_5_FN2, |
| 2001 | PS2_4_FN1, PS2_4_FN2, |
| 2002 | 0, 0, |
| 2003 | PS2_2_FN1, PS2_2_FN2, |
| 2004 | 0, 0, |
| 2005 | 0, 0, } |
| 2006 | }, |
| 2007 | { PINMUX_CFG_REG("PSEL3", 0xffec0076, 16, 1) { |
| 2008 | PS3_15_FN1, PS3_15_FN2, |
| 2009 | PS3_14_FN1, PS3_14_FN2, |
| 2010 | PS3_13_FN1, PS3_13_FN2, |
| 2011 | PS3_12_FN1, PS3_12_FN2, |
| 2012 | PS3_11_FN1, PS3_11_FN2, |
| 2013 | PS3_10_FN1, PS3_10_FN2, |
| 2014 | PS3_9_FN1, PS3_9_FN2, |
| 2015 | PS3_8_FN1, PS3_8_FN2, |
| 2016 | PS3_7_FN1, PS3_7_FN2, |
| 2017 | 0, 0, |
| 2018 | 0, 0, |
| 2019 | 0, 0, |
| 2020 | 0, 0, |
| 2021 | PS3_2_FN1, PS3_2_FN2, |
| 2022 | PS3_1_FN1, PS3_1_FN2, |
| 2023 | 0, 0, } |
| 2024 | }, |
| 2025 | |
| 2026 | { PINMUX_CFG_REG("PSEL4", 0xffec0078, 16, 1) { |
| 2027 | 0, 0, |
| 2028 | PS4_14_FN1, PS4_14_FN2, |
| 2029 | PS4_13_FN1, PS4_13_FN2, |
| 2030 | PS4_12_FN1, PS4_12_FN2, |
| 2031 | 0, 0, |
| 2032 | PS4_10_FN1, PS4_10_FN2, |
| 2033 | PS4_9_FN1, PS4_9_FN2, |
| 2034 | PS4_8_FN1, PS4_8_FN2, |
| 2035 | 0, 0, |
| 2036 | 0, 0, |
| 2037 | 0, 0, |
| 2038 | PS4_4_FN1, PS4_4_FN2, |
| 2039 | PS4_3_FN1, PS4_3_FN2, |
| 2040 | PS4_2_FN1, PS4_2_FN2, |
| 2041 | PS4_1_FN1, PS4_1_FN2, |
| 2042 | PS4_0_FN1, PS4_0_FN2, } |
| 2043 | }, |
| 2044 | { PINMUX_CFG_REG("PSEL5", 0xffec007a, 16, 1) { |
| 2045 | 0, 0, |
| 2046 | 0, 0, |
| 2047 | 0, 0, |
| 2048 | 0, 0, |
| 2049 | PS5_11_FN1, PS5_11_FN2, |
| 2050 | PS5_10_FN1, PS5_10_FN2, |
| 2051 | PS5_9_FN1, PS5_9_FN2, |
| 2052 | PS5_8_FN1, PS5_8_FN2, |
| 2053 | PS5_7_FN1, PS5_7_FN2, |
| 2054 | PS5_6_FN1, PS5_6_FN2, |
| 2055 | PS5_5_FN1, PS5_5_FN2, |
| 2056 | PS5_4_FN1, PS5_4_FN2, |
| 2057 | PS5_3_FN1, PS5_3_FN2, |
| 2058 | PS5_2_FN1, PS5_2_FN2, |
| 2059 | 0, 0, |
| 2060 | 0, 0, } |
| 2061 | }, |
| 2062 | { PINMUX_CFG_REG("PSEL6", 0xffec007c, 16, 1) { |
| 2063 | PS6_15_FN1, PS6_15_FN2, |
| 2064 | PS6_14_FN1, PS6_14_FN2, |
| 2065 | PS6_13_FN1, PS6_13_FN2, |
| 2066 | PS6_12_FN1, PS6_12_FN2, |
| 2067 | PS6_11_FN1, PS6_11_FN2, |
| 2068 | PS6_10_FN1, PS6_10_FN2, |
| 2069 | PS6_9_FN1, PS6_9_FN2, |
| 2070 | PS6_8_FN1, PS6_8_FN2, |
| 2071 | PS6_7_FN1, PS6_7_FN2, |
| 2072 | PS6_6_FN1, PS6_6_FN2, |
| 2073 | PS6_5_FN1, PS6_5_FN2, |
| 2074 | PS6_4_FN1, PS6_4_FN2, |
| 2075 | PS6_3_FN1, PS6_3_FN2, |
| 2076 | PS6_2_FN1, PS6_2_FN2, |
| 2077 | PS6_1_FN1, PS6_1_FN2, |
| 2078 | PS6_0_FN1, PS6_0_FN2, } |
| 2079 | }, |
| 2080 | { PINMUX_CFG_REG("PSEL7", 0xffec0082, 16, 1) { |
| 2081 | PS7_15_FN1, PS7_15_FN2, |
| 2082 | PS7_14_FN1, PS7_14_FN2, |
| 2083 | PS7_13_FN1, PS7_13_FN2, |
| 2084 | PS7_12_FN1, PS7_12_FN2, |
| 2085 | PS7_11_FN1, PS7_11_FN2, |
| 2086 | PS7_10_FN1, PS7_10_FN2, |
| 2087 | PS7_9_FN1, PS7_9_FN2, |
| 2088 | PS7_8_FN1, PS7_8_FN2, |
| 2089 | PS7_7_FN1, PS7_7_FN2, |
| 2090 | PS7_6_FN1, PS7_6_FN2, |
| 2091 | PS7_5_FN1, PS7_5_FN2, |
| 2092 | 0, 0, |
| 2093 | 0, 0, |
| 2094 | 0, 0, |
| 2095 | 0, 0, |
| 2096 | 0, 0, } |
| 2097 | }, |
| 2098 | { PINMUX_CFG_REG("PSEL8", 0xffec0084, 16, 1) { |
| 2099 | PS8_15_FN1, PS8_15_FN2, |
| 2100 | PS8_14_FN1, PS8_14_FN2, |
| 2101 | PS8_13_FN1, PS8_13_FN2, |
| 2102 | PS8_12_FN1, PS8_12_FN2, |
| 2103 | PS8_11_FN1, PS8_11_FN2, |
| 2104 | PS8_10_FN1, PS8_10_FN2, |
| 2105 | PS8_9_FN1, PS8_9_FN2, |
| 2106 | PS8_8_FN1, PS8_8_FN2, |
| 2107 | 0, 0, |
| 2108 | 0, 0, |
| 2109 | 0, 0, |
| 2110 | 0, 0, |
| 2111 | 0, 0, |
| 2112 | 0, 0, |
| 2113 | 0, 0, |
| 2114 | 0, 0, } |
| 2115 | }, |
| 2116 | {} |
| 2117 | }; |
| 2118 | |
Laurent Pinchart | cd3c1be | 2013-02-16 18:47:05 +0100 | [diff] [blame] | 2119 | static const struct pinmux_data_reg pinmux_data_regs[] = { |
Laurent Pinchart | 0bb9267 | 2012-12-15 23:51:37 +0100 | [diff] [blame] | 2120 | { PINMUX_DATA_REG("PADR", 0xffec0034, 8) { |
| 2121 | PTA7_DATA, PTA6_DATA, PTA5_DATA, PTA4_DATA, |
| 2122 | PTA3_DATA, PTA2_DATA, PTA1_DATA, PTA0_DATA } |
| 2123 | }, |
| 2124 | { PINMUX_DATA_REG("PBDR", 0xffec0036, 8) { |
| 2125 | PTB7_DATA, PTB6_DATA, PTB5_DATA, PTB4_DATA, |
| 2126 | PTB3_DATA, PTB2_DATA, PTB1_DATA, PTB0_DATA } |
| 2127 | }, |
| 2128 | { PINMUX_DATA_REG("PCDR", 0xffec0038, 8) { |
| 2129 | PTC7_DATA, PTC6_DATA, PTC5_DATA, PTC4_DATA, |
| 2130 | PTC3_DATA, PTC2_DATA, PTC1_DATA, PTC0_DATA } |
| 2131 | }, |
| 2132 | { PINMUX_DATA_REG("PDDR", 0xffec003a, 8) { |
| 2133 | PTD7_DATA, PTD6_DATA, PTD5_DATA, PTD4_DATA, |
| 2134 | PTD3_DATA, PTD2_DATA, PTD1_DATA, PTD0_DATA } |
| 2135 | }, |
| 2136 | { PINMUX_DATA_REG("PEDR", 0xffec003c, 8) { |
| 2137 | PTE7_DATA, PTE6_DATA, PTE5_DATA, PTE4_DATA, |
| 2138 | PTE3_DATA, PTE2_DATA, PTE1_DATA, PTE0_DATA } |
| 2139 | }, |
| 2140 | { PINMUX_DATA_REG("PFDR", 0xffec003e, 8) { |
| 2141 | PTF7_DATA, PTF6_DATA, PTF5_DATA, PTF4_DATA, |
| 2142 | PTF3_DATA, PTF2_DATA, PTF1_DATA, PTF0_DATA } |
| 2143 | }, |
| 2144 | { PINMUX_DATA_REG("PGDR", 0xffec0040, 8) { |
| 2145 | PTG7_DATA, PTG6_DATA, PTG5_DATA, PTG4_DATA, |
| 2146 | PTG3_DATA, PTG2_DATA, PTG1_DATA, PTG0_DATA } |
| 2147 | }, |
| 2148 | { PINMUX_DATA_REG("PHDR", 0xffec0042, 8) { |
| 2149 | PTH7_DATA, PTH6_DATA, PTH5_DATA, PTH4_DATA, |
| 2150 | PTH3_DATA, PTH2_DATA, PTH1_DATA, PTH0_DATA } |
| 2151 | }, |
| 2152 | { PINMUX_DATA_REG("PIDR", 0xffec0044, 8) { |
| 2153 | PTI7_DATA, PTI6_DATA, PTI5_DATA, PTI4_DATA, |
| 2154 | PTI3_DATA, PTI2_DATA, PTI1_DATA, PTI0_DATA } |
| 2155 | }, |
| 2156 | { PINMUX_DATA_REG("PJDR", 0xffec0046, 8) { |
| 2157 | 0, PTJ6_DATA, PTJ5_DATA, PTJ4_DATA, |
| 2158 | PTJ3_DATA, PTJ2_DATA, PTJ1_DATA, PTJ0_DATA } |
| 2159 | }, |
| 2160 | { PINMUX_DATA_REG("PKDR", 0xffec0048, 8) { |
| 2161 | PTK7_DATA, PTK6_DATA, PTK5_DATA, PTK4_DATA, |
| 2162 | PTK3_DATA, PTK2_DATA, PTK1_DATA, PTK0_DATA } |
| 2163 | }, |
| 2164 | { PINMUX_DATA_REG("PLDR", 0xffec004a, 8) { |
| 2165 | 0, PTL6_DATA, PTL5_DATA, PTL4_DATA, |
| 2166 | PTL3_DATA, PTL2_DATA, PTL1_DATA, PTL0_DATA } |
| 2167 | }, |
| 2168 | { PINMUX_DATA_REG("PMDR", 0xffec004c, 8) { |
| 2169 | PTM7_DATA, PTM6_DATA, PTM5_DATA, PTM4_DATA, |
| 2170 | PTM3_DATA, PTM2_DATA, PTM1_DATA, PTM0_DATA } |
| 2171 | }, |
| 2172 | { PINMUX_DATA_REG("PNDR", 0xffec004e, 8) { |
| 2173 | 0, PTN6_DATA, PTN5_DATA, PTN4_DATA, |
| 2174 | PTN3_DATA, PTN2_DATA, PTN1_DATA, PTN0_DATA } |
| 2175 | }, |
| 2176 | { PINMUX_DATA_REG("PODR", 0xffec0050, 8) { |
| 2177 | PTO7_DATA, PTO6_DATA, PTO5_DATA, PTO4_DATA, |
| 2178 | PTO3_DATA, PTO2_DATA, PTO1_DATA, PTO0_DATA } |
| 2179 | }, |
| 2180 | { PINMUX_DATA_REG("PPDR", 0xffec0052, 8) { |
| 2181 | PTP7_DATA, PTP6_DATA, PTP5_DATA, PTP4_DATA, |
| 2182 | PTP3_DATA, PTP2_DATA, PTP1_DATA, PTP0_DATA } |
| 2183 | }, |
| 2184 | { PINMUX_DATA_REG("PQDR", 0xffec0054, 8) { |
| 2185 | 0, PTQ6_DATA, PTQ5_DATA, PTQ4_DATA, |
| 2186 | PTQ3_DATA, PTQ2_DATA, PTQ1_DATA, PTQ0_DATA } |
| 2187 | }, |
| 2188 | { PINMUX_DATA_REG("PRDR", 0xffec0056, 8) { |
| 2189 | PTR7_DATA, PTR6_DATA, PTR5_DATA, PTR4_DATA, |
| 2190 | PTR3_DATA, PTR2_DATA, PTR1_DATA, PTR0_DATA } |
| 2191 | }, |
| 2192 | { PINMUX_DATA_REG("PSDR", 0xffec0058, 8) { |
| 2193 | PTS7_DATA, PTS6_DATA, PTS5_DATA, PTS4_DATA, |
| 2194 | PTS3_DATA, PTS2_DATA, PTS1_DATA, PTS0_DATA } |
| 2195 | }, |
| 2196 | { PINMUX_DATA_REG("PTDR", 0xffec005a, 8) { |
| 2197 | PTT7_DATA, PTT6_DATA, PTT5_DATA, PTT4_DATA, |
| 2198 | PTT3_DATA, PTT2_DATA, PTT1_DATA, PTT0_DATA } |
| 2199 | }, |
| 2200 | { PINMUX_DATA_REG("PUDR", 0xffec005c, 8) { |
| 2201 | PTU7_DATA, PTU6_DATA, PTU5_DATA, PTU4_DATA, |
| 2202 | PTU3_DATA, PTU2_DATA, PTU1_DATA, PTU0_DATA } |
| 2203 | }, |
| 2204 | { PINMUX_DATA_REG("PVDR", 0xffec005e, 8) { |
| 2205 | PTV7_DATA, PTV6_DATA, PTV5_DATA, PTV4_DATA, |
| 2206 | PTV3_DATA, PTV2_DATA, PTV1_DATA, PTV0_DATA } |
| 2207 | }, |
| 2208 | { PINMUX_DATA_REG("PWDR", 0xffec0060, 8) { |
| 2209 | PTW7_DATA, PTW6_DATA, PTW5_DATA, PTW4_DATA, |
| 2210 | PTW3_DATA, PTW2_DATA, PTW1_DATA, PTW0_DATA } |
| 2211 | }, |
| 2212 | { PINMUX_DATA_REG("PXDR", 0xffec0062, 8) { |
| 2213 | PTX7_DATA, PTX6_DATA, PTX5_DATA, PTX4_DATA, |
| 2214 | PTX3_DATA, PTX2_DATA, PTX1_DATA, PTX0_DATA } |
| 2215 | }, |
| 2216 | { PINMUX_DATA_REG("PYDR", 0xffec0064, 8) { |
| 2217 | PTY7_DATA, PTY6_DATA, PTY5_DATA, PTY4_DATA, |
| 2218 | PTY3_DATA, PTY2_DATA, PTY1_DATA, PTY0_DATA } |
| 2219 | }, |
| 2220 | { PINMUX_DATA_REG("PZDR", 0xffec0066, 8) { |
| 2221 | PTZ7_DATA, PTZ6_DATA, PTZ5_DATA, PTZ4_DATA, |
| 2222 | PTZ3_DATA, PTZ2_DATA, PTZ1_DATA, PTZ0_DATA } |
| 2223 | }, |
| 2224 | { }, |
| 2225 | }; |
| 2226 | |
Laurent Pinchart | cd3c1be | 2013-02-16 18:47:05 +0100 | [diff] [blame] | 2227 | const struct sh_pfc_soc_info sh7757_pinmux_info = { |
Laurent Pinchart | 0bb9267 | 2012-12-15 23:51:37 +0100 | [diff] [blame] | 2228 | .name = "sh7757_pfc", |
Laurent Pinchart | 0bb9267 | 2012-12-15 23:51:37 +0100 | [diff] [blame] | 2229 | .input = { PINMUX_INPUT_BEGIN, PINMUX_INPUT_END }, |
Laurent Pinchart | 0bb9267 | 2012-12-15 23:51:37 +0100 | [diff] [blame] | 2230 | .output = { PINMUX_OUTPUT_BEGIN, PINMUX_OUTPUT_END }, |
Laurent Pinchart | 0bb9267 | 2012-12-15 23:51:37 +0100 | [diff] [blame] | 2231 | .function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END }, |
| 2232 | |
Laurent Pinchart | a373ed0 | 2012-11-29 13:24:07 +0100 | [diff] [blame] | 2233 | .pins = pinmux_pins, |
| 2234 | .nr_pins = ARRAY_SIZE(pinmux_pins), |
| 2235 | .func_gpios = pinmux_func_gpios, |
| 2236 | .nr_func_gpios = ARRAY_SIZE(pinmux_func_gpios), |
Laurent Pinchart | d7a7ca5 | 2012-11-28 17:51:00 +0100 | [diff] [blame] | 2237 | |
Laurent Pinchart | 0bb9267 | 2012-12-15 23:51:37 +0100 | [diff] [blame] | 2238 | .cfg_regs = pinmux_config_regs, |
| 2239 | .data_regs = pinmux_data_regs, |
| 2240 | |
| 2241 | .gpio_data = pinmux_data, |
| 2242 | .gpio_data_size = ARRAY_SIZE(pinmux_data), |
| 2243 | }; |