| Greg Kroah-Hartman | b244131 | 2017-11-01 15:07:57 +0100 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
| Russell King | ba02a21 | 2010-01-16 15:07:08 +0000 | [diff] [blame] | 2 | /* |
| 3 | * ARM timer implementation, found in Integrator, Versatile and Realview |
| 4 | * platforms. Not all platforms support all registers and bits in these |
| 5 | * registers, so we mark them with A for Integrator AP, C for Integrator |
| 6 | * CP, V for Versatile and R for Realview. |
| 7 | * |
| 8 | * Integrator AP has 16-bit timers, Integrator CP, Versatile and Realview |
| 9 | * can have 16-bit or 32-bit selectable via a bit in the control register. |
| Pawel Moll | 98ed4ce | 2012-01-25 15:37:29 +0000 | [diff] [blame] | 10 | * |
| 11 | * Every SP804 contains two identical timers. |
| Russell King | ba02a21 | 2010-01-16 15:07:08 +0000 | [diff] [blame] | 12 | */ |
| Pawel Moll | 98ed4ce | 2012-01-25 15:37:29 +0000 | [diff] [blame] | 13 | #define TIMER_1_BASE 0x00 |
| 14 | #define TIMER_2_BASE 0x20 |
| 15 | |
| Russell King | ba02a21 | 2010-01-16 15:07:08 +0000 | [diff] [blame] | 16 | #define TIMER_LOAD 0x00 /* ACVR rw */ |
| 17 | #define TIMER_VALUE 0x04 /* ACVR ro */ |
| 18 | #define TIMER_CTRL 0x08 /* ACVR rw */ |
| 19 | #define TIMER_CTRL_ONESHOT (1 << 0) /* CVR */ |
| 20 | #define TIMER_CTRL_32BIT (1 << 1) /* CVR */ |
| 21 | #define TIMER_CTRL_DIV1 (0 << 2) /* ACVR */ |
| 22 | #define TIMER_CTRL_DIV16 (1 << 2) /* ACVR */ |
| 23 | #define TIMER_CTRL_DIV256 (2 << 2) /* ACVR */ |
| 24 | #define TIMER_CTRL_IE (1 << 5) /* VR */ |
| 25 | #define TIMER_CTRL_PERIODIC (1 << 6) /* ACVR */ |
| 26 | #define TIMER_CTRL_ENABLE (1 << 7) /* ACVR */ |
| Russell King | b720f73 | 2005-06-29 15:15:54 +0100 | [diff] [blame] | 27 | |
| Russell King | ba02a21 | 2010-01-16 15:07:08 +0000 | [diff] [blame] | 28 | #define TIMER_INTCLR 0x0c /* ACVR wo */ |
| 29 | #define TIMER_RIS 0x10 /* CVR ro */ |
| 30 | #define TIMER_MIS 0x14 /* CVR ro */ |
| 31 | #define TIMER_BGLOAD 0x18 /* CVR rw */ |