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Mauro Carvalho Chehab459ee172017-12-01 08:47:12 -05001// SPDX-License-Identifier: GPL-2.0
2//
3// tvp5150 - Texas Instruments TVP5150A/AM1 and TVP5151 video decoder driver
4//
Mauro Carvalho Chehab32590812018-04-25 05:34:48 -04005// Copyright (c) 2005,2006 Mauro Carvalho Chehab <mchehab@kernel.org>
Mauro Carvalho Chehabcd4665c2005-11-08 21:36:40 -08006
Javier Martinez Canillasb802fb92016-02-05 17:09:56 -02007#include <dt-bindings/media/tvp5150.h>
Mauro Carvalho Chehabcd4665c2005-11-08 21:36:40 -08008#include <linux/i2c.h>
Tejun Heo5a0e3ad2010-03-24 17:04:11 +09009#include <linux/slab.h>
Hans Verkuil33b687c2008-07-25 05:32:50 -030010#include <linux/videodev2.h>
Mauro Carvalho Chehabcd4665c2005-11-08 21:36:40 -080011#include <linux/delay.h>
Javier Martinez Canillas09aa2602016-01-07 10:46:49 -020012#include <linux/gpio/consumer.h>
Philipp Zabel8e4c97e2018-06-28 12:20:44 -040013#include <linux/interrupt.h>
Paul Gortmaker7a707b82011-07-03 14:03:12 -040014#include <linux/module.h>
Sakari Ailus859969b2016-08-26 20:17:25 -030015#include <linux/of_graph.h>
Philipp Zabel28b9e222018-06-28 12:20:35 -040016#include <linux/regmap.h>
Javier Martinez Canillasc7d97492015-09-21 08:23:09 -030017#include <media/v4l2-async.h>
Hans Verkuil6b8fe022008-12-18 11:17:25 -030018#include <media/v4l2-device.h>
Hans Verkuil6c45ec72010-12-12 08:45:43 -030019#include <media/v4l2-ctrls.h>
Sakari Ailus859969b2016-08-26 20:17:25 -030020#include <media/v4l2-fwnode.h>
Mauro Carvalho Chehab55606312016-01-27 12:08:13 -020021#include <media/v4l2-mc.h>
Mauro Carvalho Chehabcd4665c2005-11-08 21:36:40 -080022
23#include "tvp5150_reg.h"
24
Philipp Zabel785a3de2014-02-27 13:44:47 -030025#define TVP5150_H_MAX 720U
26#define TVP5150_V_MAX_525_60 480U
27#define TVP5150_V_MAX_OTHERS 576U
Javier Martin963ddc62012-01-31 05:23:46 -030028#define TVP5150_MAX_CROP_LEFT 511
29#define TVP5150_MAX_CROP_TOP 127
30#define TVP5150_CROP_SHIFT 2
Marco Felsch5cb82942018-06-28 12:20:39 -040031#define TVP5150_MBUS_FMT MEDIA_BUS_FMT_UYVY8_2X8
32#define TVP5150_FIELD V4L2_FIELD_ALTERNATE
33#define TVP5150_COLORSPACE V4L2_COLORSPACE_SMPTE170M
Javier Martin963ddc62012-01-31 05:23:46 -030034
Mauro Carvalho Chehabc43875f2016-02-12 15:42:02 -020035MODULE_DESCRIPTION("Texas Instruments TVP5150A/TVP5150AM1/TVP5151 video decoder driver");
Mauro Carvalho Chehabcd4665c2005-11-08 21:36:40 -080036MODULE_AUTHOR("Mauro Carvalho Chehab");
Mauro Carvalho Chehab459ee172017-12-01 08:47:12 -050037MODULE_LICENSE("GPL v2");
Mauro Carvalho Chehabcd4665c2005-11-08 21:36:40 -080038
Mauro Carvalho Chehabcd4665c2005-11-08 21:36:40 -080039
Douglas Schilling Landgrafff699e62008-04-22 14:41:48 -030040static int debug;
Philipp Zabel2a0489d2014-02-27 13:44:48 -030041module_param(debug, int, 0644);
Hans Verkuil6b8fe022008-12-18 11:17:25 -030042MODULE_PARM_DESC(debug, "Debug level (0-2)");
Mauro Carvalho Chehabcd4665c2005-11-08 21:36:40 -080043
Mauro Carvalho Chehabad0e3742016-11-13 05:34:12 -020044#define dprintk0(__dev, __arg...) dev_dbg_lvl(__dev, 0, 0, __arg)
45
Mauro Carvalho Chehabbc322c02018-08-01 06:10:05 -040046enum tvp5150_pads {
47 TVP5150_PAD_IF_INPUT,
48 TVP5150_PAD_VID_OUT,
49 TVP5150_NUM_PADS
50};
51
Mauro Carvalho Chehabcd4665c2005-11-08 21:36:40 -080052struct tvp5150 {
Hans Verkuil6b8fe022008-12-18 11:17:25 -030053 struct v4l2_subdev sd;
Mauro Carvalho Chehab55606312016-01-27 12:08:13 -020054#ifdef CONFIG_MEDIA_CONTROLLER
Mauro Carvalho Chehabbc322c02018-08-01 06:10:05 -040055 struct media_pad pads[TVP5150_NUM_PADS];
Javier Martinez Canillasf7b4b542016-02-05 17:09:58 -020056 struct media_entity input_ent[TVP5150_INPUT_NUM];
57 struct media_pad input_pad[TVP5150_INPUT_NUM];
Mauro Carvalho Chehab55606312016-01-27 12:08:13 -020058#endif
Hans Verkuil6c45ec72010-12-12 08:45:43 -030059 struct v4l2_ctrl_handler hdl;
Javier Martin963ddc62012-01-31 05:23:46 -030060 struct v4l2_rect rect;
Philipp Zabel28b9e222018-06-28 12:20:35 -040061 struct regmap *regmap;
Philipp Zabel8e4c97e2018-06-28 12:20:44 -040062 int irq;
Mauro Carvalho Chehab84486d52005-11-08 21:36:41 -080063
Mauro Carvalho Chehab3ad96832006-01-23 17:11:05 -020064 v4l2_std_id norm; /* Current set standard */
Philipp Zabelb440b732018-06-28 12:20:40 -040065 v4l2_std_id detected_norm;
Hans Verkuil5325b422009-04-02 11:26:22 -030066 u32 input;
67 u32 output;
Philipp Zabel62a764e2018-06-28 12:20:45 -040068 u32 oe;
Mauro Carvalho Chehab84486d52005-11-08 21:36:41 -080069 int enable;
Philipp Zabel8e4c97e2018-06-28 12:20:44 -040070 bool lock;
Javier Martinez Canillasa2e5f1b2016-01-07 10:46:50 -020071
Javier Martinez Canillas82275132016-02-05 17:09:54 -020072 u16 dev_id;
73 u16 rom_ver;
74
Javier Martinez Canillasa2e5f1b2016-01-07 10:46:50 -020075 enum v4l2_mbus_type mbus_type;
Mauro Carvalho Chehabcd4665c2005-11-08 21:36:40 -080076};
77
Hans Verkuil6b8fe022008-12-18 11:17:25 -030078static inline struct tvp5150 *to_tvp5150(struct v4l2_subdev *sd)
Mauro Carvalho Chehabcd4665c2005-11-08 21:36:40 -080079{
Hans Verkuil6b8fe022008-12-18 11:17:25 -030080 return container_of(sd, struct tvp5150, sd);
81}
82
Hans Verkuil6c45ec72010-12-12 08:45:43 -030083static inline struct v4l2_subdev *to_sd(struct v4l2_ctrl *ctrl)
84{
85 return &container_of(ctrl->handler, struct tvp5150, hdl)->sd;
86}
87
Hans Verkuil6b8fe022008-12-18 11:17:25 -030088static int tvp5150_read(struct v4l2_subdev *sd, unsigned char addr)
89{
Philipp Zabel28b9e222018-06-28 12:20:35 -040090 struct tvp5150 *decoder = to_tvp5150(sd);
91 int ret, val;
Mauro Carvalho Chehabcd4665c2005-11-08 21:36:40 -080092
Philipp Zabel28b9e222018-06-28 12:20:35 -040093 ret = regmap_read(decoder->regmap, addr, &val);
94 if (ret < 0)
95 return ret;
Mauro Carvalho Chehabe1bc80a2006-01-09 15:25:36 -020096
Philipp Zabel28b9e222018-06-28 12:20:35 -040097 return val;
Mauro Carvalho Chehabcd4665c2005-11-08 21:36:40 -080098}
99
Hans Verkuil6b8fe022008-12-18 11:17:25 -0300100static void dump_reg_range(struct v4l2_subdev *sd, char *s, u8 init,
101 const u8 end, int max_line)
Mauro Carvalho Chehab3ad96832006-01-23 17:11:05 -0200102{
Mauro Carvalho Chehabe5134112016-10-20 11:36:42 -0200103 u8 buf[16];
104 int i = 0, j, len;
Mauro Carvalho Chehab3ad96832006-01-23 17:11:05 -0200105
Mauro Carvalho Chehabe5134112016-10-20 11:36:42 -0200106 if (max_line > 16) {
107 dprintk0(sd->dev, "too much data to dump\n");
108 return;
Mauro Carvalho Chehab3ad96832006-01-23 17:11:05 -0200109 }
Mauro Carvalho Chehabe5134112016-10-20 11:36:42 -0200110
111 for (i = init; i < end; i += max_line) {
112 len = (end - i > max_line) ? max_line : end - i;
113
114 for (j = 0; j < len; j++)
115 buf[j] = tvp5150_read(sd, i + j);
116
117 dprintk0(sd->dev, "%s reg %02x = %*ph\n", s, i, len, buf);
118 }
Mauro Carvalho Chehab3ad96832006-01-23 17:11:05 -0200119}
120
Hans Verkuil6b8fe022008-12-18 11:17:25 -0300121static int tvp5150_log_status(struct v4l2_subdev *sd)
Mauro Carvalho Chehabcd4665c2005-11-08 21:36:40 -0800122{
Mauro Carvalho Chehabad0e3742016-11-13 05:34:12 -0200123 dprintk0(sd->dev, "tvp5150: Video input source selection #1 = 0x%02x\n",
124 tvp5150_read(sd, TVP5150_VD_IN_SRC_SEL_1));
125 dprintk0(sd->dev, "tvp5150: Analog channel controls = 0x%02x\n",
126 tvp5150_read(sd, TVP5150_ANAL_CHL_CTL));
127 dprintk0(sd->dev, "tvp5150: Operation mode controls = 0x%02x\n",
128 tvp5150_read(sd, TVP5150_OP_MODE_CTL));
129 dprintk0(sd->dev, "tvp5150: Miscellaneous controls = 0x%02x\n",
130 tvp5150_read(sd, TVP5150_MISC_CTL));
131 dprintk0(sd->dev, "tvp5150: Autoswitch mask= 0x%02x\n",
132 tvp5150_read(sd, TVP5150_AUTOSW_MSK));
133 dprintk0(sd->dev, "tvp5150: Color killer threshold control = 0x%02x\n",
134 tvp5150_read(sd, TVP5150_COLOR_KIL_THSH_CTL));
135 dprintk0(sd->dev, "tvp5150: Luminance processing controls #1 #2 and #3 = %02x %02x %02x\n",
136 tvp5150_read(sd, TVP5150_LUMA_PROC_CTL_1),
137 tvp5150_read(sd, TVP5150_LUMA_PROC_CTL_2),
138 tvp5150_read(sd, TVP5150_LUMA_PROC_CTL_3));
139 dprintk0(sd->dev, "tvp5150: Brightness control = 0x%02x\n",
140 tvp5150_read(sd, TVP5150_BRIGHT_CTL));
141 dprintk0(sd->dev, "tvp5150: Color saturation control = 0x%02x\n",
142 tvp5150_read(sd, TVP5150_SATURATION_CTL));
143 dprintk0(sd->dev, "tvp5150: Hue control = 0x%02x\n",
144 tvp5150_read(sd, TVP5150_HUE_CTL));
145 dprintk0(sd->dev, "tvp5150: Contrast control = 0x%02x\n",
146 tvp5150_read(sd, TVP5150_CONTRAST_CTL));
147 dprintk0(sd->dev, "tvp5150: Outputs and data rates select = 0x%02x\n",
148 tvp5150_read(sd, TVP5150_DATA_RATE_SEL));
149 dprintk0(sd->dev, "tvp5150: Configuration shared pins = 0x%02x\n",
150 tvp5150_read(sd, TVP5150_CONF_SHARED_PIN));
151 dprintk0(sd->dev, "tvp5150: Active video cropping start = 0x%02x%02x\n",
152 tvp5150_read(sd, TVP5150_ACT_VD_CROP_ST_MSB),
153 tvp5150_read(sd, TVP5150_ACT_VD_CROP_ST_LSB));
154 dprintk0(sd->dev, "tvp5150: Active video cropping stop = 0x%02x%02x\n",
155 tvp5150_read(sd, TVP5150_ACT_VD_CROP_STP_MSB),
156 tvp5150_read(sd, TVP5150_ACT_VD_CROP_STP_LSB));
157 dprintk0(sd->dev, "tvp5150: Genlock/RTC = 0x%02x\n",
158 tvp5150_read(sd, TVP5150_GENLOCK));
159 dprintk0(sd->dev, "tvp5150: Horizontal sync start = 0x%02x\n",
160 tvp5150_read(sd, TVP5150_HORIZ_SYNC_START));
161 dprintk0(sd->dev, "tvp5150: Vertical blanking start = 0x%02x\n",
162 tvp5150_read(sd, TVP5150_VERT_BLANKING_START));
163 dprintk0(sd->dev, "tvp5150: Vertical blanking stop = 0x%02x\n",
164 tvp5150_read(sd, TVP5150_VERT_BLANKING_STOP));
165 dprintk0(sd->dev, "tvp5150: Chrominance processing control #1 and #2 = %02x %02x\n",
166 tvp5150_read(sd, TVP5150_CHROMA_PROC_CTL_1),
167 tvp5150_read(sd, TVP5150_CHROMA_PROC_CTL_2));
168 dprintk0(sd->dev, "tvp5150: Interrupt reset register B = 0x%02x\n",
169 tvp5150_read(sd, TVP5150_INT_RESET_REG_B));
170 dprintk0(sd->dev, "tvp5150: Interrupt enable register B = 0x%02x\n",
171 tvp5150_read(sd, TVP5150_INT_ENABLE_REG_B));
172 dprintk0(sd->dev, "tvp5150: Interrupt configuration register B = 0x%02x\n",
173 tvp5150_read(sd, TVP5150_INTT_CONFIG_REG_B));
174 dprintk0(sd->dev, "tvp5150: Video standard = 0x%02x\n",
175 tvp5150_read(sd, TVP5150_VIDEO_STD));
176 dprintk0(sd->dev, "tvp5150: Chroma gain factor: Cb=0x%02x Cr=0x%02x\n",
177 tvp5150_read(sd, TVP5150_CB_GAIN_FACT),
178 tvp5150_read(sd, TVP5150_CR_GAIN_FACTOR));
179 dprintk0(sd->dev, "tvp5150: Macrovision on counter = 0x%02x\n",
180 tvp5150_read(sd, TVP5150_MACROVISION_ON_CTR));
181 dprintk0(sd->dev, "tvp5150: Macrovision off counter = 0x%02x\n",
182 tvp5150_read(sd, TVP5150_MACROVISION_OFF_CTR));
183 dprintk0(sd->dev, "tvp5150: ITU-R BT.656.%d timing(TVP5150AM1 only)\n",
184 (tvp5150_read(sd, TVP5150_REV_SELECT) & 1) ? 3 : 4);
185 dprintk0(sd->dev, "tvp5150: Device ID = %02x%02x\n",
186 tvp5150_read(sd, TVP5150_MSB_DEV_ID),
187 tvp5150_read(sd, TVP5150_LSB_DEV_ID));
188 dprintk0(sd->dev, "tvp5150: ROM version = (hex) %02x.%02x\n",
189 tvp5150_read(sd, TVP5150_ROM_MAJOR_VER),
190 tvp5150_read(sd, TVP5150_ROM_MINOR_VER));
191 dprintk0(sd->dev, "tvp5150: Vertical line count = 0x%02x%02x\n",
192 tvp5150_read(sd, TVP5150_VERT_LN_COUNT_MSB),
193 tvp5150_read(sd, TVP5150_VERT_LN_COUNT_LSB));
194 dprintk0(sd->dev, "tvp5150: Interrupt status register B = 0x%02x\n",
195 tvp5150_read(sd, TVP5150_INT_STATUS_REG_B));
196 dprintk0(sd->dev, "tvp5150: Interrupt active register B = 0x%02x\n",
197 tvp5150_read(sd, TVP5150_INT_ACTIVE_REG_B));
198 dprintk0(sd->dev, "tvp5150: Status regs #1 to #5 = %02x %02x %02x %02x %02x\n",
199 tvp5150_read(sd, TVP5150_STATUS_REG_1),
200 tvp5150_read(sd, TVP5150_STATUS_REG_2),
201 tvp5150_read(sd, TVP5150_STATUS_REG_3),
202 tvp5150_read(sd, TVP5150_STATUS_REG_4),
203 tvp5150_read(sd, TVP5150_STATUS_REG_5));
Mauro Carvalho Chehab3ad96832006-01-23 17:11:05 -0200204
Hans Verkuil6b8fe022008-12-18 11:17:25 -0300205 dump_reg_range(sd, "Teletext filter 1", TVP5150_TELETEXT_FIL1_INI,
206 TVP5150_TELETEXT_FIL1_END, 8);
207 dump_reg_range(sd, "Teletext filter 2", TVP5150_TELETEXT_FIL2_INI,
208 TVP5150_TELETEXT_FIL2_END, 8);
Mauro Carvalho Chehab3ad96832006-01-23 17:11:05 -0200209
Mauro Carvalho Chehabad0e3742016-11-13 05:34:12 -0200210 dprintk0(sd->dev, "tvp5150: Teletext filter enable = 0x%02x\n",
211 tvp5150_read(sd, TVP5150_TELETEXT_FIL_ENA));
212 dprintk0(sd->dev, "tvp5150: Interrupt status register A = 0x%02x\n",
213 tvp5150_read(sd, TVP5150_INT_STATUS_REG_A));
214 dprintk0(sd->dev, "tvp5150: Interrupt enable register A = 0x%02x\n",
215 tvp5150_read(sd, TVP5150_INT_ENABLE_REG_A));
216 dprintk0(sd->dev, "tvp5150: Interrupt configuration = 0x%02x\n",
217 tvp5150_read(sd, TVP5150_INT_CONF));
218 dprintk0(sd->dev, "tvp5150: VDP status register = 0x%02x\n",
219 tvp5150_read(sd, TVP5150_VDP_STATUS_REG));
220 dprintk0(sd->dev, "tvp5150: FIFO word count = 0x%02x\n",
221 tvp5150_read(sd, TVP5150_FIFO_WORD_COUNT));
222 dprintk0(sd->dev, "tvp5150: FIFO interrupt threshold = 0x%02x\n",
223 tvp5150_read(sd, TVP5150_FIFO_INT_THRESHOLD));
224 dprintk0(sd->dev, "tvp5150: FIFO reset = 0x%02x\n",
225 tvp5150_read(sd, TVP5150_FIFO_RESET));
226 dprintk0(sd->dev, "tvp5150: Line number interrupt = 0x%02x\n",
227 tvp5150_read(sd, TVP5150_LINE_NUMBER_INT));
228 dprintk0(sd->dev, "tvp5150: Pixel alignment register = 0x%02x%02x\n",
229 tvp5150_read(sd, TVP5150_PIX_ALIGN_REG_HIGH),
230 tvp5150_read(sd, TVP5150_PIX_ALIGN_REG_LOW));
231 dprintk0(sd->dev, "tvp5150: FIFO output control = 0x%02x\n",
232 tvp5150_read(sd, TVP5150_FIFO_OUT_CTRL));
233 dprintk0(sd->dev, "tvp5150: Full field enable = 0x%02x\n",
234 tvp5150_read(sd, TVP5150_FULL_FIELD_ENA));
235 dprintk0(sd->dev, "tvp5150: Full field mode register = 0x%02x\n",
236 tvp5150_read(sd, TVP5150_FULL_FIELD_MODE_REG));
Mauro Carvalho Chehab3ad96832006-01-23 17:11:05 -0200237
Hans Verkuil6b8fe022008-12-18 11:17:25 -0300238 dump_reg_range(sd, "CC data", TVP5150_CC_DATA_INI,
239 TVP5150_CC_DATA_END, 8);
Mauro Carvalho Chehab3ad96832006-01-23 17:11:05 -0200240
Hans Verkuil6b8fe022008-12-18 11:17:25 -0300241 dump_reg_range(sd, "WSS data", TVP5150_WSS_DATA_INI,
242 TVP5150_WSS_DATA_END, 8);
Mauro Carvalho Chehab3ad96832006-01-23 17:11:05 -0200243
Hans Verkuil6b8fe022008-12-18 11:17:25 -0300244 dump_reg_range(sd, "VPS data", TVP5150_VPS_DATA_INI,
245 TVP5150_VPS_DATA_END, 8);
Mauro Carvalho Chehab3ad96832006-01-23 17:11:05 -0200246
Hans Verkuil6b8fe022008-12-18 11:17:25 -0300247 dump_reg_range(sd, "VITC data", TVP5150_VITC_DATA_INI,
248 TVP5150_VITC_DATA_END, 10);
Mauro Carvalho Chehab3ad96832006-01-23 17:11:05 -0200249
Hans Verkuil6b8fe022008-12-18 11:17:25 -0300250 dump_reg_range(sd, "Line mode", TVP5150_LINE_MODE_INI,
251 TVP5150_LINE_MODE_END, 8);
252 return 0;
Mauro Carvalho Chehabcd4665c2005-11-08 21:36:40 -0800253}
254
255/****************************************************************************
256 Basic functions
257 ****************************************************************************/
Mauro Carvalho Chehabcd4665c2005-11-08 21:36:40 -0800258
Laurent Pinchart6e98bee2016-12-08 20:22:42 -0200259static void tvp5150_selmux(struct v4l2_subdev *sd)
Mauro Carvalho Chehabcd4665c2005-11-08 21:36:40 -0800260{
Paul Walmsley2962fc02010-10-09 01:31:40 -0300261 int opmode = 0;
Hans Verkuil6b8fe022008-12-18 11:17:25 -0300262 struct tvp5150 *decoder = to_tvp5150(sd);
Marco Felsch8a7441b2018-06-28 12:20:36 -0400263 unsigned int mask, val;
Hans Verkuilc7c0b342006-04-02 13:35:00 -0300264 int input = 0;
Mauro Carvalho Chehab84486d52005-11-08 21:36:41 -0800265
Mauro Carvalho Chehabc43875f2016-02-12 15:42:02 -0200266 /* Only tvp5150am1 and tvp5151 have signal generator support */
267 if ((decoder->dev_id == 0x5150 && decoder->rom_ver == 0x0400) ||
268 (decoder->dev_id == 0x5151 && decoder->rom_ver == 0x0100)) {
269 if (!decoder->enable)
270 input = 8;
271 }
Mauro Carvalho Chehab4c86f972005-11-08 21:36:43 -0800272
Hans Verkuil5325b422009-04-02 11:26:22 -0300273 switch (decoder->input) {
Hans Verkuilc7c0b342006-04-02 13:35:00 -0300274 case TVP5150_COMPOSITE1:
275 input |= 2;
276 /* fall through */
277 case TVP5150_COMPOSITE0:
Mauro Carvalho Chehabc0477ad2006-01-09 15:25:14 -0200278 break;
Hans Verkuilc7c0b342006-04-02 13:35:00 -0300279 case TVP5150_SVIDEO:
Mauro Carvalho Chehabc0477ad2006-01-09 15:25:14 -0200280 default:
Hans Verkuilc7c0b342006-04-02 13:35:00 -0300281 input |= 1;
Mauro Carvalho Chehabc0477ad2006-01-09 15:25:14 -0200282 break;
283 }
284
Mauro Carvalho Chehab257e29f2016-11-16 08:58:05 -0200285 dev_dbg_lvl(sd->dev, 1, debug, "Selecting video route: route input=%i, output=%i => tvp5150 input=%i, opmode=%i\n",
Hans Verkuil5325b422009-04-02 11:26:22 -0300286 decoder->input, decoder->output,
287 input, opmode);
Mauro Carvalho Chehab12500f02006-08-18 07:31:10 -0300288
Philipp Zabel28b9e222018-06-28 12:20:35 -0400289 regmap_write(decoder->regmap, TVP5150_OP_MODE_CTL, opmode);
290 regmap_write(decoder->regmap, TVP5150_VD_IN_SRC_SEL_1, input);
Mauro Carvalho Chehabf4b8b3a2007-11-03 22:40:24 -0300291
Laurent Pinchartb4b2de32016-12-09 09:47:18 -0200292 /*
293 * Setup the FID/GLCO/VLK/HVLK and INTREQ/GPCL/VBLK output signals. For
294 * S-Video we output the vertical lock (VLK) signal on FID/GLCO/VLK/HVLK
295 * and set INTREQ/GPCL/VBLK to logic 0. For composite we output the
296 * field indicator (FID) signal on FID/GLCO/VLK/HVLK and set
297 * INTREQ/GPCL/VBLK to logic 1.
Mauro Carvalho Chehabf4b8b3a2007-11-03 22:40:24 -0300298 */
Marco Felsch8a7441b2018-06-28 12:20:36 -0400299 mask = TVP5150_MISC_CTL_GPCL | TVP5150_MISC_CTL_HVLK;
Hans Verkuil5325b422009-04-02 11:26:22 -0300300 if (decoder->input == TVP5150_SVIDEO)
Marco Felsch8a7441b2018-06-28 12:20:36 -0400301 val = TVP5150_MISC_CTL_HVLK;
Mauro Carvalho Chehabf4b8b3a2007-11-03 22:40:24 -0300302 else
Marco Felsch8a7441b2018-06-28 12:20:36 -0400303 val = TVP5150_MISC_CTL_GPCL;
304 regmap_update_bits(decoder->regmap, TVP5150_MISC_CTL, mask, val);
Mauro Carvalho Chehabcd4665c2005-11-08 21:36:40 -0800305};
306
Mauro Carvalho Chehabe1bc80a2006-01-09 15:25:36 -0200307struct i2c_reg_value {
308 unsigned char reg;
309 unsigned char value;
310};
311
312/* Default values as sugested at TVP5150AM1 datasheet */
313static const struct i2c_reg_value tvp5150_init_default[] = {
314 { /* 0x00 */
Nasser Afshin4efcd5e2018-04-02 18:23:17 -0400315 TVP5150_VD_IN_SRC_SEL_1, 0x00
Mauro Carvalho Chehabe1bc80a2006-01-09 15:25:36 -0200316 },
317 { /* 0x01 */
Nasser Afshin4efcd5e2018-04-02 18:23:17 -0400318 TVP5150_ANAL_CHL_CTL, 0x15
Mauro Carvalho Chehabe1bc80a2006-01-09 15:25:36 -0200319 },
320 { /* 0x02 */
Nasser Afshin4efcd5e2018-04-02 18:23:17 -0400321 TVP5150_OP_MODE_CTL, 0x00
Mauro Carvalho Chehabe1bc80a2006-01-09 15:25:36 -0200322 },
323 { /* 0x03 */
Nasser Afshin4efcd5e2018-04-02 18:23:17 -0400324 TVP5150_MISC_CTL, 0x01
Mauro Carvalho Chehabe1bc80a2006-01-09 15:25:36 -0200325 },
326 { /* 0x06 */
Nasser Afshin4efcd5e2018-04-02 18:23:17 -0400327 TVP5150_COLOR_KIL_THSH_CTL, 0x10
Mauro Carvalho Chehabe1bc80a2006-01-09 15:25:36 -0200328 },
329 { /* 0x07 */
Nasser Afshin4efcd5e2018-04-02 18:23:17 -0400330 TVP5150_LUMA_PROC_CTL_1, 0x60
Mauro Carvalho Chehabe1bc80a2006-01-09 15:25:36 -0200331 },
332 { /* 0x08 */
Nasser Afshin4efcd5e2018-04-02 18:23:17 -0400333 TVP5150_LUMA_PROC_CTL_2, 0x00
Mauro Carvalho Chehabe1bc80a2006-01-09 15:25:36 -0200334 },
335 { /* 0x09 */
Nasser Afshin4efcd5e2018-04-02 18:23:17 -0400336 TVP5150_BRIGHT_CTL, 0x80
Mauro Carvalho Chehabe1bc80a2006-01-09 15:25:36 -0200337 },
338 { /* 0x0a */
Nasser Afshin4efcd5e2018-04-02 18:23:17 -0400339 TVP5150_SATURATION_CTL, 0x80
Mauro Carvalho Chehabe1bc80a2006-01-09 15:25:36 -0200340 },
341 { /* 0x0b */
Nasser Afshin4efcd5e2018-04-02 18:23:17 -0400342 TVP5150_HUE_CTL, 0x00
Mauro Carvalho Chehabe1bc80a2006-01-09 15:25:36 -0200343 },
344 { /* 0x0c */
Nasser Afshin4efcd5e2018-04-02 18:23:17 -0400345 TVP5150_CONTRAST_CTL, 0x80
Mauro Carvalho Chehabe1bc80a2006-01-09 15:25:36 -0200346 },
347 { /* 0x0d */
Nasser Afshin4efcd5e2018-04-02 18:23:17 -0400348 TVP5150_DATA_RATE_SEL, 0x47
Mauro Carvalho Chehabe1bc80a2006-01-09 15:25:36 -0200349 },
350 { /* 0x0e */
Nasser Afshin4efcd5e2018-04-02 18:23:17 -0400351 TVP5150_LUMA_PROC_CTL_3, 0x00
Mauro Carvalho Chehabe1bc80a2006-01-09 15:25:36 -0200352 },
353 { /* 0x0f */
Nasser Afshin4efcd5e2018-04-02 18:23:17 -0400354 TVP5150_CONF_SHARED_PIN, 0x08
Mauro Carvalho Chehabe1bc80a2006-01-09 15:25:36 -0200355 },
356 { /* 0x11 */
Nasser Afshin4efcd5e2018-04-02 18:23:17 -0400357 TVP5150_ACT_VD_CROP_ST_MSB, 0x00
Mauro Carvalho Chehabe1bc80a2006-01-09 15:25:36 -0200358 },
359 { /* 0x12 */
Nasser Afshin4efcd5e2018-04-02 18:23:17 -0400360 TVP5150_ACT_VD_CROP_ST_LSB, 0x00
Mauro Carvalho Chehabe1bc80a2006-01-09 15:25:36 -0200361 },
362 { /* 0x13 */
Nasser Afshin4efcd5e2018-04-02 18:23:17 -0400363 TVP5150_ACT_VD_CROP_STP_MSB, 0x00
Mauro Carvalho Chehabe1bc80a2006-01-09 15:25:36 -0200364 },
365 { /* 0x14 */
Nasser Afshin4efcd5e2018-04-02 18:23:17 -0400366 TVP5150_ACT_VD_CROP_STP_LSB, 0x00
Mauro Carvalho Chehabe1bc80a2006-01-09 15:25:36 -0200367 },
368 { /* 0x15 */
Nasser Afshin4efcd5e2018-04-02 18:23:17 -0400369 TVP5150_GENLOCK, 0x01
Mauro Carvalho Chehabe1bc80a2006-01-09 15:25:36 -0200370 },
371 { /* 0x16 */
Nasser Afshin4efcd5e2018-04-02 18:23:17 -0400372 TVP5150_HORIZ_SYNC_START, 0x80
Mauro Carvalho Chehabe1bc80a2006-01-09 15:25:36 -0200373 },
374 { /* 0x18 */
Nasser Afshin4efcd5e2018-04-02 18:23:17 -0400375 TVP5150_VERT_BLANKING_START, 0x00
Mauro Carvalho Chehabe1bc80a2006-01-09 15:25:36 -0200376 },
377 { /* 0x19 */
Nasser Afshin4efcd5e2018-04-02 18:23:17 -0400378 TVP5150_VERT_BLANKING_STOP, 0x00
Mauro Carvalho Chehabe1bc80a2006-01-09 15:25:36 -0200379 },
380 { /* 0x1a */
Nasser Afshin4efcd5e2018-04-02 18:23:17 -0400381 TVP5150_CHROMA_PROC_CTL_1, 0x0c
Mauro Carvalho Chehabe1bc80a2006-01-09 15:25:36 -0200382 },
383 { /* 0x1b */
Nasser Afshin4efcd5e2018-04-02 18:23:17 -0400384 TVP5150_CHROMA_PROC_CTL_2, 0x14
Mauro Carvalho Chehabe1bc80a2006-01-09 15:25:36 -0200385 },
386 { /* 0x1c */
Nasser Afshin4efcd5e2018-04-02 18:23:17 -0400387 TVP5150_INT_RESET_REG_B, 0x00
Mauro Carvalho Chehabe1bc80a2006-01-09 15:25:36 -0200388 },
389 { /* 0x1d */
Nasser Afshin4efcd5e2018-04-02 18:23:17 -0400390 TVP5150_INT_ENABLE_REG_B, 0x00
Mauro Carvalho Chehabe1bc80a2006-01-09 15:25:36 -0200391 },
392 { /* 0x1e */
Nasser Afshin4efcd5e2018-04-02 18:23:17 -0400393 TVP5150_INTT_CONFIG_REG_B, 0x00
Mauro Carvalho Chehabe1bc80a2006-01-09 15:25:36 -0200394 },
395 { /* 0x28 */
Nasser Afshin4efcd5e2018-04-02 18:23:17 -0400396 TVP5150_VIDEO_STD, 0x00
Mauro Carvalho Chehabe1bc80a2006-01-09 15:25:36 -0200397 },
398 { /* 0x2e */
Nasser Afshin4efcd5e2018-04-02 18:23:17 -0400399 TVP5150_MACROVISION_ON_CTR, 0x0f
Mauro Carvalho Chehabe1bc80a2006-01-09 15:25:36 -0200400 },
401 { /* 0x2f */
Nasser Afshin4efcd5e2018-04-02 18:23:17 -0400402 TVP5150_MACROVISION_OFF_CTR, 0x01
Mauro Carvalho Chehabe1bc80a2006-01-09 15:25:36 -0200403 },
404 { /* 0xbb */
Nasser Afshin4efcd5e2018-04-02 18:23:17 -0400405 TVP5150_TELETEXT_FIL_ENA, 0x00
Mauro Carvalho Chehabe1bc80a2006-01-09 15:25:36 -0200406 },
407 { /* 0xc0 */
Nasser Afshin4efcd5e2018-04-02 18:23:17 -0400408 TVP5150_INT_STATUS_REG_A, 0x00
Mauro Carvalho Chehabe1bc80a2006-01-09 15:25:36 -0200409 },
410 { /* 0xc1 */
Nasser Afshin4efcd5e2018-04-02 18:23:17 -0400411 TVP5150_INT_ENABLE_REG_A, 0x00
Mauro Carvalho Chehabe1bc80a2006-01-09 15:25:36 -0200412 },
413 { /* 0xc2 */
Nasser Afshin4efcd5e2018-04-02 18:23:17 -0400414 TVP5150_INT_CONF, 0x04
Mauro Carvalho Chehabe1bc80a2006-01-09 15:25:36 -0200415 },
416 { /* 0xc8 */
Nasser Afshin4efcd5e2018-04-02 18:23:17 -0400417 TVP5150_FIFO_INT_THRESHOLD, 0x80
Mauro Carvalho Chehabe1bc80a2006-01-09 15:25:36 -0200418 },
419 { /* 0xc9 */
Nasser Afshin4efcd5e2018-04-02 18:23:17 -0400420 TVP5150_FIFO_RESET, 0x00
Mauro Carvalho Chehabe1bc80a2006-01-09 15:25:36 -0200421 },
422 { /* 0xca */
Nasser Afshin4efcd5e2018-04-02 18:23:17 -0400423 TVP5150_LINE_NUMBER_INT, 0x00
Mauro Carvalho Chehabe1bc80a2006-01-09 15:25:36 -0200424 },
425 { /* 0xcb */
Nasser Afshin4efcd5e2018-04-02 18:23:17 -0400426 TVP5150_PIX_ALIGN_REG_LOW, 0x4e
Mauro Carvalho Chehabe1bc80a2006-01-09 15:25:36 -0200427 },
428 { /* 0xcc */
Nasser Afshin4efcd5e2018-04-02 18:23:17 -0400429 TVP5150_PIX_ALIGN_REG_HIGH, 0x00
Mauro Carvalho Chehabe1bc80a2006-01-09 15:25:36 -0200430 },
431 { /* 0xcd */
Nasser Afshin4efcd5e2018-04-02 18:23:17 -0400432 TVP5150_FIFO_OUT_CTRL, 0x01
Mauro Carvalho Chehabe1bc80a2006-01-09 15:25:36 -0200433 },
434 { /* 0xcf */
Nasser Afshin4efcd5e2018-04-02 18:23:17 -0400435 TVP5150_FULL_FIELD_ENA, 0x00
Mauro Carvalho Chehabe1bc80a2006-01-09 15:25:36 -0200436 },
437 { /* 0xd0 */
Nasser Afshin4efcd5e2018-04-02 18:23:17 -0400438 TVP5150_LINE_MODE_INI, 0x00
Mauro Carvalho Chehabe1bc80a2006-01-09 15:25:36 -0200439 },
440 { /* 0xfc */
Nasser Afshin4efcd5e2018-04-02 18:23:17 -0400441 TVP5150_FULL_FIELD_MODE_REG, 0x7f
Mauro Carvalho Chehabe1bc80a2006-01-09 15:25:36 -0200442 },
443 { /* end of data */
Nasser Afshin4efcd5e2018-04-02 18:23:17 -0400444 0xff, 0xff
Mauro Carvalho Chehabe1bc80a2006-01-09 15:25:36 -0200445 }
446};
447
448/* Default values as sugested at TVP5150AM1 datasheet */
449static const struct i2c_reg_value tvp5150_init_enable[] = {
Philipp Zabel8105e1b2018-06-28 12:20:43 -0400450 { /* Automatic offset and AGC enabled */
Mauro Carvalho Chehabe1bc80a2006-01-09 15:25:36 -0200451 TVP5150_ANAL_CHL_CTL, 0x15
Nasser Afshin4efcd5e2018-04-02 18:23:17 -0400452 }, { /* Activate YCrCb output 0x9 or 0xd ? */
Laurent Pinchartb4b2de32016-12-09 09:47:18 -0200453 TVP5150_MISC_CTL, TVP5150_MISC_CTL_GPCL |
454 TVP5150_MISC_CTL_INTREQ_OE |
455 TVP5150_MISC_CTL_YCBCR_OE |
456 TVP5150_MISC_CTL_SYNC_OE |
457 TVP5150_MISC_CTL_VBLANK |
458 TVP5150_MISC_CTL_CLOCK_OE,
Nasser Afshin4efcd5e2018-04-02 18:23:17 -0400459 }, { /* Activates video std autodetection for all standards */
Mauro Carvalho Chehabe1bc80a2006-01-09 15:25:36 -0200460 TVP5150_AUTOSW_MSK, 0x0
Nasser Afshin4efcd5e2018-04-02 18:23:17 -0400461 }, { /* Default format: 0x47. For 4:2:2: 0x40 */
Mauro Carvalho Chehabe1bc80a2006-01-09 15:25:36 -0200462 TVP5150_DATA_RATE_SEL, 0x47
Nasser Afshin4efcd5e2018-04-02 18:23:17 -0400463 }, {
Mauro Carvalho Chehabe1bc80a2006-01-09 15:25:36 -0200464 TVP5150_CHROMA_PROC_CTL_1, 0x0c
Nasser Afshin4efcd5e2018-04-02 18:23:17 -0400465 }, {
Mauro Carvalho Chehabe1bc80a2006-01-09 15:25:36 -0200466 TVP5150_CHROMA_PROC_CTL_2, 0x54
Nasser Afshin4efcd5e2018-04-02 18:23:17 -0400467 }, { /* Non documented, but initialized on WinTV USB2 */
Mauro Carvalho Chehabe1bc80a2006-01-09 15:25:36 -0200468 0x27, 0x20
Nasser Afshin4efcd5e2018-04-02 18:23:17 -0400469 }, {
470 0xff, 0xff
Mauro Carvalho Chehabe1bc80a2006-01-09 15:25:36 -0200471 }
472};
473
Mauro Carvalho Chehab6ac48b42006-01-23 17:11:05 -0200474struct tvp5150_vbi_type {
475 unsigned int vbi_type;
476 unsigned int ini_line;
477 unsigned int end_line;
478 unsigned int by_field :1;
Mauro Carvalho Chehabe1bc80a2006-01-09 15:25:36 -0200479};
480
Mauro Carvalho Chehab6ac48b42006-01-23 17:11:05 -0200481struct i2c_vbi_ram_value {
482 u16 reg;
483 struct tvp5150_vbi_type type;
484 unsigned char values[16];
485};
486
487/* This struct have the values for each supported VBI Standard
488 * by
489 tvp5150_vbi_types should follow the same order as vbi_ram_default
Mauro Carvalho Chehab3ad96832006-01-23 17:11:05 -0200490 * value 0 means rom position 0x10, value 1 means rom position 0x30
491 * and so on. There are 16 possible locations from 0 to 15.
492 */
Mauro Carvalho Chehab3ad96832006-01-23 17:11:05 -0200493
Nasser Afshin65dc7602018-04-02 18:23:19 -0400494static struct i2c_vbi_ram_value vbi_ram_default[] = {
495
Nasser Afshin9bfd8f82018-04-02 18:23:18 -0400496 /*
497 * FIXME: Current api doesn't handle all VBI types, those not
498 * yet supported are placed under #if 0
499 */
Hans Verkuil9bc74002006-03-29 18:02:51 -0300500#if 0
Mauro Carvalho Chehab3dd6b562018-02-19 13:23:39 -0500501 [0] = {0x010, /* Teletext, SECAM, WST System A */
Nasser Afshin4efcd5e2018-04-02 18:23:17 -0400502 {V4L2_SLICED_TELETEXT_SECAM, 6, 23, 1},
Mauro Carvalho Chehab6ac48b42006-01-23 17:11:05 -0200503 { 0xaa, 0xaa, 0xff, 0xff, 0xe7, 0x2e, 0x20, 0x26,
504 0xe6, 0xb4, 0x0e, 0x00, 0x00, 0x00, 0x10, 0x00 }
Mauro Carvalho Chehabe1bc80a2006-01-09 15:25:36 -0200505 },
Hans Verkuil9bc74002006-03-29 18:02:51 -0300506#endif
Mauro Carvalho Chehab3dd6b562018-02-19 13:23:39 -0500507 [1] = {0x030, /* Teletext, PAL, WST System B */
Nasser Afshin4efcd5e2018-04-02 18:23:17 -0400508 {V4L2_SLICED_TELETEXT_B, 6, 22, 1},
Mauro Carvalho Chehab6ac48b42006-01-23 17:11:05 -0200509 { 0xaa, 0xaa, 0xff, 0xff, 0x27, 0x2e, 0x20, 0x2b,
510 0xa6, 0x72, 0x10, 0x00, 0x00, 0x00, 0x10, 0x00 }
Mauro Carvalho Chehabe1bc80a2006-01-09 15:25:36 -0200511 },
Hans Verkuil9bc74002006-03-29 18:02:51 -0300512#if 0
Mauro Carvalho Chehab3dd6b562018-02-19 13:23:39 -0500513 [2] = {0x050, /* Teletext, PAL, WST System C */
Nasser Afshin4efcd5e2018-04-02 18:23:17 -0400514 {V4L2_SLICED_TELETEXT_PAL_C, 6, 22, 1},
Mauro Carvalho Chehab6ac48b42006-01-23 17:11:05 -0200515 { 0xaa, 0xaa, 0xff, 0xff, 0xe7, 0x2e, 0x20, 0x22,
516 0xa6, 0x98, 0x0d, 0x00, 0x00, 0x00, 0x10, 0x00 }
Mauro Carvalho Chehabe1bc80a2006-01-09 15:25:36 -0200517 },
Mauro Carvalho Chehab3dd6b562018-02-19 13:23:39 -0500518 [3] = {0x070, /* Teletext, NTSC, WST System B */
Nasser Afshin4efcd5e2018-04-02 18:23:17 -0400519 {V4L2_SLICED_TELETEXT_NTSC_B, 10, 21, 1},
Mauro Carvalho Chehab6ac48b42006-01-23 17:11:05 -0200520 { 0xaa, 0xaa, 0xff, 0xff, 0x27, 0x2e, 0x20, 0x23,
521 0x69, 0x93, 0x0d, 0x00, 0x00, 0x00, 0x10, 0x00 }
Mauro Carvalho Chehabe1bc80a2006-01-09 15:25:36 -0200522 },
Mauro Carvalho Chehab3dd6b562018-02-19 13:23:39 -0500523 [4] = {0x090, /* Tetetext, NTSC NABTS System C */
Nasser Afshin4efcd5e2018-04-02 18:23:17 -0400524 {V4L2_SLICED_TELETEXT_NTSC_C, 10, 21, 1},
Mauro Carvalho Chehab6ac48b42006-01-23 17:11:05 -0200525 { 0xaa, 0xaa, 0xff, 0xff, 0xe7, 0x2e, 0x20, 0x22,
526 0x69, 0x93, 0x0d, 0x00, 0x00, 0x00, 0x15, 0x00 }
Mauro Carvalho Chehabe1bc80a2006-01-09 15:25:36 -0200527 },
Mauro Carvalho Chehab3dd6b562018-02-19 13:23:39 -0500528 [5] = {0x0b0, /* Teletext, NTSC-J, NABTS System D */
Nasser Afshin4efcd5e2018-04-02 18:23:17 -0400529 {V4L2_SLICED_TELETEXT_NTSC_D, 10, 21, 1},
Mauro Carvalho Chehab6ac48b42006-01-23 17:11:05 -0200530 { 0xaa, 0xaa, 0xff, 0xff, 0xa7, 0x2e, 0x20, 0x23,
531 0x69, 0x93, 0x0d, 0x00, 0x00, 0x00, 0x10, 0x00 }
Mauro Carvalho Chehabe1bc80a2006-01-09 15:25:36 -0200532 },
Mauro Carvalho Chehab3dd6b562018-02-19 13:23:39 -0500533 [6] = {0x0d0, /* Closed Caption, PAL/SECAM */
Nasser Afshin4efcd5e2018-04-02 18:23:17 -0400534 {V4L2_SLICED_CAPTION_625, 22, 22, 1},
Mauro Carvalho Chehab6ac48b42006-01-23 17:11:05 -0200535 { 0xaa, 0x2a, 0xff, 0x3f, 0x04, 0x51, 0x6e, 0x02,
536 0xa6, 0x7b, 0x09, 0x00, 0x00, 0x00, 0x27, 0x00 }
Mauro Carvalho Chehabe1bc80a2006-01-09 15:25:36 -0200537 },
Hans Verkuil9bc74002006-03-29 18:02:51 -0300538#endif
Mauro Carvalho Chehab3dd6b562018-02-19 13:23:39 -0500539 [7] = {0x0f0, /* Closed Caption, NTSC */
Nasser Afshin4efcd5e2018-04-02 18:23:17 -0400540 {V4L2_SLICED_CAPTION_525, 21, 21, 1},
Mauro Carvalho Chehab6ac48b42006-01-23 17:11:05 -0200541 { 0xaa, 0x2a, 0xff, 0x3f, 0x04, 0x51, 0x6e, 0x02,
542 0x69, 0x8c, 0x09, 0x00, 0x00, 0x00, 0x27, 0x00 }
Mauro Carvalho Chehabe1bc80a2006-01-09 15:25:36 -0200543 },
Mauro Carvalho Chehab3dd6b562018-02-19 13:23:39 -0500544 [8] = {0x110, /* Wide Screen Signal, PAL/SECAM */
Nasser Afshin4efcd5e2018-04-02 18:23:17 -0400545 {V4L2_SLICED_WSS_625, 23, 23, 1},
Mauro Carvalho Chehab6ac48b42006-01-23 17:11:05 -0200546 { 0x5b, 0x55, 0xc5, 0xff, 0x00, 0x71, 0x6e, 0x42,
547 0xa6, 0xcd, 0x0f, 0x00, 0x00, 0x00, 0x3a, 0x00 }
Mauro Carvalho Chehabe1bc80a2006-01-09 15:25:36 -0200548 },
Hans Verkuil9bc74002006-03-29 18:02:51 -0300549#if 0
Mauro Carvalho Chehab3dd6b562018-02-19 13:23:39 -0500550 [9] = {0x130, /* Wide Screen Signal, NTSC C */
Nasser Afshin4efcd5e2018-04-02 18:23:17 -0400551 {V4L2_SLICED_WSS_525, 20, 20, 1},
Mauro Carvalho Chehab6ac48b42006-01-23 17:11:05 -0200552 { 0x38, 0x00, 0x3f, 0x00, 0x00, 0x71, 0x6e, 0x43,
553 0x69, 0x7c, 0x08, 0x00, 0x00, 0x00, 0x39, 0x00 }
Mauro Carvalho Chehabe1bc80a2006-01-09 15:25:36 -0200554 },
Mauro Carvalho Chehab3dd6b562018-02-19 13:23:39 -0500555 [10] = {0x150, /* Vertical Interval Timecode (VITC), PAL/SECAM */
Nasser Afshin4efcd5e2018-04-02 18:23:17 -0400556 {V4l2_SLICED_VITC_625, 6, 22, 0},
Mauro Carvalho Chehab6ac48b42006-01-23 17:11:05 -0200557 { 0x00, 0x00, 0x00, 0x00, 0x00, 0x8f, 0x6d, 0x49,
558 0xa6, 0x85, 0x08, 0x00, 0x00, 0x00, 0x4c, 0x00 }
Mauro Carvalho Chehabe1bc80a2006-01-09 15:25:36 -0200559 },
Mauro Carvalho Chehab3dd6b562018-02-19 13:23:39 -0500560 [11] = {0x170, /* Vertical Interval Timecode (VITC), NTSC */
Nasser Afshin4efcd5e2018-04-02 18:23:17 -0400561 {V4l2_SLICED_VITC_525, 10, 20, 0},
Mauro Carvalho Chehab6ac48b42006-01-23 17:11:05 -0200562 { 0x00, 0x00, 0x00, 0x00, 0x00, 0x8f, 0x6d, 0x49,
563 0x69, 0x94, 0x08, 0x00, 0x00, 0x00, 0x4c, 0x00 }
Mauro Carvalho Chehabe1bc80a2006-01-09 15:25:36 -0200564 },
Hans Verkuil9bc74002006-03-29 18:02:51 -0300565#endif
Mauro Carvalho Chehab3dd6b562018-02-19 13:23:39 -0500566 [12] = {0x190, /* Video Program System (VPS), PAL */
Nasser Afshin4efcd5e2018-04-02 18:23:17 -0400567 {V4L2_SLICED_VPS, 16, 16, 0},
Mauro Carvalho Chehab6ac48b42006-01-23 17:11:05 -0200568 { 0xaa, 0xaa, 0xff, 0xff, 0xba, 0xce, 0x2b, 0x0d,
569 0xa6, 0xda, 0x0b, 0x00, 0x00, 0x00, 0x60, 0x00 }
Mauro Carvalho Chehab3ad96832006-01-23 17:11:05 -0200570 },
Mauro Carvalho Chehab6ac48b42006-01-23 17:11:05 -0200571 /* 0x1d0 User programmable */
Mauro Carvalho Chehabe1bc80a2006-01-09 15:25:36 -0200572};
573
Hans Verkuil6b8fe022008-12-18 11:17:25 -0300574static int tvp5150_write_inittab(struct v4l2_subdev *sd,
Mauro Carvalho Chehab6ac48b42006-01-23 17:11:05 -0200575 const struct i2c_reg_value *regs)
Mauro Carvalho Chehabe1bc80a2006-01-09 15:25:36 -0200576{
Philipp Zabel28b9e222018-06-28 12:20:35 -0400577 struct tvp5150 *decoder = to_tvp5150(sd);
578
Mauro Carvalho Chehabe1bc80a2006-01-09 15:25:36 -0200579 while (regs->reg != 0xff) {
Philipp Zabel28b9e222018-06-28 12:20:35 -0400580 regmap_write(decoder->regmap, regs->reg, regs->value);
Mauro Carvalho Chehabe1bc80a2006-01-09 15:25:36 -0200581 regs++;
582 }
583 return 0;
584}
585
Mauro Carvalho Chehab3dd6b562018-02-19 13:23:39 -0500586static int tvp5150_vdp_init(struct v4l2_subdev *sd)
Mauro Carvalho Chehabe1bc80a2006-01-09 15:25:36 -0200587{
Philipp Zabel28b9e222018-06-28 12:20:35 -0400588 struct tvp5150 *decoder = to_tvp5150(sd);
589 struct regmap *map = decoder->regmap;
Mauro Carvalho Chehabe1bc80a2006-01-09 15:25:36 -0200590 unsigned int i;
Mauro Carvalho Chehab3dd6b562018-02-19 13:23:39 -0500591 int j;
Mauro Carvalho Chehabe1bc80a2006-01-09 15:25:36 -0200592
593 /* Disable Full Field */
Philipp Zabel28b9e222018-06-28 12:20:35 -0400594 regmap_write(map, TVP5150_FULL_FIELD_ENA, 0);
Mauro Carvalho Chehabe1bc80a2006-01-09 15:25:36 -0200595
596 /* Before programming, Line mode should be at 0xff */
Hans Verkuil6b8fe022008-12-18 11:17:25 -0300597 for (i = TVP5150_LINE_MODE_INI; i <= TVP5150_LINE_MODE_END; i++)
Philipp Zabel28b9e222018-06-28 12:20:35 -0400598 regmap_write(map, i, 0xff);
Mauro Carvalho Chehabe1bc80a2006-01-09 15:25:36 -0200599
600 /* Load Ram Table */
Mauro Carvalho Chehab3dd6b562018-02-19 13:23:39 -0500601 for (j = 0; j < ARRAY_SIZE(vbi_ram_default); j++) {
602 const struct i2c_vbi_ram_value *regs = &vbi_ram_default[j];
603
604 if (!regs->type.vbi_type)
605 continue;
606
Philipp Zabel28b9e222018-06-28 12:20:35 -0400607 regmap_write(map, TVP5150_CONF_RAM_ADDR_HIGH, regs->reg >> 8);
608 regmap_write(map, TVP5150_CONF_RAM_ADDR_LOW, regs->reg);
Mauro Carvalho Chehabe1bc80a2006-01-09 15:25:36 -0200609
Hans Verkuil6b8fe022008-12-18 11:17:25 -0300610 for (i = 0; i < 16; i++)
Philipp Zabel28b9e222018-06-28 12:20:35 -0400611 regmap_write(map, TVP5150_VDP_CONF_RAM_DATA,
612 regs->values[i]);
Mauro Carvalho Chehabe1bc80a2006-01-09 15:25:36 -0200613 }
614 return 0;
615}
616
Mauro Carvalho Chehab6ac48b42006-01-23 17:11:05 -0200617/* Fills VBI capabilities based on i2c_vbi_ram_value struct */
Hans Verkuil6b8fe022008-12-18 11:17:25 -0300618static int tvp5150_g_sliced_vbi_cap(struct v4l2_subdev *sd,
Mauro Carvalho Chehab6ac48b42006-01-23 17:11:05 -0200619 struct v4l2_sliced_vbi_cap *cap)
620{
Mauro Carvalho Chehab3dd6b562018-02-19 13:23:39 -0500621 int line, i;
Mauro Carvalho Chehab6ac48b42006-01-23 17:11:05 -0200622
Mauro Carvalho Chehab257e29f2016-11-16 08:58:05 -0200623 dev_dbg_lvl(sd->dev, 1, debug, "g_sliced_vbi_cap\n");
Nasser Afshinbb7a3682018-04-02 18:23:20 -0400624 memset(cap, 0, sizeof(*cap));
Mauro Carvalho Chehab6ac48b42006-01-23 17:11:05 -0200625
Mauro Carvalho Chehab3dd6b562018-02-19 13:23:39 -0500626 for (i = 0; i < ARRAY_SIZE(vbi_ram_default); i++) {
627 const struct i2c_vbi_ram_value *regs = &vbi_ram_default[i];
628
629 if (!regs->type.vbi_type)
630 continue;
631
632 for (line = regs->type.ini_line;
633 line <= regs->type.end_line;
634 line++) {
Mauro Carvalho Chehab6ac48b42006-01-23 17:11:05 -0200635 cap->service_lines[0][line] |= regs->type.vbi_type;
636 }
637 cap->service_set |= regs->type.vbi_type;
Mauro Carvalho Chehab6ac48b42006-01-23 17:11:05 -0200638 }
Hans Verkuil6b8fe022008-12-18 11:17:25 -0300639 return 0;
Mauro Carvalho Chehab6ac48b42006-01-23 17:11:05 -0200640}
641
Mauro Carvalho Chehab3ad96832006-01-23 17:11:05 -0200642/* Set vbi processing
643 * type - one of tvp5150_vbi_types
644 * line - line to gather data
645 * fields: bit 0 field1, bit 1, field2
646 * flags (default=0xf0) is a bitmask, were set means:
647 * bit 7: enable filtering null bytes on CC
648 * bit 6: send data also to FIFO
649 * bit 5: don't allow data with errors on FIFO
650 * bit 4: enable ECC when possible
651 * pix_align = pix alignment:
652 * LSB = field1
653 * MSB = field2
654 */
Hans Verkuil6b8fe022008-12-18 11:17:25 -0300655static int tvp5150_set_vbi(struct v4l2_subdev *sd,
Nasser Afshin4efcd5e2018-04-02 18:23:17 -0400656 unsigned int type, u8 flags, int line,
Mauro Carvalho Chehab2701dac2006-01-23 17:11:06 -0200657 const int fields)
Mauro Carvalho Chehab3ad96832006-01-23 17:11:05 -0200658{
Hans Verkuil6b8fe022008-12-18 11:17:25 -0300659 struct tvp5150 *decoder = to_tvp5150(sd);
660 v4l2_std_id std = decoder->norm;
Mauro Carvalho Chehab3ad96832006-01-23 17:11:05 -0200661 u8 reg;
Mauro Carvalho Chehab3dd6b562018-02-19 13:23:39 -0500662 int i, pos = 0;
Mauro Carvalho Chehab3ad96832006-01-23 17:11:05 -0200663
664 if (std == V4L2_STD_ALL) {
Mauro Carvalho Chehab257e29f2016-11-16 08:58:05 -0200665 dev_err(sd->dev, "VBI can't be configured without knowing number of lines\n");
Mauro Carvalho Chehab12db5602006-01-23 17:11:08 -0200666 return 0;
Roel Kluin7d5b7b92008-03-09 21:19:13 -0300667 } else if (std & V4L2_STD_625_50) {
Mauro Carvalho Chehab3ad96832006-01-23 17:11:05 -0200668 /* Don't follow NTSC Line number convension */
669 line += 3;
670 }
671
Gustavo A. R. Silvab3d930aa2017-06-23 19:37:00 -0300672 if (line < 6 || line > 27)
Mauro Carvalho Chehab2701dac2006-01-23 17:11:06 -0200673 return 0;
Mauro Carvalho Chehab3ad96832006-01-23 17:11:05 -0200674
Mauro Carvalho Chehab3dd6b562018-02-19 13:23:39 -0500675 for (i = 0; i < ARRAY_SIZE(vbi_ram_default); i++) {
676 const struct i2c_vbi_ram_value *regs = &vbi_ram_default[i];
677
678 if (!regs->type.vbi_type)
679 continue;
680
Mauro Carvalho Chehab2701dac2006-01-23 17:11:06 -0200681 if ((type & regs->type.vbi_type) &&
Gustavo A. R. Silvab3d930aa2017-06-23 19:37:00 -0300682 (line >= regs->type.ini_line) &&
683 (line <= regs->type.end_line))
Mauro Carvalho Chehab2701dac2006-01-23 17:11:06 -0200684 break;
Mauro Carvalho Chehab2701dac2006-01-23 17:11:06 -0200685 pos++;
686 }
Gustavo A. R. Silvab3d930aa2017-06-23 19:37:00 -0300687
Gustavo A. R. Silvab3d930aa2017-06-23 19:37:00 -0300688 type = pos | (flags & 0xf0);
689 reg = ((line - 6) << 1) + TVP5150_LINE_MODE_INI;
Mauro Carvalho Chehab3ad96832006-01-23 17:11:05 -0200690
Gustavo A. R. Silvab3d930aa2017-06-23 19:37:00 -0300691 if (fields & 1)
Philipp Zabel28b9e222018-06-28 12:20:35 -0400692 regmap_write(decoder->regmap, reg, type);
Mauro Carvalho Chehab3ad96832006-01-23 17:11:05 -0200693
Gustavo A. R. Silvab3d930aa2017-06-23 19:37:00 -0300694 if (fields & 2)
Philipp Zabel28b9e222018-06-28 12:20:35 -0400695 regmap_write(decoder->regmap, reg + 1, type);
Mauro Carvalho Chehab3ad96832006-01-23 17:11:05 -0200696
Mauro Carvalho Chehab2701dac2006-01-23 17:11:06 -0200697 return type;
Mauro Carvalho Chehab3ad96832006-01-23 17:11:05 -0200698}
699
Mauro Carvalho Chehab3dd6b562018-02-19 13:23:39 -0500700static int tvp5150_get_vbi(struct v4l2_subdev *sd, int line)
Mauro Carvalho Chehab12db5602006-01-23 17:11:08 -0200701{
Hans Verkuil6b8fe022008-12-18 11:17:25 -0300702 struct tvp5150 *decoder = to_tvp5150(sd);
703 v4l2_std_id std = decoder->norm;
Mauro Carvalho Chehab12db5602006-01-23 17:11:08 -0200704 u8 reg;
Hans Verkuil6b8fe022008-12-18 11:17:25 -0300705 int pos, type = 0;
Dmitry Lifshitz8cd0d4c2012-06-13 07:49:30 -0300706 int i, ret = 0;
Mauro Carvalho Chehab12db5602006-01-23 17:11:08 -0200707
708 if (std == V4L2_STD_ALL) {
Mauro Carvalho Chehab257e29f2016-11-16 08:58:05 -0200709 dev_err(sd->dev, "VBI can't be configured without knowing number of lines\n");
Mauro Carvalho Chehab12db5602006-01-23 17:11:08 -0200710 return 0;
Roel Kluin7d5b7b92008-03-09 21:19:13 -0300711 } else if (std & V4L2_STD_625_50) {
Mauro Carvalho Chehab12db5602006-01-23 17:11:08 -0200712 /* Don't follow NTSC Line number convension */
713 line += 3;
714 }
715
Hans Verkuil6b8fe022008-12-18 11:17:25 -0300716 if (line < 6 || line > 27)
Mauro Carvalho Chehab12db5602006-01-23 17:11:08 -0200717 return 0;
718
Hans Verkuil6b8fe022008-12-18 11:17:25 -0300719 reg = ((line - 6) << 1) + TVP5150_LINE_MODE_INI;
Mauro Carvalho Chehab12db5602006-01-23 17:11:08 -0200720
Dmitry Lifshitz8cd0d4c2012-06-13 07:49:30 -0300721 for (i = 0; i <= 1; i++) {
722 ret = tvp5150_read(sd, reg + i);
723 if (ret < 0) {
Mauro Carvalho Chehab257e29f2016-11-16 08:58:05 -0200724 dev_err(sd->dev, "%s: failed with error = %d\n",
Dmitry Lifshitz8cd0d4c2012-06-13 07:49:30 -0300725 __func__, ret);
726 return 0;
727 }
728 pos = ret & 0x0f;
Mauro Carvalho Chehab3dd6b562018-02-19 13:23:39 -0500729 if (pos < ARRAY_SIZE(vbi_ram_default))
730 type |= vbi_ram_default[pos].type.vbi_type;
Dmitry Lifshitz8cd0d4c2012-06-13 07:49:30 -0300731 }
Mauro Carvalho Chehab12db5602006-01-23 17:11:08 -0200732
733 return type;
734}
Mauro Carvalho Chehab4c86f972005-11-08 21:36:43 -0800735
Hans Verkuil6b8fe022008-12-18 11:17:25 -0300736static int tvp5150_set_std(struct v4l2_subdev *sd, v4l2_std_id std)
737{
738 struct tvp5150 *decoder = to_tvp5150(sd);
739 int fmt = 0;
740
Mauro Carvalho Chehabe1bc80a2006-01-09 15:25:36 -0200741 /* First tests should be against specific std */
Mauro Carvalho Chehabcd4665c2005-11-08 21:36:40 -0800742
Hans Verkuil26811ae2013-05-29 10:19:06 -0300743 if (std == V4L2_STD_NTSC_443) {
Javier Martinez Canillas2da12fc2011-11-04 13:23:21 -0300744 fmt = VIDEO_STD_NTSC_4_43_BIT;
Hans Verkuil26811ae2013-05-29 10:19:06 -0300745 } else if (std == V4L2_STD_PAL_M) {
Javier Martinez Canillas2da12fc2011-11-04 13:23:21 -0300746 fmt = VIDEO_STD_PAL_M_BIT;
Hans Verkuil26811ae2013-05-29 10:19:06 -0300747 } else if (std == V4L2_STD_PAL_N || std == V4L2_STD_PAL_Nc) {
Javier Martinez Canillas2da12fc2011-11-04 13:23:21 -0300748 fmt = VIDEO_STD_PAL_COMBINATION_N_BIT;
Mauro Carvalho Chehabe1bc80a2006-01-09 15:25:36 -0200749 } else {
750 /* Then, test against generic ones */
Hans Verkuil6b8fe022008-12-18 11:17:25 -0300751 if (std & V4L2_STD_NTSC)
Javier Martinez Canillas2da12fc2011-11-04 13:23:21 -0300752 fmt = VIDEO_STD_NTSC_MJ_BIT;
Hans Verkuil6b8fe022008-12-18 11:17:25 -0300753 else if (std & V4L2_STD_PAL)
Javier Martinez Canillas2da12fc2011-11-04 13:23:21 -0300754 fmt = VIDEO_STD_PAL_BDGHIN_BIT;
Hans Verkuil6b8fe022008-12-18 11:17:25 -0300755 else if (std & V4L2_STD_SECAM)
Javier Martinez Canillas2da12fc2011-11-04 13:23:21 -0300756 fmt = VIDEO_STD_SECAM_BIT;
Mauro Carvalho Chehabe1bc80a2006-01-09 15:25:36 -0200757 }
Mauro Carvalho Chehabcd4665c2005-11-08 21:36:40 -0800758
Mauro Carvalho Chehab257e29f2016-11-16 08:58:05 -0200759 dev_dbg_lvl(sd->dev, 1, debug, "Set video std register to %d.\n", fmt);
Philipp Zabel28b9e222018-06-28 12:20:35 -0400760 regmap_write(decoder->regmap, TVP5150_VIDEO_STD, fmt);
Mauro Carvalho Chehabe1bc80a2006-01-09 15:25:36 -0200761 return 0;
762}
Mauro Carvalho Chehabcd4665c2005-11-08 21:36:40 -0800763
Hans Verkuil6b8fe022008-12-18 11:17:25 -0300764static int tvp5150_s_std(struct v4l2_subdev *sd, v4l2_std_id std)
Mauro Carvalho Chehabe1bc80a2006-01-09 15:25:36 -0200765{
Hans Verkuil6b8fe022008-12-18 11:17:25 -0300766 struct tvp5150 *decoder = to_tvp5150(sd);
767
768 if (decoder->norm == std)
769 return 0;
770
Javier Martin963ddc62012-01-31 05:23:46 -0300771 /* Change cropping height limits */
772 if (std & V4L2_STD_525_60)
773 decoder->rect.height = TVP5150_V_MAX_525_60;
774 else
775 decoder->rect.height = TVP5150_V_MAX_OTHERS;
776
Philipp Zabel15695862018-06-28 12:20:41 -0400777 decoder->norm = std;
Javier Martin963ddc62012-01-31 05:23:46 -0300778
Hans Verkuil6b8fe022008-12-18 11:17:25 -0300779 return tvp5150_set_std(sd, std);
780}
781
Philipp Zabel15695862018-06-28 12:20:41 -0400782static v4l2_std_id tvp5150_read_std(struct v4l2_subdev *sd)
783{
784 int val = tvp5150_read(sd, TVP5150_STATUS_REG_5);
785
786 switch (val & 0x0F) {
787 case 0x01:
788 return V4L2_STD_NTSC;
789 case 0x03:
790 return V4L2_STD_PAL;
791 case 0x05:
792 return V4L2_STD_PAL_M;
793 case 0x07:
794 return V4L2_STD_PAL_N | V4L2_STD_PAL_Nc;
795 case 0x09:
796 return V4L2_STD_NTSC_443;
797 case 0xb:
798 return V4L2_STD_SECAM;
799 default:
800 return V4L2_STD_UNKNOWN;
801 }
802}
803
Philipp Zabel2f0a5c62018-06-28 12:20:46 -0400804static const struct v4l2_event tvp5150_ev_fmt = {
805 .type = V4L2_EVENT_SOURCE_CHANGE,
806 .u.src_change.changes = V4L2_EVENT_SRC_CH_RESOLUTION,
807};
808
Philipp Zabel8e4c97e2018-06-28 12:20:44 -0400809static irqreturn_t tvp5150_isr(int irq, void *dev_id)
810{
811 struct tvp5150 *decoder = dev_id;
812 struct regmap *map = decoder->regmap;
Philipp Zabel62a764e2018-06-28 12:20:45 -0400813 unsigned int mask, active = 0, status = 0;
814
815 mask = TVP5150_MISC_CTL_YCBCR_OE | TVP5150_MISC_CTL_SYNC_OE |
816 TVP5150_MISC_CTL_CLOCK_OE;
Philipp Zabel8e4c97e2018-06-28 12:20:44 -0400817
818 regmap_read(map, TVP5150_INT_STATUS_REG_A, &status);
819 if (status) {
820 regmap_write(map, TVP5150_INT_STATUS_REG_A, status);
821
Philipp Zabel62a764e2018-06-28 12:20:45 -0400822 if (status & TVP5150_INT_A_LOCK) {
Philipp Zabel8e4c97e2018-06-28 12:20:44 -0400823 decoder->lock = !!(status & TVP5150_INT_A_LOCK_STATUS);
Philipp Zabel7bb3c332018-06-28 12:20:47 -0400824 dev_dbg_lvl(decoder->sd.dev, 1, debug,
825 "sync lo%s signal\n",
826 decoder->lock ? "ck" : "ss");
Philipp Zabel2f0a5c62018-06-28 12:20:46 -0400827 v4l2_subdev_notify_event(&decoder->sd, &tvp5150_ev_fmt);
Philipp Zabel62a764e2018-06-28 12:20:45 -0400828 regmap_update_bits(map, TVP5150_MISC_CTL, mask,
829 decoder->lock ? decoder->oe : 0);
830 }
Philipp Zabel8e4c97e2018-06-28 12:20:44 -0400831
832 return IRQ_HANDLED;
833 }
834
835 regmap_read(map, TVP5150_INT_ACTIVE_REG_B, &active);
836 if (active) {
837 status = 0;
838 regmap_read(map, TVP5150_INT_STATUS_REG_B, &status);
839 if (status)
840 regmap_write(map, TVP5150_INT_RESET_REG_B, status);
841 }
842
843 return IRQ_HANDLED;
844}
845
Hans Verkuil6b8fe022008-12-18 11:17:25 -0300846static int tvp5150_reset(struct v4l2_subdev *sd, u32 val)
847{
848 struct tvp5150 *decoder = to_tvp5150(sd);
Philipp Zabel8105e1b2018-06-28 12:20:43 -0400849 struct regmap *map = decoder->regmap;
Mauro Carvalho Chehabe1bc80a2006-01-09 15:25:36 -0200850
851 /* Initializes TVP5150 to its default values */
Hans Verkuil6b8fe022008-12-18 11:17:25 -0300852 tvp5150_write_inittab(sd, tvp5150_init_default);
Mauro Carvalho Chehabe1bc80a2006-01-09 15:25:36 -0200853
Philipp Zabel8e4c97e2018-06-28 12:20:44 -0400854 if (decoder->irq) {
855 /* Configure pins: FID, VSYNC, INTREQ, SCLK */
856 regmap_write(map, TVP5150_CONF_SHARED_PIN, 0x0);
857 /* Set interrupt polarity to active high */
858 regmap_write(map, TVP5150_INT_CONF, TVP5150_VDPOE | 0x1);
859 regmap_write(map, TVP5150_INTT_CONFIG_REG_B, 0x1);
860 } else {
861 /* Configure pins: FID, VSYNC, GPCL/VBLK, SCLK */
862 regmap_write(map, TVP5150_CONF_SHARED_PIN, 0x2);
863 /* Keep interrupt polarity active low */
864 regmap_write(map, TVP5150_INT_CONF, TVP5150_VDPOE);
865 regmap_write(map, TVP5150_INTT_CONFIG_REG_B, 0x0);
866 }
Philipp Zabel8105e1b2018-06-28 12:20:43 -0400867
Mauro Carvalho Chehabe1bc80a2006-01-09 15:25:36 -0200868 /* Initializes VDP registers */
Mauro Carvalho Chehab3dd6b562018-02-19 13:23:39 -0500869 tvp5150_vdp_init(sd);
Mauro Carvalho Chehabe1bc80a2006-01-09 15:25:36 -0200870
871 /* Selects decoder input */
Hans Verkuil6b8fe022008-12-18 11:17:25 -0300872 tvp5150_selmux(sd);
Mauro Carvalho Chehab84486d52005-11-08 21:36:41 -0800873
Mauro Carvalho Chehabe1bc80a2006-01-09 15:25:36 -0200874 /* Initialize image preferences */
Hans Verkuil6c45ec72010-12-12 08:45:43 -0300875 v4l2_ctrl_handler_setup(&decoder->hdl);
Mauro Carvalho Chehabe1bc80a2006-01-09 15:25:36 -0200876
Philipp Zabel1bb086b2018-06-28 12:20:42 -0400877 return 0;
878}
879
880static int tvp5150_enable(struct v4l2_subdev *sd)
881{
882 struct tvp5150 *decoder = to_tvp5150(sd);
883 v4l2_std_id std;
884
885 /* Initializes TVP5150 to stream enabled values */
886 tvp5150_write_inittab(sd, tvp5150_init_enable);
887
Philipp Zabel15695862018-06-28 12:20:41 -0400888 if (decoder->norm == V4L2_STD_ALL)
889 std = tvp5150_read_std(sd);
890 else
891 std = decoder->norm;
892
893 /* Disable autoswitch mode */
894 tvp5150_set_std(sd, std);
Javier Martinez Canillasa2e5f1b2016-01-07 10:46:50 -0200895
Philipp Zabel62a764e2018-06-28 12:20:45 -0400896 /*
897 * Enable the YCbCr and clock outputs. In discrete sync mode
898 * (non-BT.656) additionally enable the the sync outputs.
899 */
900 switch (decoder->mbus_type) {
901 case V4L2_MBUS_PARALLEL:
Marco Felsch8a7441b2018-06-28 12:20:36 -0400902 /* 8-bit 4:2:2 YUV with discrete sync output */
903 regmap_update_bits(decoder->regmap, TVP5150_DATA_RATE_SEL,
904 0x7, 0x0);
Philipp Zabel62a764e2018-06-28 12:20:45 -0400905 decoder->oe = TVP5150_MISC_CTL_YCBCR_OE |
906 TVP5150_MISC_CTL_CLOCK_OE |
907 TVP5150_MISC_CTL_SYNC_OE;
908 break;
909 case V4L2_MBUS_BT656:
910 decoder->oe = TVP5150_MISC_CTL_YCBCR_OE |
911 TVP5150_MISC_CTL_CLOCK_OE;
912 break;
913 default:
914 return -EINVAL;
915 }
Javier Martinez Canillasa2e5f1b2016-01-07 10:46:50 -0200916
Hans Verkuil6b8fe022008-12-18 11:17:25 -0300917 return 0;
Mauro Carvalho Chehabcd4665c2005-11-08 21:36:40 -0800918};
919
Hans Verkuil6c45ec72010-12-12 08:45:43 -0300920static int tvp5150_s_ctrl(struct v4l2_ctrl *ctrl)
akpm@osdl.orga6c2ba22005-11-08 21:37:07 -0800921{
Hans Verkuil6c45ec72010-12-12 08:45:43 -0300922 struct v4l2_subdev *sd = to_sd(ctrl);
Mauro Carvalho Chehabc43875f2016-02-12 15:42:02 -0200923 struct tvp5150 *decoder = to_tvp5150(sd);
akpm@osdl.orga6c2ba22005-11-08 21:37:07 -0800924
925 switch (ctrl->id) {
926 case V4L2_CID_BRIGHTNESS:
Philipp Zabel28b9e222018-06-28 12:20:35 -0400927 regmap_write(decoder->regmap, TVP5150_BRIGHT_CTL, ctrl->val);
akpm@osdl.orga6c2ba22005-11-08 21:37:07 -0800928 return 0;
929 case V4L2_CID_CONTRAST:
Philipp Zabel28b9e222018-06-28 12:20:35 -0400930 regmap_write(decoder->regmap, TVP5150_CONTRAST_CTL, ctrl->val);
akpm@osdl.orga6c2ba22005-11-08 21:37:07 -0800931 return 0;
932 case V4L2_CID_SATURATION:
Philipp Zabel28b9e222018-06-28 12:20:35 -0400933 regmap_write(decoder->regmap, TVP5150_SATURATION_CTL,
934 ctrl->val);
akpm@osdl.orga6c2ba22005-11-08 21:37:07 -0800935 return 0;
936 case V4L2_CID_HUE:
Philipp Zabel28b9e222018-06-28 12:20:35 -0400937 regmap_write(decoder->regmap, TVP5150_HUE_CTL, ctrl->val);
Marco Felsch2d29bcc2018-06-28 12:20:34 -0400938 return 0;
Mauro Carvalho Chehabc43875f2016-02-12 15:42:02 -0200939 case V4L2_CID_TEST_PATTERN:
940 decoder->enable = ctrl->val ? false : true;
941 tvp5150_selmux(sd);
akpm@osdl.orga6c2ba22005-11-08 21:37:07 -0800942 return 0;
akpm@osdl.orga6c2ba22005-11-08 21:37:07 -0800943 }
Mauro Carvalho Chehabc0477ad2006-01-09 15:25:14 -0200944 return -EINVAL;
akpm@osdl.orga6c2ba22005-11-08 21:37:07 -0800945}
946
Marco Felsch5cb82942018-06-28 12:20:39 -0400947static void tvp5150_set_default(v4l2_std_id std, struct v4l2_rect *crop)
948{
949 /* Default is no cropping */
950 crop->top = 0;
951 crop->left = 0;
952 crop->width = TVP5150_H_MAX;
953 if (std & V4L2_STD_525_60)
954 crop->height = TVP5150_V_MAX_525_60;
955 else
956 crop->height = TVP5150_V_MAX_OTHERS;
957}
958
Hans Verkuilda298c62015-04-09 04:02:34 -0300959static int tvp5150_fill_fmt(struct v4l2_subdev *sd,
Marco Felsch5cb82942018-06-28 12:20:39 -0400960 struct v4l2_subdev_pad_config *cfg,
961 struct v4l2_subdev_format *format)
Javier Martinec2c4f32012-01-05 10:57:39 -0300962{
Hans Verkuilda298c62015-04-09 04:02:34 -0300963 struct v4l2_mbus_framefmt *f;
Javier Martinec2c4f32012-01-05 10:57:39 -0300964 struct tvp5150 *decoder = to_tvp5150(sd);
Javier Martinec2c4f32012-01-05 10:57:39 -0300965
Mauro Carvalho Chehabbc322c02018-08-01 06:10:05 -0400966 if (!format || (format->pad != TVP5150_PAD_VID_OUT))
Javier Martinec2c4f32012-01-05 10:57:39 -0300967 return -EINVAL;
968
Hans Verkuilda298c62015-04-09 04:02:34 -0300969 f = &format->format;
970
Javier Martin963ddc62012-01-31 05:23:46 -0300971 f->width = decoder->rect.width;
Javier Martinez Canillas1831af02018-06-10 16:43:02 -0400972 f->height = decoder->rect.height / 2;
Javier Martinec2c4f32012-01-05 10:57:39 -0300973
Marco Felsch5cb82942018-06-28 12:20:39 -0400974 f->code = TVP5150_MBUS_FMT;
975 f->field = TVP5150_FIELD;
976 f->colorspace = TVP5150_COLORSPACE;
Javier Martinec2c4f32012-01-05 10:57:39 -0300977
Mauro Carvalho Chehab257e29f2016-11-16 08:58:05 -0200978 dev_dbg_lvl(sd->dev, 1, debug, "width = %d, height = %d\n", f->width,
Marco Felsch5cb82942018-06-28 12:20:39 -0400979 f->height);
Javier Martinec2c4f32012-01-05 10:57:39 -0300980 return 0;
981}
982
Hans Verkuil10d5509c2015-12-14 08:25:32 -0200983static int tvp5150_set_selection(struct v4l2_subdev *sd,
984 struct v4l2_subdev_pad_config *cfg,
985 struct v4l2_subdev_selection *sel)
Javier Martin963ddc62012-01-31 05:23:46 -0300986{
Javier Martin963ddc62012-01-31 05:23:46 -0300987 struct tvp5150 *decoder = to_tvp5150(sd);
Hans Verkuil10d5509c2015-12-14 08:25:32 -0200988 struct v4l2_rect rect = sel->r;
Javier Martin963ddc62012-01-31 05:23:46 -0300989 v4l2_std_id std;
Hans Verkuil10d5509c2015-12-14 08:25:32 -0200990 int hmax;
991
992 if (sel->which != V4L2_SUBDEV_FORMAT_ACTIVE ||
993 sel->target != V4L2_SEL_TGT_CROP)
994 return -EINVAL;
Javier Martin963ddc62012-01-31 05:23:46 -0300995
Mauro Carvalho Chehab257e29f2016-11-16 08:58:05 -0200996 dev_dbg_lvl(sd->dev, 1, debug, "%s left=%d, top=%d, width=%d, height=%d\n",
Javier Martin963ddc62012-01-31 05:23:46 -0300997 __func__, rect.left, rect.top, rect.width, rect.height);
998
Javier Martin963ddc62012-01-31 05:23:46 -0300999 /* tvp5150 has some special limits */
1000 rect.left = clamp(rect.left, 0, TVP5150_MAX_CROP_LEFT);
Javier Martin963ddc62012-01-31 05:23:46 -03001001 rect.top = clamp(rect.top, 0, TVP5150_MAX_CROP_TOP);
1002
1003 /* Calculate height based on current standard */
1004 if (decoder->norm == V4L2_STD_ALL)
1005 std = tvp5150_read_std(sd);
1006 else
1007 std = decoder->norm;
1008
1009 if (std & V4L2_STD_525_60)
1010 hmax = TVP5150_V_MAX_525_60;
1011 else
1012 hmax = TVP5150_V_MAX_OTHERS;
1013
Marco Felschbd24db02018-06-28 12:20:33 -04001014 /*
1015 * alignments:
1016 * - width = 2 due to UYVY colorspace
1017 * - height, image = no special alignment
1018 */
1019 v4l_bound_align_image(&rect.width,
1020 TVP5150_H_MAX - TVP5150_MAX_CROP_LEFT - rect.left,
1021 TVP5150_H_MAX - rect.left, 1, &rect.height,
Ricardo Ribaldaf90580c2013-11-26 05:31:42 -03001022 hmax - TVP5150_MAX_CROP_TOP - rect.top,
Marco Felschbd24db02018-06-28 12:20:33 -04001023 hmax - rect.top, 0, 0);
Javier Martin963ddc62012-01-31 05:23:46 -03001024
Philipp Zabel28b9e222018-06-28 12:20:35 -04001025 regmap_write(decoder->regmap, TVP5150_VERT_BLANKING_START, rect.top);
1026 regmap_write(decoder->regmap, TVP5150_VERT_BLANKING_STOP,
1027 rect.top + rect.height - hmax);
1028 regmap_write(decoder->regmap, TVP5150_ACT_VD_CROP_ST_MSB,
1029 rect.left >> TVP5150_CROP_SHIFT);
1030 regmap_write(decoder->regmap, TVP5150_ACT_VD_CROP_ST_LSB,
1031 rect.left | (1 << TVP5150_CROP_SHIFT));
1032 regmap_write(decoder->regmap, TVP5150_ACT_VD_CROP_STP_MSB,
1033 (rect.left + rect.width - TVP5150_MAX_CROP_LEFT) >>
1034 TVP5150_CROP_SHIFT);
1035 regmap_write(decoder->regmap, TVP5150_ACT_VD_CROP_STP_LSB,
1036 rect.left + rect.width - TVP5150_MAX_CROP_LEFT);
Javier Martin963ddc62012-01-31 05:23:46 -03001037
1038 decoder->rect = rect;
1039
1040 return 0;
1041}
1042
Hans Verkuil10d5509c2015-12-14 08:25:32 -02001043static int tvp5150_get_selection(struct v4l2_subdev *sd,
1044 struct v4l2_subdev_pad_config *cfg,
1045 struct v4l2_subdev_selection *sel)
Javier Martin963ddc62012-01-31 05:23:46 -03001046{
Hans Verkuil10d5509c2015-12-14 08:25:32 -02001047 struct tvp5150 *decoder = container_of(sd, struct tvp5150, sd);
Javier Martin963ddc62012-01-31 05:23:46 -03001048 v4l2_std_id std;
1049
Hans Verkuil10d5509c2015-12-14 08:25:32 -02001050 if (sel->which != V4L2_SUBDEV_FORMAT_ACTIVE)
Javier Martin963ddc62012-01-31 05:23:46 -03001051 return -EINVAL;
1052
Hans Verkuil10d5509c2015-12-14 08:25:32 -02001053 switch (sel->target) {
1054 case V4L2_SEL_TGT_CROP_BOUNDS:
1055 case V4L2_SEL_TGT_CROP_DEFAULT:
1056 sel->r.left = 0;
1057 sel->r.top = 0;
1058 sel->r.width = TVP5150_H_MAX;
Javier Martin963ddc62012-01-31 05:23:46 -03001059
Hans Verkuil10d5509c2015-12-14 08:25:32 -02001060 /* Calculate height based on current standard */
1061 if (decoder->norm == V4L2_STD_ALL)
1062 std = tvp5150_read_std(sd);
1063 else
1064 std = decoder->norm;
1065 if (std & V4L2_STD_525_60)
1066 sel->r.height = TVP5150_V_MAX_525_60;
1067 else
1068 sel->r.height = TVP5150_V_MAX_OTHERS;
1069 return 0;
1070 case V4L2_SEL_TGT_CROP:
1071 sel->r = decoder->rect;
1072 return 0;
1073 default:
1074 return -EINVAL;
1075 }
Javier Martin963ddc62012-01-31 05:23:46 -03001076}
1077
Laurent Pinchartdd3a46b2016-01-07 10:46:46 -02001078static int tvp5150_g_mbus_config(struct v4l2_subdev *sd,
1079 struct v4l2_mbus_config *cfg)
1080{
Javier Martinez Canillasa2e5f1b2016-01-07 10:46:50 -02001081 struct tvp5150 *decoder = to_tvp5150(sd);
1082
1083 cfg->type = decoder->mbus_type;
Laurent Pinchartdd3a46b2016-01-07 10:46:46 -02001084 cfg->flags = V4L2_MBUS_MASTER | V4L2_MBUS_PCLK_SAMPLE_RISING
1085 | V4L2_MBUS_FIELD_EVEN_LOW | V4L2_MBUS_DATA_ACTIVE_HIGH;
1086
1087 return 0;
1088}
1089
Mauro Carvalho Chehab84486d52005-11-08 21:36:41 -08001090/****************************************************************************
Laurent Pincharte545ac82016-01-26 10:46:24 -02001091 V4L2 subdev pad ops
1092 ****************************************************************************/
Philipp Zabelb440b732018-06-28 12:20:40 -04001093static int tvp5150_init_cfg(struct v4l2_subdev *sd,
1094 struct v4l2_subdev_pad_config *cfg)
1095{
1096 struct tvp5150 *decoder = to_tvp5150(sd);
1097 v4l2_std_id std;
1098
1099 /*
1100 * Reset selection to maximum on subdev_open() if autodetection is on
1101 * and a standard change is detected.
1102 */
1103 if (decoder->norm == V4L2_STD_ALL) {
1104 std = tvp5150_read_std(sd);
1105 if (std != decoder->detected_norm) {
1106 decoder->detected_norm = std;
1107 tvp5150_set_default(std, &decoder->rect);
1108 }
1109 }
1110
1111 return 0;
1112}
1113
Laurent Pincharte545ac82016-01-26 10:46:24 -02001114static int tvp5150_enum_mbus_code(struct v4l2_subdev *sd,
1115 struct v4l2_subdev_pad_config *cfg,
1116 struct v4l2_subdev_mbus_code_enum *code)
1117{
1118 if (code->pad || code->index)
1119 return -EINVAL;
1120
Marco Felsch5cb82942018-06-28 12:20:39 -04001121 code->code = TVP5150_MBUS_FMT;
Laurent Pincharte545ac82016-01-26 10:46:24 -02001122 return 0;
1123}
1124
1125static int tvp5150_enum_frame_size(struct v4l2_subdev *sd,
1126 struct v4l2_subdev_pad_config *cfg,
1127 struct v4l2_subdev_frame_size_enum *fse)
1128{
1129 struct tvp5150 *decoder = to_tvp5150(sd);
1130
Marco Felsch5cb82942018-06-28 12:20:39 -04001131 if (fse->index >= 8 || fse->code != TVP5150_MBUS_FMT)
Laurent Pincharte545ac82016-01-26 10:46:24 -02001132 return -EINVAL;
1133
Marco Felsch5cb82942018-06-28 12:20:39 -04001134 fse->code = TVP5150_MBUS_FMT;
Laurent Pincharte545ac82016-01-26 10:46:24 -02001135 fse->min_width = decoder->rect.width;
1136 fse->max_width = decoder->rect.width;
1137 fse->min_height = decoder->rect.height / 2;
1138 fse->max_height = decoder->rect.height / 2;
1139
1140 return 0;
1141}
1142
1143/****************************************************************************
Javier Martinez Canillasf7b4b542016-02-05 17:09:58 -02001144 Media entity ops
1145 ****************************************************************************/
1146
Laurent Pinchart406ff672016-12-08 20:22:41 -02001147#ifdef CONFIG_MEDIA_CONTROLLER
Javier Martinez Canillasf7b4b542016-02-05 17:09:58 -02001148static int tvp5150_link_setup(struct media_entity *entity,
1149 const struct media_pad *local,
1150 const struct media_pad *remote, u32 flags)
1151{
Javier Martinez Canillasf7b4b542016-02-05 17:09:58 -02001152 struct v4l2_subdev *sd = media_entity_to_v4l2_subdev(entity);
1153 struct tvp5150 *decoder = to_tvp5150(sd);
1154 int i;
1155
1156 for (i = 0; i < TVP5150_INPUT_NUM; i++) {
1157 if (remote->entity == &decoder->input_ent[i])
1158 break;
1159 }
1160
1161 /* Do nothing for entities that are not input connectors */
1162 if (i == TVP5150_INPUT_NUM)
1163 return 0;
1164
1165 decoder->input = i;
1166
Javier Martinez Canillasf7b4b542016-02-05 17:09:58 -02001167 tvp5150_selmux(sd);
Javier Martinez Canillasf7b4b542016-02-05 17:09:58 -02001168
1169 return 0;
1170}
1171
1172static const struct media_entity_operations tvp5150_sd_media_ops = {
1173 .link_setup = tvp5150_link_setup,
1174};
Laurent Pinchart406ff672016-12-08 20:22:41 -02001175#endif
Javier Martinez Canillasf7b4b542016-02-05 17:09:58 -02001176
1177/****************************************************************************
Mauro Carvalho Chehab84486d52005-11-08 21:36:41 -08001178 I2C Command
1179 ****************************************************************************/
Hans Verkuil6b8fe022008-12-18 11:17:25 -03001180
Laurent Pinchart460b6c02016-01-07 10:46:45 -02001181static int tvp5150_s_stream(struct v4l2_subdev *sd, int enable)
1182{
Javier Martinez Canillasa2e5f1b2016-01-07 10:46:50 -02001183 struct tvp5150 *decoder = to_tvp5150(sd);
Philipp Zabel8e4c97e2018-06-28 12:20:44 -04001184 unsigned int mask, val = 0, int_val = 0;
Javier Martinez Canillasa2e5f1b2016-01-07 10:46:50 -02001185
Marco Felsch8a7441b2018-06-28 12:20:36 -04001186 mask = TVP5150_MISC_CTL_YCBCR_OE | TVP5150_MISC_CTL_SYNC_OE |
1187 TVP5150_MISC_CTL_CLOCK_OE;
Laurent Pinchart460b6c02016-01-07 10:46:45 -02001188
Laurent Pinchart79d62052016-12-09 09:47:19 -02001189 if (enable) {
Philipp Zabel1bb086b2018-06-28 12:20:42 -04001190 tvp5150_enable(sd);
1191
Philipp Zabel62a764e2018-06-28 12:20:45 -04001192 /* Enable outputs if decoder is locked */
1193 val = decoder->lock ? decoder->oe : 0;
Philipp Zabel8e4c97e2018-06-28 12:20:44 -04001194 int_val = TVP5150_INT_A_LOCK;
Philipp Zabel2f0a5c62018-06-28 12:20:46 -04001195 v4l2_subdev_notify_event(&decoder->sd, &tvp5150_ev_fmt);
Laurent Pinchart79d62052016-12-09 09:47:19 -02001196 }
1197
Marco Felsch8a7441b2018-06-28 12:20:36 -04001198 regmap_update_bits(decoder->regmap, TVP5150_MISC_CTL, mask, val);
Philipp Zabel8e4c97e2018-06-28 12:20:44 -04001199 if (decoder->irq)
1200 /* Enable / Disable lock interrupt */
1201 regmap_update_bits(decoder->regmap, TVP5150_INT_ENABLE_REG_A,
1202 TVP5150_INT_A_LOCK, int_val);
Laurent Pinchart460b6c02016-01-07 10:46:45 -02001203
1204 return 0;
1205}
1206
Hans Verkuil5325b422009-04-02 11:26:22 -03001207static int tvp5150_s_routing(struct v4l2_subdev *sd,
1208 u32 input, u32 output, u32 config)
Mauro Carvalho Chehab84486d52005-11-08 21:36:41 -08001209{
Hans Verkuil6b8fe022008-12-18 11:17:25 -03001210 struct tvp5150 *decoder = to_tvp5150(sd);
Mauro Carvalho Chehab84486d52005-11-08 21:36:41 -08001211
Hans Verkuil5325b422009-04-02 11:26:22 -03001212 decoder->input = input;
1213 decoder->output = output;
Mauro Carvalho Chehabc43875f2016-02-12 15:42:02 -02001214
1215 if (output == TVP5150_BLACK_SCREEN)
1216 decoder->enable = false;
1217 else
1218 decoder->enable = true;
1219
Hans Verkuil6b8fe022008-12-18 11:17:25 -03001220 tvp5150_selmux(sd);
Mauro Carvalho Chehab84486d52005-11-08 21:36:41 -08001221 return 0;
1222}
Mauro Carvalho Chehabcd4665c2005-11-08 21:36:40 -08001223
Hans Verkuild37dad42010-03-14 10:59:16 -03001224static int tvp5150_s_raw_fmt(struct v4l2_subdev *sd, struct v4l2_vbi_format *fmt)
Hans Verkuil6b8fe022008-12-18 11:17:25 -03001225{
Philipp Zabel28b9e222018-06-28 12:20:35 -04001226 struct tvp5150 *decoder = to_tvp5150(sd);
1227
Nasser Afshin9bfd8f82018-04-02 18:23:18 -04001228 /*
1229 * this is for capturing 36 raw vbi lines
1230 * if there's a way to cut off the beginning 2 vbi lines
1231 * with the tvp5150 then the vbi line count could be lowered
1232 * to 17 lines/field again, although I couldn't find a register
1233 * which could do that cropping
1234 */
1235
Hans Verkuild37dad42010-03-14 10:59:16 -03001236 if (fmt->sample_format == V4L2_PIX_FMT_GREY)
Philipp Zabel28b9e222018-06-28 12:20:35 -04001237 regmap_write(decoder->regmap, TVP5150_LUMA_PROC_CTL_1, 0x70);
Hans Verkuild37dad42010-03-14 10:59:16 -03001238 if (fmt->count[0] == 18 && fmt->count[1] == 18) {
Philipp Zabel28b9e222018-06-28 12:20:35 -04001239 regmap_write(decoder->regmap, TVP5150_VERT_BLANKING_START,
1240 0x00);
1241 regmap_write(decoder->regmap, TVP5150_VERT_BLANKING_STOP, 0x01);
Hans Verkuild37dad42010-03-14 10:59:16 -03001242 }
1243 return 0;
1244}
1245
1246static int tvp5150_s_sliced_fmt(struct v4l2_subdev *sd, struct v4l2_sliced_vbi_format *svbi)
1247{
Philipp Zabel28b9e222018-06-28 12:20:35 -04001248 struct tvp5150 *decoder = to_tvp5150(sd);
Hans Verkuil6b8fe022008-12-18 11:17:25 -03001249 int i;
1250
Hans Verkuil6b8fe022008-12-18 11:17:25 -03001251 if (svbi->service_set != 0) {
1252 for (i = 0; i <= 23; i++) {
1253 svbi->service_lines[1][i] = 0;
1254 svbi->service_lines[0][i] =
Mauro Carvalho Chehab3dd6b562018-02-19 13:23:39 -05001255 tvp5150_set_vbi(sd, svbi->service_lines[0][i],
1256 0xf0, i, 3);
Hans Verkuil6b8fe022008-12-18 11:17:25 -03001257 }
1258 /* Enables FIFO */
Philipp Zabel28b9e222018-06-28 12:20:35 -04001259 regmap_write(decoder->regmap, TVP5150_FIFO_OUT_CTRL, 1);
Hans Verkuil6b8fe022008-12-18 11:17:25 -03001260 } else {
1261 /* Disables FIFO*/
Philipp Zabel28b9e222018-06-28 12:20:35 -04001262 regmap_write(decoder->regmap, TVP5150_FIFO_OUT_CTRL, 0);
Hans Verkuil6b8fe022008-12-18 11:17:25 -03001263
1264 /* Disable Full Field */
Philipp Zabel28b9e222018-06-28 12:20:35 -04001265 regmap_write(decoder->regmap, TVP5150_FULL_FIELD_ENA, 0);
Hans Verkuil6b8fe022008-12-18 11:17:25 -03001266
1267 /* Disable Line modes */
1268 for (i = TVP5150_LINE_MODE_INI; i <= TVP5150_LINE_MODE_END; i++)
Philipp Zabel28b9e222018-06-28 12:20:35 -04001269 regmap_write(decoder->regmap, i, 0xff);
Hans Verkuil6b8fe022008-12-18 11:17:25 -03001270 }
1271 return 0;
1272}
1273
Hans Verkuild37dad42010-03-14 10:59:16 -03001274static int tvp5150_g_sliced_fmt(struct v4l2_subdev *sd, struct v4l2_sliced_vbi_format *svbi)
1275{
Hans Verkuil6b8fe022008-12-18 11:17:25 -03001276 int i, mask = 0;
1277
Hans Verkuil30634e82012-09-05 10:38:10 -03001278 memset(svbi->service_lines, 0, sizeof(svbi->service_lines));
Hans Verkuil6b8fe022008-12-18 11:17:25 -03001279
1280 for (i = 0; i <= 23; i++) {
1281 svbi->service_lines[0][i] =
Mauro Carvalho Chehab3dd6b562018-02-19 13:23:39 -05001282 tvp5150_get_vbi(sd, i);
Hans Verkuil6b8fe022008-12-18 11:17:25 -03001283 mask |= svbi->service_lines[0][i];
1284 }
1285 svbi->service_set = mask;
1286 return 0;
1287}
1288
Hans Verkuil6b8fe022008-12-18 11:17:25 -03001289#ifdef CONFIG_VIDEO_ADV_DEBUG
Hans Verkuilaecde8b52008-12-30 07:14:19 -03001290static int tvp5150_g_register(struct v4l2_subdev *sd, struct v4l2_dbg_register *reg)
Hans Verkuil6b8fe022008-12-18 11:17:25 -03001291{
Dmitry Lifshitz8cd0d4c2012-06-13 07:49:30 -03001292 int res;
1293
Dmitry Lifshitz8cd0d4c2012-06-13 07:49:30 -03001294 res = tvp5150_read(sd, reg->reg & 0xff);
1295 if (res < 0) {
Mauro Carvalho Chehab257e29f2016-11-16 08:58:05 -02001296 dev_err(sd->dev, "%s: failed with error = %d\n", __func__, res);
Dmitry Lifshitz8cd0d4c2012-06-13 07:49:30 -03001297 return res;
1298 }
1299
1300 reg->val = res;
Hans Verkuilaecde8b52008-12-30 07:14:19 -03001301 reg->size = 1;
Hans Verkuil6b8fe022008-12-18 11:17:25 -03001302 return 0;
1303}
1304
Hans Verkuil977ba3b12013-03-24 08:28:46 -03001305static int tvp5150_s_register(struct v4l2_subdev *sd, const struct v4l2_dbg_register *reg)
Hans Verkuil6b8fe022008-12-18 11:17:25 -03001306{
Philipp Zabel28b9e222018-06-28 12:20:35 -04001307 struct tvp5150 *decoder = to_tvp5150(sd);
1308
1309 return regmap_write(decoder->regmap, reg->reg & 0xff, reg->val & 0xff);
Hans Verkuil6b8fe022008-12-18 11:17:25 -03001310}
1311#endif
1312
1313static int tvp5150_g_tuner(struct v4l2_subdev *sd, struct v4l2_tuner *vt)
1314{
1315 int status = tvp5150_read(sd, 0x88);
1316
1317 vt->signal = ((status & 0x04) && (status & 0x02)) ? 0xffff : 0x0;
1318 return 0;
1319}
1320
Javier Martinez Canillas5a08bc02016-08-11 13:28:15 -03001321static int tvp5150_registered(struct v4l2_subdev *sd)
Javier Martinez Canillasf7b4b542016-02-05 17:09:58 -02001322{
1323#ifdef CONFIG_MEDIA_CONTROLLER
1324 struct tvp5150 *decoder = to_tvp5150(sd);
1325 int ret = 0;
1326 int i;
1327
1328 for (i = 0; i < TVP5150_INPUT_NUM; i++) {
1329 struct media_entity *input = &decoder->input_ent[i];
1330 struct media_pad *pad = &decoder->input_pad[i];
1331
1332 if (!input->name)
1333 continue;
1334
1335 decoder->input_pad[i].flags = MEDIA_PAD_FL_SOURCE;
1336
1337 ret = media_entity_pads_init(input, 1, pad);
1338 if (ret < 0)
1339 return ret;
1340
1341 ret = media_device_register_entity(sd->v4l2_dev->mdev, input);
1342 if (ret < 0)
1343 return ret;
1344
1345 ret = media_create_pad_link(input, 0, &sd->entity,
Mauro Carvalho Chehabbc322c02018-08-01 06:10:05 -04001346 TVP5150_PAD_IF_INPUT, 0);
Javier Martinez Canillasf7b4b542016-02-05 17:09:58 -02001347 if (ret < 0) {
1348 media_device_unregister_entity(input);
1349 return ret;
1350 }
1351 }
1352#endif
1353
1354 return 0;
1355}
1356
Hans Verkuil6b8fe022008-12-18 11:17:25 -03001357/* ----------------------------------------------------------------------- */
1358
Hans Verkuil6c45ec72010-12-12 08:45:43 -03001359static const struct v4l2_ctrl_ops tvp5150_ctrl_ops = {
1360 .s_ctrl = tvp5150_s_ctrl,
1361};
1362
Hans Verkuil6b8fe022008-12-18 11:17:25 -03001363static const struct v4l2_subdev_core_ops tvp5150_core_ops = {
1364 .log_status = tvp5150_log_status,
Hans Verkuil6b8fe022008-12-18 11:17:25 -03001365 .reset = tvp5150_reset,
1366#ifdef CONFIG_VIDEO_ADV_DEBUG
1367 .g_register = tvp5150_g_register,
1368 .s_register = tvp5150_s_register,
1369#endif
1370};
1371
1372static const struct v4l2_subdev_tuner_ops tvp5150_tuner_ops = {
Hans Verkuil6b8fe022008-12-18 11:17:25 -03001373 .g_tuner = tvp5150_g_tuner,
1374};
1375
1376static const struct v4l2_subdev_video_ops tvp5150_video_ops = {
Laurent Pinchart8774bed2014-04-28 16:53:01 -03001377 .s_std = tvp5150_s_std,
Laurent Pinchart460b6c02016-01-07 10:46:45 -02001378 .s_stream = tvp5150_s_stream,
Hans Verkuil6b8fe022008-12-18 11:17:25 -03001379 .s_routing = tvp5150_s_routing,
Laurent Pinchartdd3a46b2016-01-07 10:46:46 -02001380 .g_mbus_config = tvp5150_g_mbus_config,
Hans Verkuil32cd5272010-03-14 09:57:30 -03001381};
1382
1383static const struct v4l2_subdev_vbi_ops tvp5150_vbi_ops = {
Hans Verkuil6b8fe022008-12-18 11:17:25 -03001384 .g_sliced_vbi_cap = tvp5150_g_sliced_vbi_cap,
Hans Verkuild37dad42010-03-14 10:59:16 -03001385 .g_sliced_fmt = tvp5150_g_sliced_fmt,
1386 .s_sliced_fmt = tvp5150_s_sliced_fmt,
1387 .s_raw_fmt = tvp5150_s_raw_fmt,
Hans Verkuil6b8fe022008-12-18 11:17:25 -03001388};
1389
Hans Verkuilebcff5f2015-04-09 04:01:33 -03001390static const struct v4l2_subdev_pad_ops tvp5150_pad_ops = {
Philipp Zabelb440b732018-06-28 12:20:40 -04001391 .init_cfg = tvp5150_init_cfg,
Hans Verkuilebcff5f2015-04-09 04:01:33 -03001392 .enum_mbus_code = tvp5150_enum_mbus_code,
Laurent Pincharte545ac82016-01-26 10:46:24 -02001393 .enum_frame_size = tvp5150_enum_frame_size,
Hans Verkuilda298c62015-04-09 04:02:34 -03001394 .set_fmt = tvp5150_fill_fmt,
1395 .get_fmt = tvp5150_fill_fmt,
Hans Verkuil10d5509c2015-12-14 08:25:32 -02001396 .get_selection = tvp5150_get_selection,
1397 .set_selection = tvp5150_set_selection,
Hans Verkuilebcff5f2015-04-09 04:01:33 -03001398};
1399
Hans Verkuil6b8fe022008-12-18 11:17:25 -03001400static const struct v4l2_subdev_ops tvp5150_ops = {
1401 .core = &tvp5150_core_ops,
1402 .tuner = &tvp5150_tuner_ops,
1403 .video = &tvp5150_video_ops,
Hans Verkuil32cd5272010-03-14 09:57:30 -03001404 .vbi = &tvp5150_vbi_ops,
Hans Verkuilebcff5f2015-04-09 04:01:33 -03001405 .pad = &tvp5150_pad_ops,
Hans Verkuil6b8fe022008-12-18 11:17:25 -03001406};
1407
Javier Martinez Canillas5a08bc02016-08-11 13:28:15 -03001408static const struct v4l2_subdev_internal_ops tvp5150_internal_ops = {
1409 .registered = tvp5150_registered,
1410};
1411
Mauro Carvalho Chehabcd4665c2005-11-08 21:36:40 -08001412/****************************************************************************
1413 I2C Client & Driver
1414 ****************************************************************************/
Mauro Carvalho Chehabcd4665c2005-11-08 21:36:40 -08001415
Philipp Zabel28b9e222018-06-28 12:20:35 -04001416static const struct regmap_range tvp5150_readable_ranges[] = {
1417 {
1418 .range_min = TVP5150_VD_IN_SRC_SEL_1,
1419 .range_max = TVP5150_AUTOSW_MSK,
1420 }, {
1421 .range_min = TVP5150_COLOR_KIL_THSH_CTL,
1422 .range_max = TVP5150_CONF_SHARED_PIN,
1423 }, {
1424 .range_min = TVP5150_ACT_VD_CROP_ST_MSB,
1425 .range_max = TVP5150_HORIZ_SYNC_START,
1426 }, {
1427 .range_min = TVP5150_VERT_BLANKING_START,
1428 .range_max = TVP5150_INTT_CONFIG_REG_B,
1429 }, {
1430 .range_min = TVP5150_VIDEO_STD,
1431 .range_max = TVP5150_VIDEO_STD,
1432 }, {
1433 .range_min = TVP5150_CB_GAIN_FACT,
1434 .range_max = TVP5150_REV_SELECT,
1435 }, {
1436 .range_min = TVP5150_MSB_DEV_ID,
1437 .range_max = TVP5150_STATUS_REG_5,
1438 }, {
1439 .range_min = TVP5150_CC_DATA_INI,
1440 .range_max = TVP5150_TELETEXT_FIL_ENA,
1441 }, {
1442 .range_min = TVP5150_INT_STATUS_REG_A,
1443 .range_max = TVP5150_FIFO_OUT_CTRL,
1444 }, {
1445 .range_min = TVP5150_FULL_FIELD_ENA,
1446 .range_max = TVP5150_FULL_FIELD_MODE_REG,
1447 },
1448};
1449
1450bool tvp5150_volatile_reg(struct device *dev, unsigned int reg)
1451{
1452 switch (reg) {
1453 case TVP5150_VERT_LN_COUNT_MSB:
1454 case TVP5150_VERT_LN_COUNT_LSB:
1455 case TVP5150_INT_STATUS_REG_A:
1456 case TVP5150_INT_STATUS_REG_B:
1457 case TVP5150_INT_ACTIVE_REG_B:
1458 case TVP5150_STATUS_REG_1:
1459 case TVP5150_STATUS_REG_2:
1460 case TVP5150_STATUS_REG_3:
1461 case TVP5150_STATUS_REG_4:
1462 case TVP5150_STATUS_REG_5:
1463 /* CC, WSS, VPS, VITC data? */
1464 case TVP5150_VBI_FIFO_READ_DATA:
1465 case TVP5150_VDP_STATUS_REG:
1466 case TVP5150_FIFO_WORD_COUNT:
1467 return true;
1468 default:
1469 return false;
1470 }
1471}
1472
1473static const struct regmap_access_table tvp5150_readable_table = {
1474 .yes_ranges = tvp5150_readable_ranges,
1475 .n_yes_ranges = ARRAY_SIZE(tvp5150_readable_ranges),
1476};
1477
1478static struct regmap_config tvp5150_config = {
1479 .reg_bits = 8,
1480 .val_bits = 8,
1481 .max_register = 0xff,
1482
1483 .cache_type = REGCACHE_RBTREE,
1484
1485 .rd_table = &tvp5150_readable_table,
1486 .volatile_reg = tvp5150_volatile_reg,
1487};
1488
Laurent Pinchart78715972016-01-07 10:46:41 -02001489static int tvp5150_detect_version(struct tvp5150 *core)
1490{
1491 struct v4l2_subdev *sd = &core->sd;
1492 struct i2c_client *c = v4l2_get_subdevdata(sd);
Laurent Pinchart78715972016-01-07 10:46:41 -02001493 u8 regs[4];
1494 int res;
1495
1496 /*
1497 * Read consequent registers - TVP5150_MSB_DEV_ID, TVP5150_LSB_DEV_ID,
1498 * TVP5150_ROM_MAJOR_VER, TVP5150_ROM_MINOR_VER
1499 */
Philipp Zabel28b9e222018-06-28 12:20:35 -04001500 res = regmap_bulk_read(core->regmap, TVP5150_MSB_DEV_ID, regs, 4);
1501 if (res < 0) {
1502 dev_err(&c->dev, "reading ID registers failed: %d\n", res);
1503 return res;
Laurent Pinchart78715972016-01-07 10:46:41 -02001504 }
1505
Javier Martinez Canillas82275132016-02-05 17:09:54 -02001506 core->dev_id = (regs[0] << 8) | regs[1];
1507 core->rom_ver = (regs[2] << 8) | regs[3];
Laurent Pinchart78715972016-01-07 10:46:41 -02001508
Mauro Carvalho Chehab257e29f2016-11-16 08:58:05 -02001509 dev_info(sd->dev, "tvp%04x (%u.%u) chip found @ 0x%02x (%s)\n",
Javier Martinez Canillas82275132016-02-05 17:09:54 -02001510 core->dev_id, regs[2], regs[3], c->addr << 1,
1511 c->adapter->name);
Laurent Pinchart78715972016-01-07 10:46:41 -02001512
Javier Martinez Canillas82275132016-02-05 17:09:54 -02001513 if (core->dev_id == 0x5150 && core->rom_ver == 0x0321) {
Mauro Carvalho Chehab257e29f2016-11-16 08:58:05 -02001514 dev_info(sd->dev, "tvp5150a detected.\n");
Javier Martinez Canillas82275132016-02-05 17:09:54 -02001515 } else if (core->dev_id == 0x5150 && core->rom_ver == 0x0400) {
Mauro Carvalho Chehab257e29f2016-11-16 08:58:05 -02001516 dev_info(sd->dev, "tvp5150am1 detected.\n");
Laurent Pinchart78715972016-01-07 10:46:41 -02001517
1518 /* ITU-T BT.656.4 timing */
Philipp Zabel28b9e222018-06-28 12:20:35 -04001519 regmap_write(core->regmap, TVP5150_REV_SELECT, 0);
Javier Martinez Canillas82275132016-02-05 17:09:54 -02001520 } else if (core->dev_id == 0x5151 && core->rom_ver == 0x0100) {
Mauro Carvalho Chehab257e29f2016-11-16 08:58:05 -02001521 dev_info(sd->dev, "tvp5151 detected.\n");
Laurent Pinchart78715972016-01-07 10:46:41 -02001522 } else {
Mauro Carvalho Chehab257e29f2016-11-16 08:58:05 -02001523 dev_info(sd->dev, "*** unknown tvp%04x chip detected.\n",
Javier Martinez Canillas82275132016-02-05 17:09:54 -02001524 core->dev_id);
Laurent Pinchart78715972016-01-07 10:46:41 -02001525 }
1526
1527 return 0;
1528}
1529
Javier Martinez Canillas09aa2602016-01-07 10:46:49 -02001530static int tvp5150_init(struct i2c_client *c)
1531{
1532 struct gpio_desc *pdn_gpio;
1533 struct gpio_desc *reset_gpio;
1534
1535 pdn_gpio = devm_gpiod_get_optional(&c->dev, "pdn", GPIOD_OUT_HIGH);
1536 if (IS_ERR(pdn_gpio))
1537 return PTR_ERR(pdn_gpio);
1538
1539 if (pdn_gpio) {
1540 gpiod_set_value_cansleep(pdn_gpio, 0);
1541 /* Delay time between power supplies active and reset */
1542 msleep(20);
1543 }
1544
1545 reset_gpio = devm_gpiod_get_optional(&c->dev, "reset", GPIOD_OUT_HIGH);
1546 if (IS_ERR(reset_gpio))
1547 return PTR_ERR(reset_gpio);
1548
1549 if (reset_gpio) {
1550 /* RESETB pulse duration */
1551 ndelay(500);
1552 gpiod_set_value_cansleep(reset_gpio, 0);
1553 /* Delay time between end of reset to I2C active */
1554 usleep_range(200, 250);
1555 }
1556
1557 return 0;
1558}
1559
Javier Martinez Canillasa2e5f1b2016-01-07 10:46:50 -02001560static int tvp5150_parse_dt(struct tvp5150 *decoder, struct device_node *np)
1561{
Sakari Ailus859969b2016-08-26 20:17:25 -03001562 struct v4l2_fwnode_endpoint bus_cfg;
Javier Martinez Canillasa2e5f1b2016-01-07 10:46:50 -02001563 struct device_node *ep;
Javier Martinez Canillasf7b4b542016-02-05 17:09:58 -02001564#ifdef CONFIG_MEDIA_CONTROLLER
1565 struct device_node *connectors, *child;
1566 struct media_entity *input;
1567 const char *name;
1568 u32 input_type;
1569#endif
Javier Martinez Canillasa2e5f1b2016-01-07 10:46:50 -02001570 unsigned int flags;
1571 int ret = 0;
1572
1573 ep = of_graph_get_next_endpoint(np, NULL);
1574 if (!ep)
1575 return -EINVAL;
1576
Sakari Ailus859969b2016-08-26 20:17:25 -03001577 ret = v4l2_fwnode_endpoint_parse(of_fwnode_handle(ep), &bus_cfg);
Javier Martinez Canillasa2e5f1b2016-01-07 10:46:50 -02001578 if (ret)
1579 goto err;
1580
1581 flags = bus_cfg.bus.parallel.flags;
1582
1583 if (bus_cfg.bus_type == V4L2_MBUS_PARALLEL &&
1584 !(flags & V4L2_MBUS_HSYNC_ACTIVE_HIGH &&
1585 flags & V4L2_MBUS_VSYNC_ACTIVE_HIGH &&
Javier Martinez Canillas2bd5e432016-02-05 17:09:53 -02001586 flags & V4L2_MBUS_FIELD_EVEN_LOW)) {
1587 ret = -EINVAL;
1588 goto err;
1589 }
Javier Martinez Canillasa2e5f1b2016-01-07 10:46:50 -02001590
1591 decoder->mbus_type = bus_cfg.bus_type;
1592
Javier Martinez Canillasf7b4b542016-02-05 17:09:58 -02001593#ifdef CONFIG_MEDIA_CONTROLLER
1594 connectors = of_get_child_by_name(np, "connectors");
1595
1596 if (!connectors)
1597 goto err;
1598
1599 for_each_available_child_of_node(connectors, child) {
1600 ret = of_property_read_u32(child, "input", &input_type);
1601 if (ret) {
Mauro Carvalho Chehab257e29f2016-11-16 08:58:05 -02001602 dev_err(decoder->sd.dev,
Rob Herringf764e6d2018-08-27 21:52:29 -04001603 "missing type property in node %pOFn\n",
1604 child);
Javier Martinez Canillasf7b4b542016-02-05 17:09:58 -02001605 goto err_connector;
1606 }
1607
Mauro Carvalho Chehab60ad7682016-02-19 15:02:30 -02001608 if (input_type >= TVP5150_INPUT_NUM) {
Javier Martinez Canillasf7b4b542016-02-05 17:09:58 -02001609 ret = -EINVAL;
1610 goto err_connector;
1611 }
1612
1613 input = &decoder->input_ent[input_type];
1614
1615 /* Each input connector can only be defined once */
1616 if (input->name) {
Mauro Carvalho Chehab257e29f2016-11-16 08:58:05 -02001617 dev_err(decoder->sd.dev,
Javier Martinez Canillasf7b4b542016-02-05 17:09:58 -02001618 "input %s with same type already exists\n",
1619 input->name);
1620 ret = -EINVAL;
1621 goto err_connector;
1622 }
1623
1624 switch (input_type) {
1625 case TVP5150_COMPOSITE0:
1626 case TVP5150_COMPOSITE1:
1627 input->function = MEDIA_ENT_F_CONN_COMPOSITE;
1628 break;
1629 case TVP5150_SVIDEO:
1630 input->function = MEDIA_ENT_F_CONN_SVIDEO;
1631 break;
Javier Martinez Canillasf7b4b542016-02-05 17:09:58 -02001632 }
1633
1634 input->flags = MEDIA_ENT_FL_CONNECTOR;
1635
1636 ret = of_property_read_string(child, "label", &name);
1637 if (ret < 0) {
Mauro Carvalho Chehab257e29f2016-11-16 08:58:05 -02001638 dev_err(decoder->sd.dev,
Rob Herringf764e6d2018-08-27 21:52:29 -04001639 "missing label property in node %pOFn\n",
1640 child);
Javier Martinez Canillasf7b4b542016-02-05 17:09:58 -02001641 goto err_connector;
1642 }
1643
1644 input->name = name;
1645 }
1646
1647err_connector:
1648 of_node_put(connectors);
1649#endif
Javier Martinez Canillasa2e5f1b2016-01-07 10:46:50 -02001650err:
1651 of_node_put(ep);
1652 return ret;
1653}
1654
Mauro Carvalho Chehabc43875f2016-02-12 15:42:02 -02001655static const char * const tvp5150_test_patterns[2] = {
1656 "Disabled",
1657 "Black screen"
1658};
1659
Hans Verkuil6b8fe022008-12-18 11:17:25 -03001660static int tvp5150_probe(struct i2c_client *c,
1661 const struct i2c_device_id *id)
Mauro Carvalho Chehabcd4665c2005-11-08 21:36:40 -08001662{
Mauro Carvalho Chehabcd4665c2005-11-08 21:36:40 -08001663 struct tvp5150 *core;
Hans Verkuil6b8fe022008-12-18 11:17:25 -03001664 struct v4l2_subdev *sd;
Javier Martinez Canillasa2e5f1b2016-01-07 10:46:50 -02001665 struct device_node *np = c->dev.of_node;
Philipp Zabel28b9e222018-06-28 12:20:35 -04001666 struct regmap *map;
Laurent Pinchart78715972016-01-07 10:46:41 -02001667 int res;
Mauro Carvalho Chehabcd4665c2005-11-08 21:36:40 -08001668
1669 /* Check if the adapter supports the needed features */
Hans Verkuil6b8fe022008-12-18 11:17:25 -03001670 if (!i2c_check_functionality(c->adapter,
Mauro Carvalho Chehabcd4665c2005-11-08 21:36:40 -08001671 I2C_FUNC_SMBUS_READ_BYTE | I2C_FUNC_SMBUS_WRITE_BYTE_DATA))
Hans Verkuil6b8fe022008-12-18 11:17:25 -03001672 return -EIO;
Mauro Carvalho Chehabcd4665c2005-11-08 21:36:40 -08001673
Javier Martinez Canillas09aa2602016-01-07 10:46:49 -02001674 res = tvp5150_init(c);
1675 if (res)
1676 return res;
1677
Laurent Pinchartc02b2112013-05-02 08:29:43 -03001678 core = devm_kzalloc(&c->dev, sizeof(*core), GFP_KERNEL);
1679 if (!core)
Mauro Carvalho Chehabcd4665c2005-11-08 21:36:40 -08001680 return -ENOMEM;
Javier Martinez Canillasa2e5f1b2016-01-07 10:46:50 -02001681
Philipp Zabel28b9e222018-06-28 12:20:35 -04001682 map = devm_regmap_init_i2c(c, &tvp5150_config);
1683 if (IS_ERR(map))
1684 return PTR_ERR(map);
1685
1686 core->regmap = map;
Hans Verkuil6b8fe022008-12-18 11:17:25 -03001687 sd = &core->sd;
Javier Martinez Canillasa2e5f1b2016-01-07 10:46:50 -02001688
1689 if (IS_ENABLED(CONFIG_OF) && np) {
1690 res = tvp5150_parse_dt(core, np);
1691 if (res) {
Mauro Carvalho Chehab257e29f2016-11-16 08:58:05 -02001692 dev_err(sd->dev, "DT parsing error: %d\n", res);
Javier Martinez Canillasa2e5f1b2016-01-07 10:46:50 -02001693 return res;
1694 }
1695 } else {
1696 /* Default to BT.656 embedded sync */
1697 core->mbus_type = V4L2_MBUS_BT656;
1698 }
1699
Hans Verkuil6b8fe022008-12-18 11:17:25 -03001700 v4l2_i2c_subdev_init(sd, c, &tvp5150_ops);
Javier Martinez Canillas5a08bc02016-08-11 13:28:15 -03001701 sd->internal_ops = &tvp5150_internal_ops;
Laurent Pincharte545ac82016-01-26 10:46:24 -02001702 sd->flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
1703
1704#if defined(CONFIG_MEDIA_CONTROLLER)
Mauro Carvalho Chehabbc322c02018-08-01 06:10:05 -04001705 core->pads[TVP5150_PAD_IF_INPUT].flags = MEDIA_PAD_FL_SINK;
1706 core->pads[TVP5150_PAD_IF_INPUT].sig_type = PAD_SIGNAL_ANALOG;
1707 core->pads[TVP5150_PAD_VID_OUT].flags = MEDIA_PAD_FL_SOURCE;
1708 core->pads[TVP5150_PAD_VID_OUT].sig_type = PAD_SIGNAL_DV;
Mauro Carvalho Chehabf92c70a2016-01-27 15:09:15 -02001709
1710 sd->entity.function = MEDIA_ENT_F_ATV_DECODER;
1711
Mauro Carvalho Chehabbc322c02018-08-01 06:10:05 -04001712 res = media_entity_pads_init(&sd->entity, TVP5150_NUM_PADS, core->pads);
Laurent Pincharte545ac82016-01-26 10:46:24 -02001713 if (res < 0)
1714 return res;
Javier Martinez Canillasf7b4b542016-02-05 17:09:58 -02001715
1716 sd->entity.ops = &tvp5150_sd_media_ops;
Laurent Pincharte545ac82016-01-26 10:46:24 -02001717#endif
Dmitry Lifshitz8cd0d4c2012-06-13 07:49:30 -03001718
Laurent Pinchart78715972016-01-07 10:46:41 -02001719 res = tvp5150_detect_version(core);
1720 if (res < 0)
1721 return res;
Mauro Carvalho Chehab0e09a3c2011-02-22 00:10:22 -03001722
Mauro Carvalho Chehab3ad96832006-01-23 17:11:05 -02001723 core->norm = V4L2_STD_ALL; /* Default is autodetect */
Philipp Zabelb440b732018-06-28 12:20:40 -04001724 core->detected_norm = V4L2_STD_UNKNOWN;
Hans Verkuil5325b422009-04-02 11:26:22 -03001725 core->input = TVP5150_COMPOSITE1;
Mauro Carvalho Chehabc43875f2016-02-12 15:42:02 -02001726 core->enable = true;
Hans Verkuil6c45ec72010-12-12 08:45:43 -03001727
Laurent Pinchartb1950b82016-01-07 10:46:44 -02001728 v4l2_ctrl_handler_init(&core->hdl, 5);
Hans Verkuil6c45ec72010-12-12 08:45:43 -03001729 v4l2_ctrl_new_std(&core->hdl, &tvp5150_ctrl_ops,
1730 V4L2_CID_BRIGHTNESS, 0, 255, 1, 128);
1731 v4l2_ctrl_new_std(&core->hdl, &tvp5150_ctrl_ops,
1732 V4L2_CID_CONTRAST, 0, 255, 1, 128);
1733 v4l2_ctrl_new_std(&core->hdl, &tvp5150_ctrl_ops,
1734 V4L2_CID_SATURATION, 0, 255, 1, 128);
1735 v4l2_ctrl_new_std(&core->hdl, &tvp5150_ctrl_ops,
1736 V4L2_CID_HUE, -128, 127, 1, 0);
Laurent Pinchartb1950b82016-01-07 10:46:44 -02001737 v4l2_ctrl_new_std(&core->hdl, &tvp5150_ctrl_ops,
1738 V4L2_CID_PIXEL_RATE, 27000000,
1739 27000000, 1, 27000000);
Mauro Carvalho Chehabc43875f2016-02-12 15:42:02 -02001740 v4l2_ctrl_new_std_menu_items(&core->hdl, &tvp5150_ctrl_ops,
1741 V4L2_CID_TEST_PATTERN,
Mauro Carvalho Chehab5c4c4502018-09-13 16:49:51 -04001742 ARRAY_SIZE(tvp5150_test_patterns) - 1,
Mauro Carvalho Chehabc43875f2016-02-12 15:42:02 -02001743 0, 0, tvp5150_test_patterns);
Hans Verkuil6c45ec72010-12-12 08:45:43 -03001744 sd->ctrl_handler = &core->hdl;
1745 if (core->hdl.error) {
Dmitry Lifshitz8cd0d4c2012-06-13 07:49:30 -03001746 res = core->hdl.error;
Javier Martinez Canillasc7d97492015-09-21 08:23:09 -03001747 goto err;
Hans Verkuil6c45ec72010-12-12 08:45:43 -03001748 }
Mauro Carvalho Chehab4c86f972005-11-08 21:36:43 -08001749
Marco Felsch5cb82942018-06-28 12:20:39 -04001750 tvp5150_set_default(tvp5150_read_std(sd), &core->rect);
Javier Martin963ddc62012-01-31 05:23:46 -03001751
Philipp Zabel8e4c97e2018-06-28 12:20:44 -04001752 core->irq = c->irq;
Laurent Pinchartaff808e2016-12-09 09:47:17 -02001753 tvp5150_reset(sd, 0); /* Calls v4l2_ctrl_handler_setup() */
Philipp Zabel8e4c97e2018-06-28 12:20:44 -04001754 if (c->irq) {
1755 res = devm_request_threaded_irq(&c->dev, c->irq, NULL,
1756 tvp5150_isr, IRQF_TRIGGER_HIGH |
1757 IRQF_ONESHOT, "tvp5150", core);
1758 if (res)
1759 return res;
1760 } else {
1761 core->lock = true;
1762 }
Laurent Pinchartaff808e2016-12-09 09:47:17 -02001763
Javier Martinez Canillasc7d97492015-09-21 08:23:09 -03001764 res = v4l2_async_register_subdev(sd);
1765 if (res < 0)
1766 goto err;
1767
Markus Rechbergerf1e5ee42006-02-07 04:01:19 +01001768 if (debug > 1)
Hans Verkuil6b8fe022008-12-18 11:17:25 -03001769 tvp5150_log_status(sd);
Mauro Carvalho Chehabcd4665c2005-11-08 21:36:40 -08001770 return 0;
Javier Martinez Canillasc7d97492015-09-21 08:23:09 -03001771
1772err:
1773 v4l2_ctrl_handler_free(&core->hdl);
1774 return res;
Mauro Carvalho Chehabcd4665c2005-11-08 21:36:40 -08001775}
1776
Hans Verkuil6b8fe022008-12-18 11:17:25 -03001777static int tvp5150_remove(struct i2c_client *c)
Mauro Carvalho Chehabcd4665c2005-11-08 21:36:40 -08001778{
Hans Verkuil6b8fe022008-12-18 11:17:25 -03001779 struct v4l2_subdev *sd = i2c_get_clientdata(c);
Hans Verkuil6c45ec72010-12-12 08:45:43 -03001780 struct tvp5150 *decoder = to_tvp5150(sd);
Mauro Carvalho Chehabcd4665c2005-11-08 21:36:40 -08001781
Mauro Carvalho Chehab257e29f2016-11-16 08:58:05 -02001782 dev_dbg_lvl(sd->dev, 1, debug,
Mauro Carvalho Chehabe1bc80a2006-01-09 15:25:36 -02001783 "tvp5150.c: removing tvp5150 adapter on address 0x%x\n",
1784 c->addr << 1);
1785
Javier Martinez Canillasc7d97492015-09-21 08:23:09 -03001786 v4l2_async_unregister_subdev(sd);
Hans Verkuil6c45ec72010-12-12 08:45:43 -03001787 v4l2_ctrl_handler_free(&decoder->hdl);
Mauro Carvalho Chehabcd4665c2005-11-08 21:36:40 -08001788 return 0;
1789}
1790
1791/* ----------------------------------------------------------------------- */
1792
Hans Verkuil6b8fe022008-12-18 11:17:25 -03001793static const struct i2c_device_id tvp5150_id[] = {
1794 { "tvp5150", 0 },
1795 { }
Mauro Carvalho Chehabcd4665c2005-11-08 21:36:40 -08001796};
Hans Verkuil6b8fe022008-12-18 11:17:25 -03001797MODULE_DEVICE_TABLE(i2c, tvp5150_id);
Mauro Carvalho Chehabcd4665c2005-11-08 21:36:40 -08001798
Eduard Gavin7ef930a2016-01-07 10:46:48 -02001799#if IS_ENABLED(CONFIG_OF)
1800static const struct of_device_id tvp5150_of_match[] = {
1801 { .compatible = "ti,tvp5150", },
1802 { /* sentinel */ },
1803};
1804MODULE_DEVICE_TABLE(of, tvp5150_of_match);
1805#endif
1806
Hans Verkuilc7711452010-09-15 15:45:20 -03001807static struct i2c_driver tvp5150_driver = {
1808 .driver = {
Eduard Gavin7ef930a2016-01-07 10:46:48 -02001809 .of_match_table = of_match_ptr(tvp5150_of_match),
Hans Verkuilc7711452010-09-15 15:45:20 -03001810 .name = "tvp5150",
1811 },
1812 .probe = tvp5150_probe,
1813 .remove = tvp5150_remove,
1814 .id_table = tvp5150_id,
Hans Verkuil6b8fe022008-12-18 11:17:25 -03001815};
Hans Verkuilc7711452010-09-15 15:45:20 -03001816
Axel Linc6e8d862012-02-12 06:56:32 -03001817module_i2c_driver(tvp5150_driver);