Thomas Gleixner | c51669e | 2019-05-31 01:09:37 -0700 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0-only |
Paul Mundt | 739d340 | 2008-02-06 01:38:44 -0800 | [diff] [blame] | 2 | /* |
| 3 | * Dallas DS1302 RTC Support |
| 4 | * |
Alessandro Zummo | 2bfc330 | 2009-08-20 12:31:49 +0900 | [diff] [blame] | 5 | * Copyright (C) 2002 David McCullough |
| 6 | * Copyright (C) 2003 - 2007 Paul Mundt |
Paul Mundt | 739d340 | 2008-02-06 01:38:44 -0800 | [diff] [blame] | 7 | */ |
Alessandro Zummo | 2bfc330 | 2009-08-20 12:31:49 +0900 | [diff] [blame] | 8 | |
Paul Mundt | 739d340 | 2008-02-06 01:38:44 -0800 | [diff] [blame] | 9 | #include <linux/bcd.h> |
Sergey Yanovich | d25a5ed | 2016-02-23 13:54:57 +0300 | [diff] [blame] | 10 | #include <linux/init.h> |
| 11 | #include <linux/io.h> |
| 12 | #include <linux/kernel.h> |
| 13 | #include <linux/module.h> |
| 14 | #include <linux/of.h> |
| 15 | #include <linux/rtc.h> |
| 16 | #include <linux/spi/spi.h> |
Paul Mundt | 739d340 | 2008-02-06 01:38:44 -0800 | [diff] [blame] | 17 | |
| 18 | #define DRV_NAME "rtc-ds1302" |
Paul Mundt | 739d340 | 2008-02-06 01:38:44 -0800 | [diff] [blame] | 19 | |
| 20 | #define RTC_CMD_READ 0x81 /* Read command */ |
| 21 | #define RTC_CMD_WRITE 0x80 /* Write command */ |
| 22 | |
Sergey Yanovich | dfc657b | 2013-07-03 15:07:46 -0700 | [diff] [blame] | 23 | #define RTC_CMD_WRITE_ENABLE 0x00 /* Write enable */ |
| 24 | #define RTC_CMD_WRITE_DISABLE 0x80 /* Write disable */ |
| 25 | |
Paul Mundt | 739d340 | 2008-02-06 01:38:44 -0800 | [diff] [blame] | 26 | #define RTC_ADDR_RAM0 0x20 /* Address of RAM0 */ |
| 27 | #define RTC_ADDR_TCR 0x08 /* Address of trickle charge register */ |
Sergey Yanovich | d25a5ed | 2016-02-23 13:54:57 +0300 | [diff] [blame] | 28 | #define RTC_CLCK_BURST 0x1F /* Address of clock burst */ |
| 29 | #define RTC_CLCK_LEN 0x08 /* Size of clock burst */ |
Sergey Yanovich | dfc657b | 2013-07-03 15:07:46 -0700 | [diff] [blame] | 30 | #define RTC_ADDR_CTRL 0x07 /* Address of control register */ |
Paul Mundt | 739d340 | 2008-02-06 01:38:44 -0800 | [diff] [blame] | 31 | #define RTC_ADDR_YEAR 0x06 /* Address of year register */ |
| 32 | #define RTC_ADDR_DAY 0x05 /* Address of day of week register */ |
| 33 | #define RTC_ADDR_MON 0x04 /* Address of month register */ |
| 34 | #define RTC_ADDR_DATE 0x03 /* Address of day of month register */ |
| 35 | #define RTC_ADDR_HOUR 0x02 /* Address of hour register */ |
| 36 | #define RTC_ADDR_MIN 0x01 /* Address of minute register */ |
| 37 | #define RTC_ADDR_SEC 0x00 /* Address of second register */ |
| 38 | |
Sergey Yanovich | d25a5ed | 2016-02-23 13:54:57 +0300 | [diff] [blame] | 39 | static int ds1302_rtc_set_time(struct device *dev, struct rtc_time *time) |
Marc Zyngier | 72cc8e5 | 2010-05-24 14:33:47 -0700 | [diff] [blame] | 40 | { |
Sergey Yanovich | d25a5ed | 2016-02-23 13:54:57 +0300 | [diff] [blame] | 41 | struct spi_device *spi = dev_get_drvdata(dev); |
| 42 | u8 buf[1 + RTC_CLCK_LEN]; |
Colin Ian King | 5134d2f | 2018-01-23 10:17:27 +0000 | [diff] [blame] | 43 | u8 *bp; |
Sergey Yanovich | d25a5ed | 2016-02-23 13:54:57 +0300 | [diff] [blame] | 44 | int status; |
| 45 | |
| 46 | /* Enable writing */ |
| 47 | bp = buf; |
| 48 | *bp++ = RTC_ADDR_CTRL << 1 | RTC_CMD_WRITE; |
| 49 | *bp++ = RTC_CMD_WRITE_ENABLE; |
| 50 | |
| 51 | status = spi_write_then_read(spi, buf, 2, |
| 52 | NULL, 0); |
Akinobu Mita | bc83a14 | 2016-04-10 23:59:23 +0900 | [diff] [blame] | 53 | if (status) |
Sergey Yanovich | d25a5ed | 2016-02-23 13:54:57 +0300 | [diff] [blame] | 54 | return status; |
| 55 | |
| 56 | /* Write registers starting at the first time/date address. */ |
| 57 | bp = buf; |
| 58 | *bp++ = RTC_CLCK_BURST << 1 | RTC_CMD_WRITE; |
| 59 | |
| 60 | *bp++ = bin2bcd(time->tm_sec); |
| 61 | *bp++ = bin2bcd(time->tm_min); |
| 62 | *bp++ = bin2bcd(time->tm_hour); |
| 63 | *bp++ = bin2bcd(time->tm_mday); |
| 64 | *bp++ = bin2bcd(time->tm_mon + 1); |
Akinobu Mita | ef50f86 | 2016-04-10 23:59:24 +0900 | [diff] [blame] | 65 | *bp++ = time->tm_wday + 1; |
Sergey Yanovich | d25a5ed | 2016-02-23 13:54:57 +0300 | [diff] [blame] | 66 | *bp++ = bin2bcd(time->tm_year % 100); |
| 67 | *bp++ = RTC_CMD_WRITE_DISABLE; |
| 68 | |
| 69 | /* use write-then-read since dma from stack is nonportable */ |
| 70 | return spi_write_then_read(spi, buf, sizeof(buf), |
| 71 | NULL, 0); |
Marc Zyngier | 72cc8e5 | 2010-05-24 14:33:47 -0700 | [diff] [blame] | 72 | } |
| 73 | |
Sergey Yanovich | d25a5ed | 2016-02-23 13:54:57 +0300 | [diff] [blame] | 74 | static int ds1302_rtc_get_time(struct device *dev, struct rtc_time *time) |
Marc Zyngier | 72cc8e5 | 2010-05-24 14:33:47 -0700 | [diff] [blame] | 75 | { |
Sergey Yanovich | d25a5ed | 2016-02-23 13:54:57 +0300 | [diff] [blame] | 76 | struct spi_device *spi = dev_get_drvdata(dev); |
| 77 | u8 addr = RTC_CLCK_BURST << 1 | RTC_CMD_READ; |
| 78 | u8 buf[RTC_CLCK_LEN - 1]; |
| 79 | int status; |
Marc Zyngier | 72cc8e5 | 2010-05-24 14:33:47 -0700 | [diff] [blame] | 80 | |
Sergey Yanovich | d25a5ed | 2016-02-23 13:54:57 +0300 | [diff] [blame] | 81 | /* Use write-then-read to get all the date/time registers |
| 82 | * since dma from stack is nonportable |
| 83 | */ |
| 84 | status = spi_write_then_read(spi, &addr, sizeof(addr), |
| 85 | buf, sizeof(buf)); |
| 86 | if (status < 0) |
| 87 | return status; |
Marc Zyngier | 72cc8e5 | 2010-05-24 14:33:47 -0700 | [diff] [blame] | 88 | |
Sergey Yanovich | d25a5ed | 2016-02-23 13:54:57 +0300 | [diff] [blame] | 89 | /* Decode the registers */ |
| 90 | time->tm_sec = bcd2bin(buf[RTC_ADDR_SEC]); |
| 91 | time->tm_min = bcd2bin(buf[RTC_ADDR_MIN]); |
| 92 | time->tm_hour = bcd2bin(buf[RTC_ADDR_HOUR]); |
| 93 | time->tm_wday = buf[RTC_ADDR_DAY] - 1; |
| 94 | time->tm_mday = bcd2bin(buf[RTC_ADDR_DATE]); |
| 95 | time->tm_mon = bcd2bin(buf[RTC_ADDR_MON]) - 1; |
| 96 | time->tm_year = bcd2bin(buf[RTC_ADDR_YEAR]) + 100; |
Marc Zyngier | 72cc8e5 | 2010-05-24 14:33:47 -0700 | [diff] [blame] | 97 | |
Alexandre Belloni | 22652ba | 2018-02-19 16:23:56 +0100 | [diff] [blame] | 98 | return 0; |
Paul Mundt | 739d340 | 2008-02-06 01:38:44 -0800 | [diff] [blame] | 99 | } |
| 100 | |
Julia Lawall | 34c7b3a | 2016-08-31 10:05:25 +0200 | [diff] [blame] | 101 | static const struct rtc_class_ops ds1302_rtc_ops = { |
Sergey Yanovich | d25a5ed | 2016-02-23 13:54:57 +0300 | [diff] [blame] | 102 | .read_time = ds1302_rtc_get_time, |
Paul Mundt | 739d340 | 2008-02-06 01:38:44 -0800 | [diff] [blame] | 103 | .set_time = ds1302_rtc_set_time, |
Paul Mundt | 739d340 | 2008-02-06 01:38:44 -0800 | [diff] [blame] | 104 | }; |
| 105 | |
Sergey Yanovich | d25a5ed | 2016-02-23 13:54:57 +0300 | [diff] [blame] | 106 | static int ds1302_probe(struct spi_device *spi) |
Paul Mundt | 739d340 | 2008-02-06 01:38:44 -0800 | [diff] [blame] | 107 | { |
Sergey Yanovich | d25a5ed | 2016-02-23 13:54:57 +0300 | [diff] [blame] | 108 | struct rtc_device *rtc; |
| 109 | u8 addr; |
| 110 | u8 buf[4]; |
Colin Ian King | 5134d2f | 2018-01-23 10:17:27 +0000 | [diff] [blame] | 111 | u8 *bp; |
Sergey Yanovich | d25a5ed | 2016-02-23 13:54:57 +0300 | [diff] [blame] | 112 | int status; |
Paul Mundt | 739d340 | 2008-02-06 01:38:44 -0800 | [diff] [blame] | 113 | |
Sergey Yanovich | d25a5ed | 2016-02-23 13:54:57 +0300 | [diff] [blame] | 114 | /* Sanity check board setup data. This may be hooked up |
| 115 | * in 3wire mode, but we don't care. Note that unless |
| 116 | * there's an inverter in place, this needs SPI_CS_HIGH! |
| 117 | */ |
| 118 | if (spi->bits_per_word && (spi->bits_per_word != 8)) { |
| 119 | dev_err(&spi->dev, "bad word length\n"); |
| 120 | return -EINVAL; |
| 121 | } else if (spi->max_speed_hz > 2000000) { |
| 122 | dev_err(&spi->dev, "speed is too high\n"); |
| 123 | return -EINVAL; |
| 124 | } else if (spi->mode & SPI_CPHA) { |
| 125 | dev_err(&spi->dev, "bad mode\n"); |
Marc Zyngier | 72cc8e5 | 2010-05-24 14:33:47 -0700 | [diff] [blame] | 126 | return -EINVAL; |
| 127 | } |
| 128 | |
Sergey Yanovich | d25a5ed | 2016-02-23 13:54:57 +0300 | [diff] [blame] | 129 | addr = RTC_ADDR_CTRL << 1 | RTC_CMD_READ; |
| 130 | status = spi_write_then_read(spi, &addr, sizeof(addr), buf, 1); |
| 131 | if (status < 0) { |
| 132 | dev_err(&spi->dev, "control register read error %d\n", |
| 133 | status); |
| 134 | return status; |
Marc Zyngier | 72cc8e5 | 2010-05-24 14:33:47 -0700 | [diff] [blame] | 135 | } |
Paul Mundt | 739d340 | 2008-02-06 01:38:44 -0800 | [diff] [blame] | 136 | |
Sergey Yanovich | d25a5ed | 2016-02-23 13:54:57 +0300 | [diff] [blame] | 137 | if ((buf[0] & ~RTC_CMD_WRITE_DISABLE) != 0) { |
| 138 | status = spi_write_then_read(spi, &addr, sizeof(addr), buf, 1); |
| 139 | if (status < 0) { |
| 140 | dev_err(&spi->dev, "control register read error %d\n", |
| 141 | status); |
| 142 | return status; |
| 143 | } |
Paul Mundt | 739d340 | 2008-02-06 01:38:44 -0800 | [diff] [blame] | 144 | |
Sergey Yanovich | d25a5ed | 2016-02-23 13:54:57 +0300 | [diff] [blame] | 145 | if ((buf[0] & ~RTC_CMD_WRITE_DISABLE) != 0) { |
| 146 | dev_err(&spi->dev, "junk in control register\n"); |
| 147 | return -ENODEV; |
| 148 | } |
| 149 | } |
| 150 | if (buf[0] == 0) { |
| 151 | bp = buf; |
| 152 | *bp++ = RTC_ADDR_CTRL << 1 | RTC_CMD_WRITE; |
| 153 | *bp++ = RTC_CMD_WRITE_DISABLE; |
| 154 | |
| 155 | status = spi_write_then_read(spi, buf, 2, NULL, 0); |
| 156 | if (status < 0) { |
| 157 | dev_err(&spi->dev, "control register write error %d\n", |
| 158 | status); |
| 159 | return status; |
| 160 | } |
| 161 | |
| 162 | addr = RTC_ADDR_CTRL << 1 | RTC_CMD_READ; |
| 163 | status = spi_write_then_read(spi, &addr, sizeof(addr), buf, 1); |
| 164 | if (status < 0) { |
| 165 | dev_err(&spi->dev, |
| 166 | "error %d reading control register\n", |
| 167 | status); |
| 168 | return status; |
| 169 | } |
| 170 | |
| 171 | if (buf[0] != RTC_CMD_WRITE_DISABLE) { |
| 172 | dev_err(&spi->dev, "failed to detect chip\n"); |
| 173 | return -ENODEV; |
| 174 | } |
| 175 | } |
| 176 | |
| 177 | spi_set_drvdata(spi, spi); |
| 178 | |
| 179 | rtc = devm_rtc_device_register(&spi->dev, "ds1302", |
| 180 | &ds1302_rtc_ops, THIS_MODULE); |
| 181 | if (IS_ERR(rtc)) { |
| 182 | status = PTR_ERR(rtc); |
| 183 | dev_err(&spi->dev, "error %d registering rtc\n", status); |
| 184 | return status; |
| 185 | } |
Paul Mundt | 739d340 | 2008-02-06 01:38:44 -0800 | [diff] [blame] | 186 | |
| 187 | return 0; |
Paul Mundt | 739d340 | 2008-02-06 01:38:44 -0800 | [diff] [blame] | 188 | } |
| 189 | |
Sergey Yanovich | d25a5ed | 2016-02-23 13:54:57 +0300 | [diff] [blame] | 190 | static int ds1302_remove(struct spi_device *spi) |
| 191 | { |
| 192 | spi_set_drvdata(spi, NULL); |
| 193 | return 0; |
| 194 | } |
| 195 | |
| 196 | #ifdef CONFIG_OF |
| 197 | static const struct of_device_id ds1302_dt_ids[] = { |
| 198 | { .compatible = "maxim,ds1302", }, |
| 199 | { /* sentinel */ } |
| 200 | }; |
| 201 | MODULE_DEVICE_TABLE(of, ds1302_dt_ids); |
| 202 | #endif |
| 203 | |
| 204 | static struct spi_driver ds1302_driver = { |
| 205 | .driver.name = "rtc-ds1302", |
| 206 | .driver.of_match_table = of_match_ptr(ds1302_dt_ids), |
| 207 | .probe = ds1302_probe, |
| 208 | .remove = ds1302_remove, |
Paul Mundt | 739d340 | 2008-02-06 01:38:44 -0800 | [diff] [blame] | 209 | }; |
| 210 | |
Sergey Yanovich | d25a5ed | 2016-02-23 13:54:57 +0300 | [diff] [blame] | 211 | module_spi_driver(ds1302_driver); |
Paul Mundt | 739d340 | 2008-02-06 01:38:44 -0800 | [diff] [blame] | 212 | |
| 213 | MODULE_DESCRIPTION("Dallas DS1302 RTC driver"); |
Paul Mundt | 739d340 | 2008-02-06 01:38:44 -0800 | [diff] [blame] | 214 | MODULE_AUTHOR("Paul Mundt, David McCullough"); |
| 215 | MODULE_LICENSE("GPL v2"); |