Linus Walleij | 8320062 | 2014-02-03 14:32:20 +0100 | [diff] [blame] | 1 | /* |
| 2 | * Copyright 2014 Linaro Ltd. |
| 3 | * |
| 4 | * The code contained herein is licensed under the GNU General Public |
| 5 | * License. You may obtain a copy of the GNU General Public License |
| 6 | * Version 2 or later at the following locations: |
| 7 | * |
| 8 | * http://www.opensource.org/licenses/gpl-license.html |
| 9 | * http://www.gnu.org/copyleft/gpl.html |
| 10 | */ |
| 11 | |
| 12 | / { |
| 13 | soc { |
| 14 | prcmu@80157000 { |
| 15 | ab8500 { |
| 16 | ab8500-gpio { |
| 17 | /* Hog a few default settings */ |
| 18 | pinctrl-names = "default"; |
| 19 | pinctrl-0 = <&gpio2_default_mode>, |
| 20 | <&gpio4_default_mode>, |
| 21 | <&gpio10_default_mode>, |
| 22 | <&gpio11_default_mode>, |
| 23 | <&gpio12_default_mode>, |
| 24 | <&gpio13_default_mode>, |
| 25 | <&gpio16_default_mode>, |
| 26 | <&gpio24_default_mode>, |
| 27 | <&gpio25_default_mode>, |
| 28 | <&gpio36_default_mode>, |
| 29 | <&gpio37_default_mode>, |
| 30 | <&gpio38_default_mode>, |
| 31 | <&gpio39_default_mode>, |
| 32 | <&gpio42_default_mode>, |
| 33 | <&gpio26_default_mode>, |
Linus Walleij | fd385b3 | 2014-02-03 14:46:19 +0100 | [diff] [blame] | 34 | <&gpio35_default_mode>, |
Linus Walleij | e2377c8 | 2014-02-03 14:57:22 +0100 | [diff] [blame] | 35 | <&ycbcr_default_mode>, |
Linus Walleij | b2985cf | 2014-02-03 15:43:22 +0100 | [diff] [blame] | 36 | <&pwm_default_mode>, |
Linus Walleij | c7bb47a | 2014-02-03 22:43:45 +0100 | [diff] [blame] | 37 | <&adi1_default_mode>, |
Linus Walleij | 1f04159 | 2014-02-03 22:51:58 +0100 | [diff] [blame] | 38 | <&usbuicc_default_mode>, |
Linus Walleij | 81d7849 | 2014-02-03 22:56:27 +0100 | [diff] [blame] | 39 | <&dmic_default_mode>, |
Linus Walleij | d88ae11 | 2014-02-03 23:02:02 +0100 | [diff] [blame] | 40 | <&extcpena_default_mode>, |
| 41 | <&modsclsda_default_mode>; |
Linus Walleij | 8320062 | 2014-02-03 14:32:20 +0100 | [diff] [blame] | 42 | |
| 43 | /* |
| 44 | * Pins 2, 4, 10, 11, 12, 13, 16, 24, 25, 36, 37, 38, 39 and 42 |
| 45 | * are muxed in as GPIO, and configured as INPUT PULL DOWN |
| 46 | */ |
| 47 | gpio2 { |
| 48 | gpio2_default_mode: gpio2_default { |
| 49 | default_mux { |
| 50 | ste,function = "gpio"; |
| 51 | ste,pins = "gpio2_a_1"; |
| 52 | }; |
| 53 | default_cfg { |
| 54 | ste,pins = "GPIO2_T9"; |
| 55 | input-enable; |
| 56 | bias-pull-down; |
| 57 | }; |
| 58 | }; |
| 59 | }; |
| 60 | gpio4 { |
| 61 | gpio4_default_mode: gpio4_default { |
| 62 | default_mux { |
| 63 | ste,function = "gpio"; |
| 64 | ste,pins = "gpio4_a_1"; |
| 65 | }; |
| 66 | default_cfg { |
| 67 | ste,pins = "GPIO4_W2"; |
| 68 | input-enable; |
| 69 | bias-pull-down; |
| 70 | }; |
| 71 | }; |
| 72 | }; |
| 73 | gpio10 { |
| 74 | gpio10_default_mode: gpio10_default { |
| 75 | default_mux { |
| 76 | ste,function = "gpio"; |
| 77 | ste,pins = "gpio10_d_1"; |
| 78 | }; |
| 79 | default_cfg { |
| 80 | ste,pins = "GPIO10_U17"; |
| 81 | input-enable; |
| 82 | bias-pull-down; |
| 83 | }; |
| 84 | }; |
| 85 | }; |
| 86 | gpio11 { |
| 87 | gpio11_default_mode: gpio11_default { |
| 88 | default_mux { |
| 89 | ste,function = "gpio"; |
| 90 | ste,pins = "gpio11_d_1"; |
| 91 | }; |
| 92 | default_cfg { |
| 93 | ste,pins = "GPIO11_AA18"; |
| 94 | input-enable; |
| 95 | bias-pull-down; |
| 96 | }; |
| 97 | }; |
| 98 | }; |
| 99 | gpio12 { |
| 100 | gpio12_default_mode: gpio12_default { |
| 101 | default_mux { |
| 102 | ste,function = "gpio"; |
| 103 | ste,pins = "gpio12_d_1"; |
| 104 | }; |
| 105 | default_cfg { |
| 106 | ste,pins = "GPIO12_U16"; |
| 107 | input-enable; |
| 108 | bias-pull-down; |
| 109 | }; |
| 110 | }; |
| 111 | }; |
| 112 | gpio13 { |
| 113 | gpio13_default_mode: gpio13_default { |
| 114 | default_mux { |
| 115 | ste,function = "gpio"; |
| 116 | ste,pins = "gpio13_d_1"; |
| 117 | }; |
| 118 | default_cfg { |
| 119 | ste,pins = "GPIO13_W17"; |
| 120 | input-enable; |
| 121 | bias-pull-down; |
| 122 | }; |
| 123 | }; |
| 124 | }; |
| 125 | gpio16 { |
| 126 | gpio16_default_mode: gpio16_default { |
| 127 | default_mux { |
| 128 | ste,function = "gpio"; |
| 129 | ste,pins = "gpio16_a_1"; |
| 130 | }; |
| 131 | default_cfg { |
| 132 | ste,pins = "GPIO16_F15"; |
| 133 | input-enable; |
| 134 | bias-pull-down; |
| 135 | }; |
| 136 | }; |
| 137 | }; |
| 138 | gpio24 { |
| 139 | gpio24_default_mode: gpio24_default { |
| 140 | default_mux { |
| 141 | ste,function = "gpio"; |
| 142 | ste,pins = "gpio24_a_1"; |
| 143 | }; |
| 144 | default_cfg { |
| 145 | ste,pins = "GPIO24_T14"; |
| 146 | input-enable; |
| 147 | bias-pull-down; |
| 148 | }; |
| 149 | }; |
| 150 | }; |
| 151 | gpio25 { |
| 152 | gpio25_default_mode: gpio25_default { |
| 153 | default_mux { |
| 154 | ste,function = "gpio"; |
| 155 | ste,pins = "gpio25_a_1"; |
| 156 | }; |
| 157 | default_cfg { |
| 158 | ste,pins = "GPIO25_R16"; |
| 159 | input-enable; |
| 160 | bias-pull-down; |
| 161 | }; |
| 162 | }; |
| 163 | }; |
| 164 | gpio36 { |
| 165 | gpio36_default_mode: gpio36_default { |
| 166 | default_mux { |
| 167 | ste,function = "gpio"; |
| 168 | ste,pins = "gpio36_a_1"; |
| 169 | }; |
| 170 | default_cfg { |
| 171 | ste,pins = "GPIO36_A17"; |
| 172 | input-enable; |
| 173 | bias-pull-down; |
| 174 | }; |
| 175 | }; |
| 176 | }; |
| 177 | gpio37 { |
| 178 | gpio37_default_mode: gpio37_default { |
| 179 | default_mux { |
| 180 | ste,function = "gpio"; |
| 181 | ste,pins = "gpio37_a_1"; |
| 182 | }; |
| 183 | default_cfg { |
| 184 | ste,pins = "GPIO37_E15"; |
| 185 | input-enable; |
| 186 | bias-pull-down; |
| 187 | }; |
| 188 | }; |
| 189 | }; |
| 190 | gpio38 { |
| 191 | gpio38_default_mode: gpio38_default { |
| 192 | default_mux { |
| 193 | ste,function = "gpio"; |
| 194 | ste,pins = "gpio38_a_1"; |
| 195 | }; |
| 196 | default_cfg { |
| 197 | ste,pins = "GPIO38_C17"; |
| 198 | input-enable; |
| 199 | bias-pull-down; |
| 200 | }; |
| 201 | }; |
| 202 | }; |
| 203 | gpio39 { |
| 204 | gpio39_default_mode: gpio39_default { |
| 205 | default_mux { |
| 206 | ste,function = "gpio"; |
| 207 | ste,pins = "gpio39_a_1"; |
| 208 | }; |
| 209 | default_cfg { |
| 210 | ste,pins = "GPIO39_E16"; |
| 211 | input-enable; |
| 212 | bias-pull-down; |
| 213 | }; |
| 214 | }; |
| 215 | }; |
| 216 | gpio42 { |
| 217 | gpio42_default_mode: gpio42_default { |
| 218 | default_mux { |
| 219 | ste,function = "gpio"; |
| 220 | ste,pins = "gpio42_a_1"; |
| 221 | }; |
| 222 | default_cfg { |
| 223 | ste,pins = "GPIO42_U2"; |
| 224 | input-enable; |
| 225 | bias-pull-down; |
| 226 | }; |
| 227 | }; |
| 228 | }; |
| 229 | /* |
| 230 | * Pins 26 and 35 muxed in as GPIO, and configured as OUTPUT LOW |
| 231 | */ |
| 232 | gpio26 { |
| 233 | gpio26_default_mode: gpio26_default { |
| 234 | default_mux { |
| 235 | ste,function = "gpio"; |
| 236 | ste,pins = "gpio26_d_1"; |
| 237 | }; |
| 238 | default_cfg { |
| 239 | ste,pins = "GPIO26_M16"; |
| 240 | output-low; |
| 241 | }; |
| 242 | }; |
| 243 | }; |
| 244 | gpio35 { |
| 245 | gpio35_default_mode: gpio35_default { |
| 246 | default_mux { |
| 247 | ste,function = "gpio"; |
| 248 | ste,pins = "gpio35_d_1"; |
| 249 | }; |
| 250 | default_cfg { |
| 251 | ste,pins = "GPIO35_W15"; |
| 252 | output-low; |
| 253 | }; |
| 254 | }; |
| 255 | }; |
Linus Walleij | fd385b3 | 2014-02-03 14:46:19 +0100 | [diff] [blame] | 256 | /* |
| 257 | * This sets up the YCBCR connector pins, i.e. analog video out. |
| 258 | * Set as input with no bias. |
| 259 | */ |
| 260 | ycbcr { |
| 261 | ycbcr_default_mode: ycbcr_default { |
| 262 | default_mux { |
| 263 | ste,function = "ycbcr"; |
| 264 | ste,pins = "ycbcr0123_d_1"; |
| 265 | }; |
| 266 | default_cfg { |
| 267 | ste,pins = "GPIO6_Y18", |
| 268 | "GPIO7_AA20", |
| 269 | "GPIO8_W18", |
| 270 | "GPIO9_AA19"; |
| 271 | input-enable; |
| 272 | bias-disable; |
| 273 | }; |
| 274 | }; |
| 275 | }; |
Linus Walleij | e2377c8 | 2014-02-03 14:57:22 +0100 | [diff] [blame] | 276 | /* This sets up the PWM pins 14 and 15 */ |
| 277 | pwm { |
| 278 | pwm_default_mode: pwm_default { |
| 279 | default_mux { |
| 280 | ste,function = "pwmout"; |
| 281 | ste,pins = "pwmout1_d_1", "pwmout2_d_1"; |
| 282 | }; |
| 283 | default_cfg { |
| 284 | ste,pins = "GPIO14_F14", |
| 285 | "GPIO15_B17"; |
| 286 | input-enable; |
| 287 | bias-pull-down; |
| 288 | }; |
| 289 | }; |
| 290 | }; |
Linus Walleij | b2985cf | 2014-02-03 15:43:22 +0100 | [diff] [blame] | 291 | /* This sets up audio interface 1 */ |
| 292 | adi1 { |
| 293 | adi1_default_mode: adi1_default { |
| 294 | default_mux { |
| 295 | ste,function = "adi1"; |
| 296 | ste,pins = "adi1_d_1"; |
| 297 | }; |
| 298 | default_cfg { |
| 299 | ste,pins = "GPIO17_P5", |
| 300 | "GPIO18_R5", |
| 301 | "GPIO19_U5", |
| 302 | "GPIO20_T5"; |
| 303 | input-enable; |
| 304 | bias-pull-down; |
| 305 | }; |
| 306 | }; |
| 307 | }; |
Linus Walleij | c7bb47a | 2014-02-03 22:43:45 +0100 | [diff] [blame] | 308 | /* This sets up the USB UICC pins */ |
| 309 | usbuicc { |
| 310 | usbuicc_default_mode: usbuicc_default { |
| 311 | default_mux { |
| 312 | ste,function = "usbuicc"; |
| 313 | ste,pins = "usbuicc_d_1"; |
| 314 | }; |
| 315 | default_cfg { |
| 316 | ste,pins = "GPIO21_H19", |
| 317 | "GPIO22_G20", |
| 318 | "GPIO23_G19"; |
| 319 | input-enable; |
| 320 | bias-pull-down; |
| 321 | }; |
| 322 | }; |
| 323 | }; |
Linus Walleij | 1f04159 | 2014-02-03 22:51:58 +0100 | [diff] [blame] | 324 | /* This sets up the microphone pins */ |
| 325 | dmic { |
| 326 | dmic_default_mode: dmic_default { |
| 327 | default_mux { |
| 328 | ste,function = "dmic"; |
| 329 | ste,pins = "dmic12_d_1", |
| 330 | "dmic34_d_1", |
| 331 | "dmic56_d_1"; |
| 332 | }; |
| 333 | default_cfg { |
| 334 | ste,pins = "GPIO27_J6", |
| 335 | "GPIO28_K6", |
| 336 | "GPIO29_G6", |
| 337 | "GPIO30_H6", |
| 338 | "GPIO31_F5", |
| 339 | "GPIO32_G5"; |
| 340 | input-enable; |
| 341 | bias-pull-down; |
| 342 | }; |
| 343 | }; |
| 344 | }; |
Linus Walleij | 81d7849 | 2014-02-03 22:56:27 +0100 | [diff] [blame] | 345 | extcpena { |
| 346 | extcpena_default_mode: extcpena_default { |
| 347 | default_mux { |
| 348 | ste,function = "extcpena"; |
| 349 | ste,pins = "extcpena_d_1"; |
| 350 | }; |
| 351 | default_cfg { |
| 352 | ste,pins = "GPIO34_R17"; |
| 353 | input-enable; |
| 354 | bias-pull-down; |
| 355 | }; |
| 356 | }; |
| 357 | }; |
Linus Walleij | d88ae11 | 2014-02-03 23:02:02 +0100 | [diff] [blame] | 358 | /* Modem I2C setup (SCL and SDA pins) */ |
| 359 | modsclsda { |
| 360 | modsclsda_default_mode: modsclsda_default { |
| 361 | default_mux { |
| 362 | ste,function = "modsclsda"; |
| 363 | ste,pins = "modsclsda_d_1"; |
| 364 | }; |
| 365 | default_cfg { |
| 366 | ste,pins = "GPIO40_T19", |
| 367 | "GPIO41_U19"; |
| 368 | input-enable; |
| 369 | bias-pull-down; |
| 370 | }; |
| 371 | }; |
| 372 | }; |
Linus Walleij | 7acacfb | 2014-02-03 23:16:49 +0100 | [diff] [blame^] | 373 | /* |
| 374 | * Clock output pins associated with regulators. |
| 375 | */ |
| 376 | sysclkreq2 { |
| 377 | sysclkreq2_default_mode: sysclkreq2_default { |
| 378 | default_mux { |
| 379 | ste,function = "sysclkreq"; |
| 380 | ste,pins = "sysclkreq2_d_1"; |
| 381 | }; |
| 382 | default_cfg { |
| 383 | ste,pins = "GPIO1_T10"; |
| 384 | input-enable; |
| 385 | bias-disable; |
| 386 | }; |
| 387 | }; |
| 388 | sysclkreq2_sleep_mode: sysclkreq2_sleep { |
| 389 | default_mux { |
| 390 | ste,function = "gpio"; |
| 391 | ste,pins = "gpio1_a_1"; |
| 392 | }; |
| 393 | default_cfg { |
| 394 | ste,pins = "GPIO1_T10"; |
| 395 | input-enable; |
| 396 | bias-pull-down; |
| 397 | }; |
| 398 | }; |
| 399 | }; |
| 400 | sysclkreq4 { |
| 401 | sysclkreq4_default_mode: sysclkreq4_default { |
| 402 | default_mux { |
| 403 | ste,function = "sysclkreq"; |
| 404 | ste,pins = "sysclkreq4_d_1"; |
| 405 | }; |
| 406 | default_cfg { |
| 407 | ste,pins = "GPIO3_U9"; |
| 408 | input-enable; |
| 409 | bias-disable; |
| 410 | }; |
| 411 | }; |
| 412 | sysclkreq4_sleep_mode: sysclkreq4_sleep { |
| 413 | default_mux { |
| 414 | ste,function = "gpio"; |
| 415 | ste,pins = "gpio3_a_1"; |
| 416 | }; |
| 417 | default_cfg { |
| 418 | ste,pins = "GPIO3_U9"; |
| 419 | input-enable; |
| 420 | bias-pull-down; |
| 421 | }; |
| 422 | }; |
| 423 | }; |
Linus Walleij | 8320062 | 2014-02-03 14:32:20 +0100 | [diff] [blame] | 424 | }; |
| 425 | }; |
| 426 | }; |
| 427 | }; |
| 428 | }; |