Will Deacon | d4647f0 | 2020-09-15 23:30:17 +0100 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
| 2 | /* |
| 3 | * Interface for managing mitigations for Spectre vulnerabilities. |
| 4 | * |
| 5 | * Copyright (C) 2020 Google LLC |
| 6 | * Author: Will Deacon <will@kernel.org> |
| 7 | */ |
| 8 | |
| 9 | #ifndef __ASM_SPECTRE_H |
| 10 | #define __ASM_SPECTRE_H |
| 11 | |
Will Deacon | 6279017 | 2020-11-13 11:38:42 +0000 | [diff] [blame] | 12 | #define BP_HARDEN_EL2_SLOTS 4 |
Will Deacon | 4f6a36f | 2020-11-13 11:38:47 +0000 | [diff] [blame] | 13 | #define __BP_HARDEN_HYP_VECS_SZ ((BP_HARDEN_EL2_SLOTS - 1) * SZ_2K) |
Will Deacon | 6279017 | 2020-11-13 11:38:42 +0000 | [diff] [blame] | 14 | |
| 15 | #ifndef __ASSEMBLY__ |
| 16 | |
| 17 | #include <linux/percpu.h> |
| 18 | |
Will Deacon | d4647f0 | 2020-09-15 23:30:17 +0100 | [diff] [blame] | 19 | #include <asm/cpufeature.h> |
Will Deacon | 6279017 | 2020-11-13 11:38:42 +0000 | [diff] [blame] | 20 | #include <asm/virt.h> |
Will Deacon | d4647f0 | 2020-09-15 23:30:17 +0100 | [diff] [blame] | 21 | |
| 22 | /* Watch out, ordering is important here. */ |
| 23 | enum mitigation_state { |
| 24 | SPECTRE_UNAFFECTED, |
| 25 | SPECTRE_MITIGATED, |
| 26 | SPECTRE_VULNERABLE, |
| 27 | }; |
| 28 | |
| 29 | struct task_struct; |
| 30 | |
Will Deacon | b881cdc | 2020-11-13 11:38:44 +0000 | [diff] [blame] | 31 | /* |
| 32 | * Note: the order of this enum corresponds to __bp_harden_hyp_vecs and |
| 33 | * we rely on having the direct vectors first. |
| 34 | */ |
| 35 | enum arm64_hyp_spectre_vector { |
| 36 | /* |
| 37 | * Take exceptions directly to __kvm_hyp_vector. This must be |
| 38 | * 0 so that it used by default when mitigations are not needed. |
| 39 | */ |
| 40 | HYP_VECTOR_DIRECT, |
| 41 | |
| 42 | /* |
| 43 | * Bounce via a slot in the hypervisor text mapping of |
| 44 | * __bp_harden_hyp_vecs, which contains an SMC call. |
| 45 | */ |
| 46 | HYP_VECTOR_SPECTRE_DIRECT, |
| 47 | |
| 48 | /* |
| 49 | * Bounce via a slot in a special mapping of __bp_harden_hyp_vecs |
| 50 | * next to the idmap page. |
| 51 | */ |
| 52 | HYP_VECTOR_INDIRECT, |
| 53 | |
| 54 | /* |
| 55 | * Bounce via a slot in a special mapping of __bp_harden_hyp_vecs |
| 56 | * next to the idmap page, which contains an SMC call. |
| 57 | */ |
| 58 | HYP_VECTOR_SPECTRE_INDIRECT, |
| 59 | }; |
| 60 | |
Will Deacon | 6279017 | 2020-11-13 11:38:42 +0000 | [diff] [blame] | 61 | typedef void (*bp_hardening_cb_t)(void); |
| 62 | |
| 63 | struct bp_hardening_data { |
Will Deacon | b881cdc | 2020-11-13 11:38:44 +0000 | [diff] [blame] | 64 | enum arm64_hyp_spectre_vector slot; |
| 65 | bp_hardening_cb_t fn; |
Will Deacon | 6279017 | 2020-11-13 11:38:42 +0000 | [diff] [blame] | 66 | }; |
| 67 | |
| 68 | DECLARE_PER_CPU_READ_MOSTLY(struct bp_hardening_data, bp_hardening_data); |
| 69 | |
| 70 | static inline void arm64_apply_bp_hardening(void) |
| 71 | { |
| 72 | struct bp_hardening_data *d; |
| 73 | |
| 74 | if (!cpus_have_const_cap(ARM64_SPECTRE_V2)) |
| 75 | return; |
| 76 | |
| 77 | d = this_cpu_ptr(&bp_hardening_data); |
| 78 | if (d->fn) |
| 79 | d->fn(); |
| 80 | } |
| 81 | |
Will Deacon | d4647f0 | 2020-09-15 23:30:17 +0100 | [diff] [blame] | 82 | enum mitigation_state arm64_get_spectre_v2_state(void); |
| 83 | bool has_spectre_v2(const struct arm64_cpu_capabilities *cap, int scope); |
| 84 | void spectre_v2_enable_mitigation(const struct arm64_cpu_capabilities *__unused); |
| 85 | |
Will Deacon | cd1f56b | 2020-11-13 11:38:46 +0000 | [diff] [blame] | 86 | bool has_spectre_v3a(const struct arm64_cpu_capabilities *cap, int scope); |
Will Deacon | c4792b6 | 2020-11-13 11:38:45 +0000 | [diff] [blame] | 87 | void spectre_v3a_enable_mitigation(const struct arm64_cpu_capabilities *__unused); |
Will Deacon | b881cdc | 2020-11-13 11:38:44 +0000 | [diff] [blame] | 88 | |
Will Deacon | c287620 | 2020-09-18 11:54:33 +0100 | [diff] [blame] | 89 | enum mitigation_state arm64_get_spectre_v4_state(void); |
| 90 | bool has_spectre_v4(const struct arm64_cpu_capabilities *cap, int scope); |
| 91 | void spectre_v4_enable_mitigation(const struct arm64_cpu_capabilities *__unused); |
| 92 | void spectre_v4_enable_task_mitigation(struct task_struct *tsk); |
| 93 | |
Marc Zyngier | 7f43c201 | 2020-11-26 17:25:30 +0000 | [diff] [blame] | 94 | enum mitigation_state arm64_get_meltdown_state(void); |
| 95 | |
Will Deacon | 6279017 | 2020-11-13 11:38:42 +0000 | [diff] [blame] | 96 | #endif /* __ASSEMBLY__ */ |
Will Deacon | d4647f0 | 2020-09-15 23:30:17 +0100 | [diff] [blame] | 97 | #endif /* __ASM_SPECTRE_H */ |