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Paul Mackerrasf2783c12005-10-20 09:23:26 +10001/*
2 * Common time prototypes and such for all ppc machines.
3 *
4 * Written by Cort Dougan (cort@cs.nmt.edu) to merge
5 * Paul Mackerras' version and mine for PReP and Pmac.
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; either version
10 * 2 of the License, or (at your option) any later version.
11 */
12
13#ifndef __POWERPC_TIME_H
14#define __POWERPC_TIME_H
15
16#ifdef __KERNEL__
Paul Mackerrasf2783c12005-10-20 09:23:26 +100017#include <linux/types.h>
18#include <linux/percpu.h>
19
20#include <asm/processor.h>
Paul Mackerrasf2783c12005-10-20 09:23:26 +100021
22/* time.c */
23extern unsigned long tb_ticks_per_jiffy;
24extern unsigned long tb_ticks_per_usec;
25extern unsigned long tb_ticks_per_sec;
Bharat Bhushan6e359942012-04-18 06:01:19 +000026extern struct clock_event_device decrementer_clockevent;
Paul Mackerrasf2783c12005-10-20 09:23:26 +100027
28struct rtc_time;
29extern void to_tm(int tim, struct rtc_time * tm);
Srivatsa S. Bhat1b67bee2014-02-26 05:37:43 +053030extern void tick_broadcast_ipi_handler(void);
Paul Mackerrasf2783c12005-10-20 09:23:26 +100031
32extern void generic_calibrate_decr(void);
Paul Mackerrasf2783c12005-10-20 09:23:26 +100033
34/* Some sane defaults: 125 MHz timebase, 1GHz processor */
35extern unsigned long ppc_proc_freq;
36#define DEFAULT_PROC_FREQ (DEFAULT_TB_FREQ * 8)
37extern unsigned long ppc_tb_freq;
38#define DEFAULT_TB_FREQ 125000000UL
39
Paul Mackerrasf2783c12005-10-20 09:23:26 +100040struct div_result {
41 u64 result_high;
42 u64 result_low;
43};
44
45/* Accessor functions for the timebase (RTC on 601) registers. */
46/* If one day CONFIG_POWER is added just define __USE_RTC as 1 */
47#ifdef CONFIG_6xx
Paul Mackerras5d14a182005-10-20 22:33:06 +100048#define __USE_RTC() (!cpu_has_feature(CPU_FTR_USE_TB))
Paul Mackerrasf2783c12005-10-20 09:23:26 +100049#else
50#define __USE_RTC() 0
51#endif
52
Benjamin Herrenschmidt859deea2006-10-20 14:37:05 +100053#ifdef CONFIG_PPC64
54
55/* For compatibility, get_tbl() is defined as get_tb() on ppc64 */
56#define get_tbl get_tb
57
58#else
59
Paul Mackerrasf2783c12005-10-20 09:23:26 +100060static inline unsigned long get_tbl(void)
61{
Paul Mackerrasf2783c12005-10-20 09:23:26 +100062#if defined(CONFIG_403GCX)
Benjamin Herrenschmidt859deea2006-10-20 14:37:05 +100063 unsigned long tbl;
Paul Mackerrasf2783c12005-10-20 09:23:26 +100064 asm volatile("mfspr %0, 0x3dd" : "=r" (tbl));
Paul Mackerrasf2783c12005-10-20 09:23:26 +100065 return tbl;
Benjamin Herrenschmidt859deea2006-10-20 14:37:05 +100066#else
67 return mftbl();
68#endif
Paul Mackerrasf2783c12005-10-20 09:23:26 +100069}
70
71static inline unsigned int get_tbu(void)
72{
Benjamin Herrenschmidt859deea2006-10-20 14:37:05 +100073#ifdef CONFIG_403GCX
Paul Mackerrasf2783c12005-10-20 09:23:26 +100074 unsigned int tbu;
Paul Mackerrasf2783c12005-10-20 09:23:26 +100075 asm volatile("mfspr %0, 0x3dc" : "=r" (tbu));
Paul Mackerrasf2783c12005-10-20 09:23:26 +100076 return tbu;
Benjamin Herrenschmidt859deea2006-10-20 14:37:05 +100077#else
78 return mftbu();
79#endif
Paul Mackerrasf2783c12005-10-20 09:23:26 +100080}
Benjamin Herrenschmidt859deea2006-10-20 14:37:05 +100081#endif /* !CONFIG_PPC64 */
Paul Mackerrasf2783c12005-10-20 09:23:26 +100082
83static inline unsigned int get_rtcl(void)
84{
85 unsigned int rtcl;
86
87 asm volatile("mfrtcl %0" : "=r" (rtcl));
88 return rtcl;
89}
90
Paul Mackerras96c44502005-10-23 17:14:56 +100091static inline u64 get_rtc(void)
92{
93 unsigned int hi, lo, hi2;
94
95 do {
96 asm volatile("mfrtcu %0; mfrtcl %1; mfrtcu %2"
97 : "=r" (hi), "=r" (lo), "=r" (hi2));
98 } while (hi2 != hi);
99 return (u64)hi * 1000000000 + lo;
100}
101
Aneesh Kumar K.V8f42ab22014-06-05 17:38:02 +0530102static inline u64 get_vtb(void)
103{
104#ifdef CONFIG_PPC_BOOK3S_64
105 if (cpu_has_feature(CPU_FTR_ARCH_207S))
106 return mfvtb();
107#endif
108 return 0;
109}
110
Paul Mackerrasf2783c12005-10-20 09:23:26 +1000111#ifdef CONFIG_PPC64
112static inline u64 get_tb(void)
113{
114 return mftb();
115}
Benjamin Herrenschmidt859deea2006-10-20 14:37:05 +1000116#else /* CONFIG_PPC64 */
Paul Mackerrasf2783c12005-10-20 09:23:26 +1000117static inline u64 get_tb(void)
118{
119 unsigned int tbhi, tblo, tbhi2;
120
121 do {
122 tbhi = get_tbu();
123 tblo = get_tbl();
124 tbhi2 = get_tbu();
125 } while (tbhi != tbhi2);
126
127 return ((u64)tbhi << 32) | tblo;
128}
Benjamin Herrenschmidt859deea2006-10-20 14:37:05 +1000129#endif /* !CONFIG_PPC64 */
Paul Mackerrasf2783c12005-10-20 09:23:26 +1000130
Benjamin Herrenschmidtc27da3392007-09-19 14:21:56 +1000131static inline u64 get_tb_or_rtc(void)
132{
133 return __USE_RTC() ? get_rtc() : get_tb();
134}
135
Paul Mackerrasf2783c12005-10-20 09:23:26 +1000136static inline void set_tb(unsigned int upper, unsigned int lower)
137{
138 mtspr(SPRN_TBWL, 0);
139 mtspr(SPRN_TBWU, upper);
140 mtspr(SPRN_TBWL, lower);
141}
142
143/* Accessor functions for the decrementer register.
144 * The 4xx doesn't even have a decrementer. I tried to use the
145 * generic timer interrupt code, which seems OK, with the 4xx PIT
146 * in auto-reload mode. The problem is PIT stops counting when it
147 * hits zero. If it would wrap, we could use it just like a decrementer.
148 */
Oliver O'Halloran799010242016-07-01 16:20:39 +1000149static inline u64 get_dec(void)
Paul Mackerrasf2783c12005-10-20 09:23:26 +1000150{
151#if defined(CONFIG_40x)
152 return (mfspr(SPRN_PIT));
153#else
154 return (mfspr(SPRN_DEC));
155#endif
156}
157
Paul Mackerras43875cc2007-10-31 22:25:35 +1100158/*
159 * Note: Book E and 4xx processors differ from other PowerPC processors
160 * in when the decrementer generates its interrupt: on the 1 to 0
161 * transition for Book E/4xx, but on the 0 to -1 transition for others.
162 */
Oliver O'Halloran799010242016-07-01 16:20:39 +1000163static inline void set_dec(u64 val)
Paul Mackerrasf2783c12005-10-20 09:23:26 +1000164{
165#if defined(CONFIG_40x)
Oliver O'Halloran799010242016-07-01 16:20:39 +1000166 mtspr(SPRN_PIT, (u32) val);
Paul Mackerrasf2783c12005-10-20 09:23:26 +1000167#else
Paul Mackerras43875cc2007-10-31 22:25:35 +1100168#ifndef CONFIG_BOOKE
169 --val;
170#endif
Paul Mackerras43875cc2007-10-31 22:25:35 +1100171 mtspr(SPRN_DEC, val);
Christophe Leroy63e9e1c2016-02-09 17:08:16 +0100172#endif /* not 40x */
Paul Mackerrasf2783c12005-10-20 09:23:26 +1000173}
174
175static inline unsigned long tb_ticks_since(unsigned long tstamp)
176{
177 if (__USE_RTC()) {
178 int delta = get_rtcl() - (unsigned int) tstamp;
179 return delta < 0 ? delta + 1000000000 : delta;
180 }
181 return get_tbl() - tstamp;
182}
183
184#define mulhwu(x,y) \
185({unsigned z; asm ("mulhwu %0,%1,%2" : "=r" (z) : "r" (x), "r" (y)); z;})
186
187#ifdef CONFIG_PPC64
188#define mulhdu(x,y) \
189({unsigned long z; asm ("mulhdu %0,%1,%2" : "=r" (z) : "r" (x), "r" (y)); z;})
190#else
191extern u64 mulhdu(u64, u64);
192#endif
193
Paul Mackerrasa5b518e2005-10-22 14:55:23 +1000194extern void div128_by_32(u64 dividend_high, u64 dividend_low,
195 unsigned divisor, struct div_result *dr);
Paul Mackerrasf2783c12005-10-20 09:23:26 +1000196
197/* Used to store Processor Utilization register (purr) values */
198
199struct cpu_usage {
200 u64 current_tb; /* Holds the current purr register values */
201};
202
203DECLARE_PER_CPU(struct cpu_usage, cpu_usage_array);
204
Tony Breedsd831d0b2007-09-21 13:26:03 +1000205extern void secondary_cpu_time_init(void);
Tony Breeds71712b42007-06-22 16:54:30 +1000206
Anton Blanchard7df10272011-11-23 20:07:22 +0000207DECLARE_PER_CPU(u64, decrementers_next_tb);
Anton Blanchard37fb9a02011-11-23 20:07:17 +0000208
Paul Mackerrasb6c295d2015-03-28 14:21:02 +1100209/* Convert timebase ticks to nanoseconds */
210unsigned long long tb_to_ns(unsigned long long tb_ticks);
211
Paul Mackerrasf2783c12005-10-20 09:23:26 +1000212#endif /* __KERNEL__ */
Kim Phillips7a69af62006-09-26 17:46:37 -0500213#endif /* __POWERPC_TIME_H */