blob: b8c5f8934dbdf61792997b1cb6b03650a6dca6bf [file] [log] [blame]
Greg Kroah-Hartmanb2441312017-11-01 15:07:57 +01001# SPDX-License-Identifier: GPL-2.0
Dave Airliec0e09202008-05-29 10:09:59 +10002#
3# Makefile for the drm device driver. This driver provides support for the
4# Direct Rendering Infrastructure (DRI) in XFree86 4.1.0 and higher.
5
Chris Wilson39bf4de2017-10-24 19:15:47 +01006# Add a set of useful warning flags and enable -Werror for CI to prevent
7# trivial mistakes from creeping in. We have to do this piecemeal as we reject
8# any patch that isn't warning clean, so turning on -Wall -Wextra (or W=1) we
9# need to filter out dubious warnings. Still it is our interest
10# to keep running locally with W=1 C=1 until we are completely clean.
11#
12# Note the danger in using -Wall -Wextra is that when CI updates gcc we
13# will most likely get a sudden build breakage... Hopefully we will fix
14# new warnings before CI updates!
Kees Cook0bb95f82018-06-25 15:59:34 -070015subdir-ccflags-y := -Wall -Wextra
Chris Wilson4ab09d02017-10-30 17:29:27 +000016subdir-ccflags-y += $(call cc-disable-warning, unused-parameter)
17subdir-ccflags-y += $(call cc-disable-warning, type-limits)
18subdir-ccflags-y += $(call cc-disable-warning, missing-field-initializers)
Chris Wilson6a05d292018-02-08 16:16:39 +000019subdir-ccflags-y += $(call cc-disable-warning, unused-but-set-variable)
Matthias Kaehlcke46e20682018-05-01 11:24:40 -070020# clang warnings
21subdir-ccflags-y += $(call cc-disable-warning, sign-compare)
22subdir-ccflags-y += $(call cc-disable-warning, sometimes-uninitialized)
23subdir-ccflags-y += $(call cc-disable-warning, initializer-overrides)
Nathan Chancellorc5627462019-01-26 00:11:23 -070024subdir-ccflags-y += $(call cc-disable-warning, uninitialized)
Chris Wilson39bf4de2017-10-24 19:15:47 +010025subdir-ccflags-$(CONFIG_DRM_I915_WERROR) += -Werror
26
27# Fine grained warnings disable
Chris Wilson4ab09d02017-10-30 17:29:27 +000028CFLAGS_i915_pci.o = $(call cc-disable-warning, override-init)
Masahiro Yamada54b8ae62019-08-30 13:34:01 +090029CFLAGS_display/intel_fbdev.o = $(call cc-disable-warning, override-init)
Chris Wilson39bf4de2017-10-24 19:15:47 +010030
Chris Wilson0b1de5d2016-08-12 12:39:59 +010031subdir-ccflags-y += \
32 $(call as-instr,movntdqa (%eax)$(comma)%xmm0,-DCONFIG_AS_MOVNTDQA)
Chris Wilson0a793ad2016-04-13 17:35:00 +010033
Jani Nikula9ef424e2019-06-26 17:36:17 +030034subdir-ccflags-y += -I$(srctree)/$(src)
Chris Wilson112ed2d2019-04-24 18:48:39 +010035
Daniel Vetter2fae6a82014-03-07 09:17:21 +010036# Please keep these build lists sorted!
37
38# core driver code
Jani Nikulac2400ec2019-04-03 16:52:36 +030039i915-y += i915_drv.o \
Daniel Vetter042794b2015-07-24 13:55:10 +020040 i915_irq.o \
Chris Wilson26f00512019-08-07 15:20:41 +010041 i915_getparam.o \
Daniel Vetter2fae6a82014-03-07 09:17:21 +010042 i915_params.o \
Chris Wilson42f55512016-06-24 14:00:26 +010043 i915_pci.o \
Chris Wilson37d63f82019-05-28 10:29:50 +010044 i915_scatterlist.o \
Pedro Tammela79960222018-12-05 09:06:08 -020045 i915_suspend.o \
Jani Nikula63bf8302019-10-04 15:20:18 +030046 i915_switcheroo.o \
Daniel Vetter2fae6a82014-03-07 09:17:21 +010047 i915_sysfs.o \
Jani Nikula358c8552019-08-08 16:42:43 +030048 i915_utils.o \
Daniel Vetter042794b2015-07-24 13:55:10 +020049 intel_csr.o \
Chris Wilson94b4f3b2016-07-05 10:40:20 +010050 intel_device_info.o \
Matthew Auld232a6eb2019-10-08 17:01:14 +010051 intel_memory_region.o \
Jani Nikula707d26d2019-08-07 15:04:15 +030052 intel_pch.o \
Daniel Vetter9c065a72014-09-30 10:56:38 +020053 intel_pm.o \
Oscar Mateo7d3c4252018-04-10 09:12:46 -070054 intel_runtime_pm.o \
Jani Nikuladf0566a2019-06-13 11:44:16 +030055 intel_sideband.o \
56 intel_uncore.o \
57 intel_wakeref.o
Chris Wilson112ed2d2019-04-24 18:48:39 +010058
59# core library code
60i915-y += \
61 i915_memcpy.o \
62 i915_mm.o \
63 i915_sw_fence.o \
Chris Wilson8e458fe2019-08-21 20:16:06 +010064 i915_sw_fence_work.o \
Chris Wilson112ed2d2019-04-24 18:48:39 +010065 i915_syncmap.o \
66 i915_user_extensions.o
Daniel Vetter9c065a72014-09-30 10:56:38 +020067
Daniel Vetter2fae6a82014-03-07 09:17:21 +010068i915-$(CONFIG_COMPAT) += i915_ioc32.o
Jani Nikuladf0566a2019-06-13 11:44:16 +030069i915-$(CONFIG_DEBUG_FS) += i915_debugfs.o display/intel_pipe_crc.o
Tvrtko Ursulinb46a33e2017-11-21 18:18:45 +000070i915-$(CONFIG_PERF_EVENTS) += i915_pmu.o
Daniel Vetter2fae6a82014-03-07 09:17:21 +010071
Chris Wilson112ed2d2019-04-24 18:48:39 +010072# "Graphics Technology" (aka we talk to the gpu)
Chris Wilson112ed2d2019-04-24 18:48:39 +010073gt-y += \
Andi Shyti9dd4b062019-12-22 14:40:46 +000074 gt/debugfs_engines.o \
75 gt/debugfs_gt.o \
76 gt/debugfs_gt_pm.o \
Matthew Auld2c86e552020-01-07 13:40:09 +000077 gt/gen6_ppgtt.o \
78 gt/gen8_ppgtt.o \
Chris Wilson112ed2d2019-04-24 18:48:39 +010079 gt/intel_breadcrumbs.o \
80 gt/intel_context.o \
81 gt/intel_engine_cs.o \
Chris Wilsonb5e8e952019-10-21 18:43:39 +010082 gt/intel_engine_heartbeat.o \
Chris Wilson79ffac852019-04-24 21:07:17 +010083 gt/intel_engine_pm.o \
Chris Wilsonb5e8e952019-10-21 18:43:39 +010084 gt/intel_engine_pool.o \
Chris Wilson750e76b2019-08-06 13:43:00 +010085 gt/intel_engine_user.o \
Matthew Auld2c86e552020-01-07 13:40:09 +000086 gt/intel_ggtt.o \
Tvrtko Ursulin24635c52019-06-21 08:07:41 +010087 gt/intel_gt.o \
Andi Shyticf1c97d2019-08-11 22:06:33 +010088 gt/intel_gt_irq.o \
Chris Wilson79ffac852019-04-24 21:07:17 +010089 gt/intel_gt_pm.o \
Andi Shytid7620432019-08-11 15:28:00 +010090 gt/intel_gt_pm_irq.o \
Chris Wilson66101972019-10-04 14:40:06 +010091 gt/intel_gt_requests.o \
Matthew Auld2c86e552020-01-07 13:40:09 +000092 gt/intel_gtt.o \
Andi Shyti0dc3c562019-10-20 19:41:39 +010093 gt/intel_llc.o \
Chris Wilson112ed2d2019-04-24 18:48:39 +010094 gt/intel_lrc.o \
Chris Wilson2871ea82019-10-24 11:03:44 +010095 gt/intel_mocs.o \
Matthew Auld2c86e552020-01-07 13:40:09 +000096 gt/intel_ppgtt.o \
Andi Shytic1132362019-09-27 12:08:49 +010097 gt/intel_rc6.o \
Chris Wilson20060582019-07-04 10:19:25 +010098 gt/intel_renderstate.o \
Chris Wilson112ed2d2019-04-24 18:48:39 +010099 gt/intel_reset.o \
Chris Wilson2871ea82019-10-24 11:03:44 +0100100 gt/intel_ring.o \
101 gt/intel_ring_submission.o \
Andi Shyti3e7abf82019-10-24 22:16:41 +0100102 gt/intel_rps.o \
Chris Wilson112ed2d2019-04-24 18:48:39 +0100103 gt/intel_sseu.o \
Tvrtko Ursulinf0c02c12019-06-21 08:08:10 +0100104 gt/intel_timeline.o \
Chris Wilson112ed2d2019-04-24 18:48:39 +0100105 gt/intel_workarounds.o
Chris Wilson20060582019-07-04 10:19:25 +0100106# autogenerated null render state
107gt-y += \
108 gt/gen6_renderstate.o \
109 gt/gen7_renderstate.o \
110 gt/gen8_renderstate.o \
111 gt/gen9_renderstate.o
Chris Wilson112ed2d2019-04-24 18:48:39 +0100112i915-y += $(gt-y)
113
114# GEM (Graphics Execution Management) code
Chris Wilson98932142019-05-28 10:29:44 +0100115gem-y += \
Chris Wilson3f43c872019-05-28 10:29:53 +0100116 gem/i915_gem_busy.o \
Chris Wilson10be98a2019-05-28 10:29:49 +0100117 gem/i915_gem_clflush.o \
Matthew Auld6501aa42019-05-29 13:31:08 +0100118 gem/i915_gem_client_blt.o \
Chris Wilson10be98a2019-05-28 10:29:49 +0100119 gem/i915_gem_context.o \
120 gem/i915_gem_dmabuf.o \
Chris Wilsonf0e4a062019-05-28 10:29:48 +0100121 gem/i915_gem_domain.o \
Chris Wilson10be98a2019-05-28 10:29:49 +0100122 gem/i915_gem_execbuffer.o \
Chris Wilson6951e582019-05-28 10:29:51 +0100123 gem/i915_gem_fence.o \
Chris Wilson10be98a2019-05-28 10:29:49 +0100124 gem/i915_gem_internal.o \
Chris Wilson84753552019-05-28 10:29:45 +0100125 gem/i915_gem_object.o \
Matthew Auld6501aa42019-05-29 13:31:08 +0100126 gem/i915_gem_object_blt.o \
Matthew Auldb908be52019-10-25 16:37:22 +0100127 gem/i915_gem_lmem.o \
Chris Wilsonb414fcd2019-05-28 10:29:47 +0100128 gem/i915_gem_mman.o \
Chris Wilsonf0334282019-05-28 10:29:46 +0100129 gem/i915_gem_pages.o \
130 gem/i915_gem_phys.o \
Chris Wilson10be98a2019-05-28 10:29:49 +0100131 gem/i915_gem_pm.o \
Matthew Auld232a6eb2019-10-08 17:01:14 +0100132 gem/i915_gem_region.o \
Chris Wilson10be98a2019-05-28 10:29:49 +0100133 gem/i915_gem_shmem.o \
134 gem/i915_gem_shrinker.o \
135 gem/i915_gem_stolen.o \
Chris Wilson446e2d12019-05-28 10:29:54 +0100136 gem/i915_gem_throttle.o \
Chris Wilson10be98a2019-05-28 10:29:49 +0100137 gem/i915_gem_tiling.o \
138 gem/i915_gem_userptr.o \
Chris Wilsond45a1a52019-05-28 10:29:52 +0100139 gem/i915_gem_wait.o \
Chris Wilson10be98a2019-05-28 10:29:49 +0100140 gem/i915_gemfs.o
Chris Wilson64d6c502019-02-05 13:00:02 +0000141i915-y += \
Chris Wilson98932142019-05-28 10:29:44 +0100142 $(gem-y) \
Chris Wilson64d6c502019-02-05 13:00:02 +0000143 i915_active.o \
Matthew Auld14d1b9a2019-08-09 21:29:24 +0100144 i915_buddy.o \
Chris Wilson64d6c502019-02-05 13:00:02 +0000145 i915_cmd_parser.o \
Chris Wilsonb47eb4a2010-08-07 11:01:23 +0100146 i915_gem_evict.o \
Joonas Lahtinenb42fe9c2016-11-11 12:43:54 +0200147 i915_gem_fence_reg.o \
Chris Wilson54cf91d2010-11-25 18:00:26 +0000148 i915_gem_gtt.o \
Daniel Vetter2fae6a82014-03-07 09:17:21 +0100149 i915_gem.o \
Chris Wilson32eb6bc2019-02-28 10:20:33 +0000150 i915_globals.o \
Lionel Landwerlina446ae22018-03-06 12:28:56 +0000151 i915_query.o \
Chris Wilsone61e0f52018-02-21 09:56:36 +0000152 i915_request.o \
Chris Wilsone2f34962018-10-01 15:47:54 +0100153 i915_scheduler.o \
Chris Wilson1c5d22f2009-08-25 11:15:50 +0100154 i915_trace_points.o \
Joonas Lahtinenb42fe9c2016-11-11 12:43:54 +0200155 i915_vma.o \
Matthew Auldb908be52019-10-25 16:37:22 +0100156 intel_region_lmem.o \
Jackie Li6b0478f2018-03-13 17:32:50 -0700157 intel_wopcm.o
Daniel Vetter2fae6a82014-03-07 09:17:21 +0100158
Alex Dai33a732f2015-08-12 15:43:36 +0100159# general-purpose microcontroller (GuC) support
Daniele Ceraolo Spurio0f261b22019-07-13 11:00:11 +0100160i915-y += gt/uc/intel_uc.o \
161 gt/uc/intel_uc_fw.o \
162 gt/uc/intel_guc.o \
163 gt/uc/intel_guc_ads.o \
164 gt/uc/intel_guc_ct.o \
165 gt/uc/intel_guc_fw.o \
166 gt/uc/intel_guc_log.o \
167 gt/uc/intel_guc_submission.o \
168 gt/uc/intel_huc.o \
169 gt/uc/intel_huc_fw.o
Alex Dai33a732f2015-08-12 15:43:36 +0100170
Daniel Vetter2fae6a82014-03-07 09:17:21 +0100171# modesetting core code
Jani Nikuladf0566a2019-06-13 11:44:16 +0300172i915-y += \
173 display/intel_atomic.o \
174 display/intel_atomic_plane.o \
175 display/intel_audio.o \
176 display/intel_bios.o \
177 display/intel_bw.o \
178 display/intel_cdclk.o \
179 display/intel_color.o \
180 display/intel_combo_phy.o \
181 display/intel_connector.o \
182 display/intel_display.o \
183 display/intel_display_power.o \
184 display/intel_dpio_phy.o \
185 display/intel_dpll_mgr.o \
Animesh Manna67f3b582019-09-20 17:29:22 +0530186 display/intel_dsb.o \
Jani Nikuladf0566a2019-06-13 11:44:16 +0300187 display/intel_fbc.o \
188 display/intel_fifo_underrun.o \
189 display/intel_frontbuffer.o \
190 display/intel_hdcp.o \
191 display/intel_hotplug.o \
192 display/intel_lpe_audio.o \
193 display/intel_overlay.o \
194 display/intel_psr.o \
195 display/intel_quirks.o \
Imre Deakbc853282019-06-28 17:36:15 +0300196 display/intel_sprite.o \
Jani Nikula4fb87832019-10-01 18:25:06 +0300197 display/intel_tc.o \
198 display/intel_vga.o
Jani Nikuladf0566a2019-06-13 11:44:16 +0300199i915-$(CONFIG_ACPI) += \
200 display/intel_acpi.o \
201 display/intel_opregion.o
202i915-$(CONFIG_DRM_FBDEV_EMULATION) += \
203 display/intel_fbdev.o
Daniel Vetter2fae6a82014-03-07 09:17:21 +0100204
205# modesetting output/encoder code
Jani Nikula379bc102019-06-13 11:44:15 +0300206i915-y += \
207 display/dvo_ch7017.o \
208 display/dvo_ch7xxx.o \
209 display/dvo_ivch.o \
210 display/dvo_ns2501.o \
211 display/dvo_sil164.o \
212 display/dvo_tfp410.o \
213 display/icl_dsi.o \
214 display/intel_crt.o \
215 display/intel_ddi.o \
216 display/intel_dp.o \
217 display/intel_dp_aux_backlight.o \
218 display/intel_dp_link_training.o \
219 display/intel_dp_mst.o \
220 display/intel_dsi.o \
221 display/intel_dsi_dcs_backlight.o \
222 display/intel_dsi_vbt.o \
223 display/intel_dvo.o \
224 display/intel_gmbus.o \
225 display/intel_hdmi.o \
226 display/intel_lspcon.o \
227 display/intel_lvds.o \
228 display/intel_panel.o \
229 display/intel_sdvo.o \
230 display/intel_tv.o \
231 display/intel_vdsc.o \
232 display/vlv_dsi.o \
233 display/vlv_dsi_pll.o
Dave Airliec0e09202008-05-29 10:09:59 +1000234
Michal Wajdeczko5ed7a0c2019-06-26 12:38:26 +0000235# perf code
Michal Wajdeczko5ed7a0c2019-06-26 12:38:26 +0000236i915-y += \
237 oa/i915_oa_hsw.o \
238 oa/i915_oa_bdw.o \
239 oa/i915_oa_chv.o \
240 oa/i915_oa_sklgt2.o \
241 oa/i915_oa_sklgt3.o \
242 oa/i915_oa_sklgt4.o \
243 oa/i915_oa_bxt.o \
244 oa/i915_oa_kblgt2.o \
245 oa/i915_oa_kblgt3.o \
246 oa/i915_oa_glk.o \
247 oa/i915_oa_cflgt2.o \
248 oa/i915_oa_cflgt3.o \
249 oa/i915_oa_cnl.o \
Lionel Landwerlin00a7f0d2019-10-25 12:37:46 -0700250 oa/i915_oa_icl.o \
251 oa/i915_oa_tgl.o
Michal Wajdeczko5ed7a0c2019-06-26 12:38:26 +0000252i915-y += i915_perf.o
253
Chris Wilson98a2f412016-10-12 10:05:18 +0100254# Post-mortem debug and GPU hang state capture
255i915-$(CONFIG_DRM_I915_CAPTURE_ERROR) += i915_gpu_error.o
Chris Wilson953c7f82017-02-13 17:15:12 +0000256i915-$(CONFIG_DRM_I915_SELFTEST) += \
Chris Wilson10be98a2019-05-28 10:29:49 +0100257 gem/selftests/igt_gem_utils.o \
Chris Wilson953c7f82017-02-13 17:15:12 +0000258 selftests/i915_random.o \
Chris Wilson98dc0452018-05-05 10:10:13 +0100259 selftests/i915_selftest.o \
Chris Wilsonf3bc6322020-01-03 10:45:15 +0000260 selftests/igt_atomic.o \
Tvrtko Ursulin8d2f6e22018-11-30 08:02:53 +0000261 selftests/igt_flush_test.o \
Chris Wilsone4a8c812019-01-21 22:20:47 +0000262 selftests/igt_live_test.o \
Chris Wilson6fedafa2019-11-07 18:06:00 +0000263 selftests/igt_mmap.o \
Tvrtko Ursulin28d6ccc2018-12-03 12:50:11 +0000264 selftests/igt_reset.o \
Tvrtko Ursulin8d2f6e22018-11-30 08:02:53 +0000265 selftests/igt_spinner.o
Chris Wilson98a2f412016-10-12 10:05:18 +0100266
Yu Zhangcf9d2892015-02-10 19:05:47 +0800267# virtual gpu code
268i915-y += i915_vgpu.o
269
Zhi Wang0ad35fe2016-06-16 08:07:00 -0400270ifeq ($(CONFIG_DRM_I915_GVT),y)
271i915-y += intel_gvt.o
272include $(src)/gvt/Makefile
273endif
274
Chris Wilsonc58305a2016-08-19 16:54:28 +0100275obj-$(CONFIG_DRM_I915) += i915.o
Zhenyu Wang9bdb0732018-12-07 16:16:53 +0800276obj-$(CONFIG_DRM_I915_GVT_KVMGT) += gvt/kvmgt.o
Masahiro Yamadac6d4a092019-12-19 17:56:52 +0200277
278# header test
279
280# exclude some broken headers from the test coverage
281no-header-test := \
282 display/intel_vbt_defs.h \
Masahiro Yamadac6d4a092019-12-19 17:56:52 +0200283 gvt/execlist.h \
284 gvt/fb_decoder.h \
285 gvt/gtt.h \
286 gvt/gvt.h \
287 gvt/interrupt.h \
288 gvt/mmio_context.h \
289 gvt/mpt.h \
Chris Wilsonb2fcaac2020-01-03 10:45:16 +0000290 gvt/scheduler.h
Masahiro Yamadac6d4a092019-12-19 17:56:52 +0200291
292extra-$(CONFIG_DRM_I915_WERROR) += \
293 $(patsubst %.h,%.hdrtest, $(filter-out $(no-header-test), \
294 $(shell cd $(srctree)/$(src) && find * -name '*.h')))
295
296quiet_cmd_hdrtest = HDRTEST $(patsubst %.hdrtest,%.h,$@)
297 cmd_hdrtest = $(CC) $(c_flags) -S -o /dev/null -x c /dev/null -include $<; touch $@
298
299$(obj)/%.hdrtest: $(src)/%.h FORCE
300 $(call if_changed_dep,hdrtest)