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Luciano Coelhof5fc0f82009-08-06 16:25:28 +03001/*
2 * This file is part of wl1271
3 *
4 * Copyright (C) 1998-2009 Texas Instruments. All rights reserved.
5 * Copyright (C) 2008-2009 Nokia Corporation
6 *
7 * Contact: Luciano Coelho <luciano.coelho@nokia.com>
8 *
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License
11 * version 2 as published by the Free Software Foundation.
12 *
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
16 * General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
21 * 02110-1301 USA
22 *
23 */
24
25#ifndef __WL1271_H__
26#define __WL1271_H__
27
28#include <linux/mutex.h>
29#include <linux/completion.h>
30#include <linux/spinlock.h>
31#include <linux/list.h>
32#include <linux/bitops.h>
33#include <net/mac80211.h>
34
Juuso Oikarinen2b60100b2009-10-13 12:47:39 +030035#include "wl1271_conf.h"
Juuso Oikarineneb70eb72010-05-14 10:46:22 +030036#include "wl1271_ini.h"
Juuso Oikarinen2b60100b2009-10-13 12:47:39 +030037
Luciano Coelhof5fc0f82009-08-06 16:25:28 +030038#define DRIVER_NAME "wl1271"
39#define DRIVER_PREFIX DRIVER_NAME ": "
40
41enum {
42 DEBUG_NONE = 0,
43 DEBUG_IRQ = BIT(0),
44 DEBUG_SPI = BIT(1),
45 DEBUG_BOOT = BIT(2),
46 DEBUG_MAILBOX = BIT(3),
Kalle Valoc8c90872010-02-18 13:25:53 +020047 DEBUG_TESTMODE = BIT(4),
Luciano Coelhof5fc0f82009-08-06 16:25:28 +030048 DEBUG_EVENT = BIT(5),
49 DEBUG_TX = BIT(6),
50 DEBUG_RX = BIT(7),
51 DEBUG_SCAN = BIT(8),
52 DEBUG_CRYPT = BIT(9),
53 DEBUG_PSM = BIT(10),
54 DEBUG_MAC80211 = BIT(11),
55 DEBUG_CMD = BIT(12),
56 DEBUG_ACX = BIT(13),
Teemu Paasikivia3b8ea72010-03-18 12:26:41 +020057 DEBUG_SDIO = BIT(14),
Juuso Oikarinen14b228a2010-03-18 12:26:43 +020058 DEBUG_FILTERS = BIT(15),
Juuso Oikarinen5da11dc2010-03-26 12:53:24 +020059 DEBUG_ADHOC = BIT(16),
Luciano Coelhof5fc0f82009-08-06 16:25:28 +030060 DEBUG_ALL = ~0,
61};
62
63#define DEBUG_LEVEL (DEBUG_NONE)
64
65#define DEBUG_DUMP_LIMIT 1024
66
67#define wl1271_error(fmt, arg...) \
68 printk(KERN_ERR DRIVER_PREFIX "ERROR " fmt "\n", ##arg)
69
70#define wl1271_warning(fmt, arg...) \
71 printk(KERN_WARNING DRIVER_PREFIX "WARNING " fmt "\n", ##arg)
72
73#define wl1271_notice(fmt, arg...) \
74 printk(KERN_INFO DRIVER_PREFIX fmt "\n", ##arg)
75
76#define wl1271_info(fmt, arg...) \
77 printk(KERN_DEBUG DRIVER_PREFIX fmt "\n", ##arg)
78
79#define wl1271_debug(level, fmt, arg...) \
80 do { \
81 if (level & DEBUG_LEVEL) \
82 printk(KERN_DEBUG DRIVER_PREFIX fmt "\n", ##arg); \
83 } while (0)
84
85#define wl1271_dump(level, prefix, buf, len) \
86 do { \
87 if (level & DEBUG_LEVEL) \
88 print_hex_dump(KERN_DEBUG, DRIVER_PREFIX prefix, \
89 DUMP_PREFIX_OFFSET, 16, 1, \
90 buf, \
91 min_t(size_t, len, DEBUG_DUMP_LIMIT), \
92 0); \
93 } while (0)
94
95#define wl1271_dump_ascii(level, prefix, buf, len) \
96 do { \
97 if (level & DEBUG_LEVEL) \
98 print_hex_dump(KERN_DEBUG, DRIVER_PREFIX prefix, \
99 DUMP_PREFIX_OFFSET, 16, 1, \
100 buf, \
101 min_t(size_t, len, DEBUG_DUMP_LIMIT), \
102 true); \
103 } while (0)
104
105#define WL1271_DEFAULT_RX_CONFIG (CFG_UNI_FILTER_EN | \
Juuso Oikarinenc87dec92009-10-08 21:56:31 +0300106 CFG_BSSID_FILTER_EN | \
107 CFG_MC_FILTER_EN)
Luciano Coelhof5fc0f82009-08-06 16:25:28 +0300108
109#define WL1271_DEFAULT_RX_FILTER (CFG_RX_RCTS_ACK | CFG_RX_PRSP_EN | \
110 CFG_RX_MGMT_EN | CFG_RX_DATA_EN | \
111 CFG_RX_CTL_EN | CFG_RX_BCN_EN | \
112 CFG_RX_AUTH_EN | CFG_RX_ASSOC_EN)
113
114#define WL1271_FW_NAME "wl1271-fw.bin"
115#define WL1271_NVS_NAME "wl1271-nvs.bin"
Juuso Oikarinen152ee6e2010-02-18 13:25:42 +0200116
Juuso Oikarinen04e36fc2010-02-22 08:38:40 +0200117#define WL1271_TX_SECURITY_LO16(s) ((u16)((s) & 0xffff))
118#define WL1271_TX_SECURITY_HI32(s) ((u32)(((s) >> 16) & 0xffffffff))
119
Juuso Oikarinen259da432010-03-26 12:53:18 +0200120#define WL1271_BUSY_WORD_CNT 1
Juuso Oikarinen545f1da2009-10-08 21:56:23 +0300121#define WL1271_BUSY_WORD_LEN (WL1271_BUSY_WORD_CNT * sizeof(u32))
Luciano Coelhof5fc0f82009-08-06 16:25:28 +0300122
123#define WL1271_ELP_HW_STATE_ASLEEP 0
124#define WL1271_ELP_HW_STATE_IRQ 1
125
Juuso Oikarinend94cd292009-10-08 21:56:25 +0300126#define WL1271_DEFAULT_BEACON_INT 100
127#define WL1271_DEFAULT_DTIM_PERIOD 1
128
Juuso Oikarinenc87dec92009-10-08 21:56:31 +0300129#define ACX_TX_DESCRIPTORS 32
Juuso Oikarinenbe7078c2009-10-08 21:56:26 +0300130
Luciano Coelhof5fc0f82009-08-06 16:25:28 +0300131enum wl1271_state {
132 WL1271_STATE_OFF,
133 WL1271_STATE_ON,
134 WL1271_STATE_PLT,
135};
136
137enum wl1271_partition_type {
138 PART_DOWN,
139 PART_WORK,
140 PART_DRPW,
141
142 PART_TABLE_LEN
143};
144
145struct wl1271_partition {
146 u32 size;
147 u32 start;
148};
149
150struct wl1271_partition_set {
151 struct wl1271_partition mem;
152 struct wl1271_partition reg;
Juuso Oikarinen451de972009-10-12 15:08:46 +0300153 struct wl1271_partition mem2;
154 struct wl1271_partition mem3;
Luciano Coelhof5fc0f82009-08-06 16:25:28 +0300155};
156
157struct wl1271;
158
159/* FIXME: I'm not sure about this structure name */
160struct wl1271_chip {
161 u32 id;
162 char fw_ver[21];
163};
164
165struct wl1271_stats {
166 struct acx_statistics *fw_stats;
167 unsigned long fw_stats_update;
168
169 unsigned int retry_count;
170 unsigned int excessive_retries;
171};
172
173struct wl1271_debugfs {
174 struct dentry *rootdir;
175 struct dentry *fw_statistics;
176
177 struct dentry *tx_internal_desc_overflow;
178
179 struct dentry *rx_out_of_mem;
180 struct dentry *rx_hdr_overflow;
181 struct dentry *rx_hw_stuck;
182 struct dentry *rx_dropped;
183 struct dentry *rx_fcs_err;
184 struct dentry *rx_xfr_hint_trig;
185 struct dentry *rx_path_reset;
186 struct dentry *rx_reset_counter;
187
188 struct dentry *dma_rx_requested;
189 struct dentry *dma_rx_errors;
190 struct dentry *dma_tx_requested;
191 struct dentry *dma_tx_errors;
192
193 struct dentry *isr_cmd_cmplt;
194 struct dentry *isr_fiqs;
195 struct dentry *isr_rx_headers;
196 struct dentry *isr_rx_mem_overflow;
197 struct dentry *isr_rx_rdys;
198 struct dentry *isr_irqs;
199 struct dentry *isr_tx_procs;
200 struct dentry *isr_decrypt_done;
201 struct dentry *isr_dma0_done;
202 struct dentry *isr_dma1_done;
203 struct dentry *isr_tx_exch_complete;
204 struct dentry *isr_commands;
205 struct dentry *isr_rx_procs;
206 struct dentry *isr_hw_pm_mode_changes;
207 struct dentry *isr_host_acknowledges;
208 struct dentry *isr_pci_pm;
209 struct dentry *isr_wakeups;
210 struct dentry *isr_low_rssi;
211
212 struct dentry *wep_addr_key_count;
213 struct dentry *wep_default_key_count;
214 /* skipping wep.reserved */
215 struct dentry *wep_key_not_found;
216 struct dentry *wep_decrypt_fail;
217 struct dentry *wep_packets;
218 struct dentry *wep_interrupt;
219
220 struct dentry *pwr_ps_enter;
221 struct dentry *pwr_elp_enter;
222 struct dentry *pwr_missing_bcns;
223 struct dentry *pwr_wake_on_host;
224 struct dentry *pwr_wake_on_timer_exp;
225 struct dentry *pwr_tx_with_ps;
226 struct dentry *pwr_tx_without_ps;
227 struct dentry *pwr_rcvd_beacons;
228 struct dentry *pwr_power_save_off;
229 struct dentry *pwr_enable_ps;
230 struct dentry *pwr_disable_ps;
231 struct dentry *pwr_fix_tsf_ps;
232 /* skipping cont_miss_bcns_spread for now */
233 struct dentry *pwr_rcvd_awake_beacons;
234
235 struct dentry *mic_rx_pkts;
236 struct dentry *mic_calc_failure;
237
238 struct dentry *aes_encrypt_fail;
239 struct dentry *aes_decrypt_fail;
240 struct dentry *aes_encrypt_packets;
241 struct dentry *aes_decrypt_packets;
242 struct dentry *aes_encrypt_interrupt;
243 struct dentry *aes_decrypt_interrupt;
244
245 struct dentry *event_heart_beat;
246 struct dentry *event_calibration;
247 struct dentry *event_rx_mismatch;
248 struct dentry *event_rx_mem_empty;
249 struct dentry *event_rx_pool;
250 struct dentry *event_oom_late;
251 struct dentry *event_phy_transmit_error;
252 struct dentry *event_tx_stuck;
253
254 struct dentry *ps_pspoll_timeouts;
255 struct dentry *ps_upsd_timeouts;
256 struct dentry *ps_upsd_max_sptime;
257 struct dentry *ps_upsd_max_apturn;
258 struct dentry *ps_pspoll_max_apturn;
259 struct dentry *ps_pspoll_utilization;
260 struct dentry *ps_upsd_utilization;
261
262 struct dentry *rxpipe_rx_prep_beacon_drop;
263 struct dentry *rxpipe_descr_host_int_trig_rx_data;
264 struct dentry *rxpipe_beacon_buffer_thres_host_int_trig_rx_data;
265 struct dentry *rxpipe_missed_beacon_host_int_trig_rx_data;
266 struct dentry *rxpipe_tx_xfr_host_int_trig_rx_data;
267
268 struct dentry *tx_queue_len;
269
270 struct dentry *retry_count;
271 struct dentry *excessive_retries;
Luciano Coelho98b2a682009-12-11 15:40:52 +0200272 struct dentry *gpio_power;
Luciano Coelhof5fc0f82009-08-06 16:25:28 +0300273};
274
275#define NUM_TX_QUEUES 4
276#define NUM_RX_PKT_DESC 8
277
278/* FW status registers */
279struct wl1271_fw_status {
Luciano Coelhod0f63b22009-10-15 10:33:29 +0300280 __le32 intr;
Luciano Coelhof5fc0f82009-08-06 16:25:28 +0300281 u8 fw_rx_counter;
282 u8 drv_rx_counter;
283 u8 reserved;
284 u8 tx_results_counter;
Luciano Coelhod0f63b22009-10-15 10:33:29 +0300285 __le32 rx_pkt_descs[NUM_RX_PKT_DESC];
286 __le32 tx_released_blks[NUM_TX_QUEUES];
287 __le32 fw_localtime;
288 __le32 padding[2];
Eric Dumazetba2d3582010-06-02 18:10:09 +0000289} __packed;
Luciano Coelhof5fc0f82009-08-06 16:25:28 +0300290
291struct wl1271_rx_mem_pool_addr {
292 u32 addr;
293 u32 addr_extra;
294};
295
Teemu Paasikiviabb0b3b2009-10-13 12:47:50 +0300296struct wl1271_scan {
Juuso Oikarinen4fb26fa2010-05-24 11:18:20 +0300297 struct cfg80211_scan_request *req;
Luciano Coelho08688d62010-07-08 17:50:07 +0300298 bool *scanned_ch;
Juuso Oikarinen78abd322010-09-21 06:23:32 +0200299 bool failed;
Teemu Paasikiviabb0b3b2009-10-13 12:47:50 +0300300 u8 state;
301 u8 ssid[IW_ESSID_MAX_SIZE+1];
302 size_t ssid_len;
Teemu Paasikiviabb0b3b2009-10-13 12:47:50 +0300303};
304
Teemu Paasikivi8197b712010-02-22 08:38:23 +0200305struct wl1271_if_operations {
306 void (*read)(struct wl1271 *wl, int addr, void *buf, size_t len,
307 bool fixed);
308 void (*write)(struct wl1271 *wl, int addr, void *buf, size_t len,
309 bool fixed);
310 void (*reset)(struct wl1271 *wl);
311 void (*init)(struct wl1271 *wl);
Ohad Ben-Cohen2cc78ff2010-09-16 01:22:04 +0200312 int (*power)(struct wl1271 *wl, bool enable);
Teemu Paasikivi8197b712010-02-22 08:38:23 +0200313 struct device* (*dev)(struct wl1271 *wl);
314 void (*enable_irq)(struct wl1271 *wl);
315 void (*disable_irq)(struct wl1271 *wl);
316};
317
Luciano Coelhof5fc0f82009-08-06 16:25:28 +0300318struct wl1271 {
Teemu Paasikivi3b56dd62010-03-18 12:26:46 +0200319 struct platform_device *plat_dev;
Luciano Coelhof5fc0f82009-08-06 16:25:28 +0300320 struct ieee80211_hw *hw;
321 bool mac80211_registered;
322
Teemu Paasikivi8197b712010-02-22 08:38:23 +0200323 void *if_priv;
324
325 struct wl1271_if_operations *if_ops;
Luciano Coelhof5fc0f82009-08-06 16:25:28 +0300326
327 void (*set_power)(bool enable);
328 int irq;
Ohad Ben-Cohen15cea992010-09-16 01:31:51 +0200329 int ref_clock;
Luciano Coelhof5fc0f82009-08-06 16:25:28 +0300330
331 spinlock_t wl_lock;
332
333 enum wl1271_state state;
334 struct mutex mutex;
335
Juuso Oikarinen830fb672009-12-11 15:41:06 +0200336#define WL1271_FLAG_STA_RATES_CHANGED (0)
337#define WL1271_FLAG_STA_ASSOCIATED (1)
Juuso Oikarinen71449f82009-12-11 15:41:07 +0200338#define WL1271_FLAG_JOINED (2)
339#define WL1271_FLAG_GPIO_POWER (3)
340#define WL1271_FLAG_TX_QUEUE_STOPPED (4)
Luciano Coelho08688d62010-07-08 17:50:07 +0300341#define WL1271_FLAG_IN_ELP (5)
342#define WL1271_FLAG_PSM (6)
343#define WL1271_FLAG_PSM_REQUESTED (7)
344#define WL1271_FLAG_IRQ_PENDING (8)
345#define WL1271_FLAG_IRQ_RUNNING (9)
346#define WL1271_FLAG_IDLE (10)
347#define WL1271_FLAG_IDLE_REQUESTED (11)
348#define WL1271_FLAG_PSPOLL_FAILURE (12)
Juuso Oikarinenc2c192a2010-07-27 03:30:09 +0300349#define WL1271_FLAG_STA_STATE_SENT (13)
Juuso Oikarinen830fb672009-12-11 15:41:06 +0200350 unsigned long flags;
351
Juuso Oikarinen451de972009-10-12 15:08:46 +0300352 struct wl1271_partition_set part;
Luciano Coelhof5fc0f82009-08-06 16:25:28 +0300353
354 struct wl1271_chip chip;
355
356 int cmd_box_addr;
357 int event_box_addr;
358
359 u8 *fw;
360 size_t fw_len;
Juuso Oikarinen152ee6e2010-02-18 13:25:42 +0200361 struct wl1271_nvs_file *nvs;
Juuso Oikarinen02fabb02010-08-19 04:41:15 +0200362 size_t nvs_len;
Luciano Coelhof5fc0f82009-08-06 16:25:28 +0300363
Juuso Oikarinend717fd62010-05-07 11:38:58 +0300364 s8 hw_pg_ver;
365
Luciano Coelhof5fc0f82009-08-06 16:25:28 +0300366 u8 bssid[ETH_ALEN];
367 u8 mac_addr[ETH_ALEN];
368 u8 bss_type;
Juuso Oikarinen5da11dc2010-03-26 12:53:24 +0200369 u8 set_bss_type;
Luciano Coelhof5fc0f82009-08-06 16:25:28 +0300370 u8 ssid[IW_ESSID_MAX_SIZE + 1];
371 u8 ssid_len;
Luciano Coelhof5fc0f82009-08-06 16:25:28 +0300372 int channel;
373
374 struct wl1271_acx_mem_map *target_mem_map;
375
376 /* Accounting for allocated / available TX blocks on HW */
377 u32 tx_blocks_freed[NUM_TX_QUEUES];
378 u32 tx_blocks_available;
Juuso Oikarinenffb591c2010-02-22 08:38:31 +0200379 u32 tx_results_count;
Luciano Coelhof5fc0f82009-08-06 16:25:28 +0300380
381 /* Transmitted TX packets counter for chipset interface */
Juuso Oikarinenffb591c2010-02-22 08:38:31 +0200382 u32 tx_packets_count;
Luciano Coelhof5fc0f82009-08-06 16:25:28 +0300383
384 /* Time-offset between host and chipset clocks */
Juuso Oikarinenac5e1e32010-02-22 08:38:38 +0200385 s64 time_offset;
Luciano Coelhof5fc0f82009-08-06 16:25:28 +0300386
387 /* Session counter for the chipset */
388 int session_counter;
389
390 /* Frames scheduled for transmission, not handled yet */
391 struct sk_buff_head tx_queue;
Luciano Coelhof5fc0f82009-08-06 16:25:28 +0300392
393 struct work_struct tx_work;
Juuso Oikarinenc87dec92009-10-08 21:56:31 +0300394
Luciano Coelhof5fc0f82009-08-06 16:25:28 +0300395 /* Pending TX frames */
Juuso Oikarinenbe7078c2009-10-08 21:56:26 +0300396 struct sk_buff *tx_frames[ACX_TX_DESCRIPTORS];
Juuso Oikarinen781608c2010-05-24 11:18:17 +0300397 int tx_frames_cnt;
Luciano Coelhof5fc0f82009-08-06 16:25:28 +0300398
Juuso Oikarinenac4e4ce2009-10-08 21:56:19 +0300399 /* Security sequence number counters */
400 u8 tx_security_last_seq;
Juuso Oikarinen04e36fc2010-02-22 08:38:40 +0200401 s64 tx_security_seq;
Juuso Oikarinenac4e4ce2009-10-08 21:56:19 +0300402
Luciano Coelhof5fc0f82009-08-06 16:25:28 +0300403 /* FW Rx counter */
404 u32 rx_counter;
405
406 /* Rx memory pool address */
407 struct wl1271_rx_mem_pool_addr rx_mem_pool_addr;
408
409 /* The target interrupt mask */
410 struct work_struct irq_work;
411
Juuso Oikarinen52b0e7a2010-09-21 06:23:31 +0200412 /* Hardware recovery work */
413 struct work_struct recovery_work;
414
Luciano Coelhof5fc0f82009-08-06 16:25:28 +0300415 /* The mbox event mask */
416 u32 event_mask;
417
418 /* Mailbox pointers */
419 u32 mbox_ptr[2];
420
421 /* Are we currently scanning */
Teemu Paasikiviabb0b3b2009-10-13 12:47:50 +0300422 struct wl1271_scan scan;
Juuso Oikarinen78abd322010-09-21 06:23:32 +0200423 struct delayed_work scan_complete_work;
Luciano Coelhof5fc0f82009-08-06 16:25:28 +0300424
425 /* Our association ID */
426 u16 aid;
427
Juuso Oikarinend94cd292009-10-08 21:56:25 +0300428 /* currently configured rate set */
Juuso Oikarinen830fb672009-12-11 15:41:06 +0200429 u32 sta_rate_set;
Juuso Oikarinend94cd292009-10-08 21:56:25 +0300430 u32 basic_rate_set;
Juuso Oikarinenebba60c2010-04-01 11:38:20 +0300431 u32 basic_rate;
Juuso Oikarinen830fb672009-12-11 15:41:06 +0200432 u32 rate_set;
Juuso Oikarinend94cd292009-10-08 21:56:25 +0300433
Juuso Oikarinen8a5a37a2009-10-08 21:56:24 +0300434 /* The current band */
435 enum ieee80211_band band;
436
Juuso Oikarinen60e84c22010-03-26 12:53:25 +0200437 /* Beaconing interval (needed for ad-hoc) */
438 u32 beacon_int;
439
Luciano Coelhof5fc0f82009-08-06 16:25:28 +0300440 /* Default key (for WEP) */
441 u32 default_key;
442
Juuso Oikarinen14b228a2010-03-18 12:26:43 +0200443 unsigned int filters;
Luciano Coelhof5fc0f82009-08-06 16:25:28 +0300444 unsigned int rx_config;
445 unsigned int rx_filter;
446
Luciano Coelhof5fc0f82009-08-06 16:25:28 +0300447 struct completion *elp_compl;
Juuso Oikarinen37b70a82009-10-08 21:56:21 +0300448 struct delayed_work elp_work;
Juuso Oikarinen90494a92010-07-08 17:50:00 +0300449 struct delayed_work pspoll_work;
450
451 /* counter for ps-poll delivery failures */
452 int ps_poll_failures;
Luciano Coelhof5fc0f82009-08-06 16:25:28 +0300453
Juuso Oikarinen19ad0712009-11-02 20:22:11 +0200454 /* retry counter for PSM entries */
455 u8 psm_entry_retry;
456
Luciano Coelhof5fc0f82009-08-06 16:25:28 +0300457 /* in dBm */
458 int power_level;
459
Juuso Oikarinen00236aed2010-04-09 11:07:30 +0300460 int rssi_thold;
461 int last_rssi_event;
462
Luciano Coelhof5fc0f82009-08-06 16:25:28 +0300463 struct wl1271_stats stats;
464 struct wl1271_debugfs debugfs;
465
Juuso Oikarinen554d7202010-05-07 11:38:59 +0300466 __le32 buffer_32;
Luciano Coelhof5fc0f82009-08-06 16:25:28 +0300467 u32 buffer_cmd;
Juuso Oikarinen545f1da2009-10-08 21:56:23 +0300468 u32 buffer_busyword[WL1271_BUSY_WORD_CNT];
Luciano Coelhof5fc0f82009-08-06 16:25:28 +0300469
470 struct wl1271_fw_status *fw_status;
471 struct wl1271_tx_hw_res_if *tx_res_if;
Juuso Oikarinenb771eee2009-10-08 21:56:34 +0300472
473 struct ieee80211_vif *vif;
Luciano Coelhod6e19d132009-10-12 15:08:43 +0300474
Juuso Oikarinen2b60100b2009-10-13 12:47:39 +0300475 /* Current chipset configuration */
476 struct conf_drv_settings conf;
Juuso Oikarinen01c09162009-10-13 12:47:55 +0300477
Juuso Oikarinen7fc3a862010-03-18 12:26:32 +0200478 bool sg_enabled;
479
Juuso Oikarinen02fabb02010-08-19 04:41:15 +0200480 bool enable_11a;
481
Juuso Oikarinen01c09162009-10-13 12:47:55 +0300482 struct list_head list;
John W. Linvilleece550d2010-07-28 16:41:06 -0400483
484 /* Most recently reported noise in dBm */
485 s8 noise;
Luciano Coelhof5fc0f82009-08-06 16:25:28 +0300486};
487
488int wl1271_plt_start(struct wl1271 *wl);
489int wl1271_plt_stop(struct wl1271 *wl);
490
491#define JOIN_TIMEOUT 5000 /* 5000 milliseconds to join */
492
493#define SESSION_COUNTER_MAX 7 /* maximum value for the session counter */
494
495#define WL1271_DEFAULT_POWER_LEVEL 0
496
Juuso Oikarinen06f7bc72010-02-22 08:38:33 +0200497#define WL1271_TX_QUEUE_LOW_WATERMARK 10
498#define WL1271_TX_QUEUE_HIGH_WATERMARK 25
Luciano Coelhof5fc0f82009-08-06 16:25:28 +0300499
Juuso Oikarinen01ac17e2009-12-11 15:41:02 +0200500/* WL1271 needs a 200ms sleep after power on, and a 20ms sleep before power
501 on in case is has been shut down shortly before */
502#define WL1271_PRE_POWER_ON_SLEEP 20 /* in miliseconds */
Luciano Coelhof5fc0f82009-08-06 16:25:28 +0300503#define WL1271_POWER_ON_SLEEP 200 /* in miliseconds */
504
Luciano Coelhof5fc0f82009-08-06 16:25:28 +0300505#endif