Greg Kroah-Hartman | b244131 | 2017-11-01 15:07:57 +0100 | [diff] [blame] | 1 | # SPDX-License-Identifier: GPL-2.0 |
Kishon Vijay Abraham I | 26a84b3 | 2012-08-22 14:10:02 +0530 | [diff] [blame] | 2 | # |
| 3 | # Bus Devices |
| 4 | # |
| 5 | |
| 6 | menu "Bus devices" |
| 7 | |
Geert Uytterhoeven | 13fbf3c | 2015-02-05 11:11:24 +0100 | [diff] [blame] | 8 | config ARM_CCI |
Olof Johansson | 47f36e4 | 2015-04-03 13:38:43 -0700 | [diff] [blame] | 9 | bool |
| 10 | |
| 11 | config ARM_CCI400_COMMON |
| 12 | bool |
| 13 | select ARM_CCI |
| 14 | |
Olof Johansson | 47f36e4 | 2015-04-03 13:38:43 -0700 | [diff] [blame] | 15 | config ARM_CCI400_PORT_CTRL |
| 16 | bool |
| 17 | depends on ARM && OF && CPU_V7 |
| 18 | select ARM_CCI400_COMMON |
| 19 | help |
| 20 | Low level power management driver for CCI400 cache coherent |
| 21 | interconnect for ARM platforms. |
Geert Uytterhoeven | 13fbf3c | 2015-02-05 11:11:24 +0100 | [diff] [blame] | 22 | |
Florian Fainelli | 44127b7 | 2014-05-19 13:05:59 -0700 | [diff] [blame] | 23 | config BRCMSTB_GISB_ARB |
| 24 | bool "Broadcom STB GISB bus arbiter" |
Doug Berger | 8c7aa17 | 2017-03-29 17:29:13 -0700 | [diff] [blame] | 25 | depends on ARM || ARM64 || MIPS |
Florian Fainelli | b0ec633 | 2016-04-16 13:46:14 -0700 | [diff] [blame] | 26 | default ARCH_BRCMSTB || BMIPS_GENERIC |
Florian Fainelli | 44127b7 | 2014-05-19 13:05:59 -0700 | [diff] [blame] | 27 | help |
| 28 | Driver for the Broadcom Set Top Box System-on-a-chip internal bus |
| 29 | arbiter. This driver provides timeout and target abort error handling |
| 30 | and internal bus master decoding. |
| 31 | |
Marek BehĂșn | 5bc7f99 | 2019-08-12 18:11:14 +0200 | [diff] [blame] | 32 | config MOXTET |
| 33 | tristate "CZ.NIC Turris Mox module configuration bus" |
| 34 | depends on SPI_MASTER && OF |
| 35 | help |
| 36 | Say yes here to add support for the module configuration bus found |
| 37 | on CZ.NIC's Turris Mox. This is needed for the ability to discover |
| 38 | the order in which the modules are connected and to get/set some of |
| 39 | their settings. For example the GPIOs on Mox SFP module are |
| 40 | configured through this bus. |
| 41 | |
Zhichang Yuan | adf38bb | 2018-03-21 17:23:02 -0500 | [diff] [blame] | 42 | config HISILICON_LPC |
| 43 | bool "Support for ISA I/O space on HiSilicon Hip06/7" |
John Garry | 3e5cd20 | 2019-11-05 01:22:18 +0800 | [diff] [blame] | 44 | depends on (ARM64 && ARCH_HISI) || (COMPILE_TEST && !ALPHA && !HEXAGON && !PARISC && !C6X) |
| 45 | depends on HAS_IOMEM |
| 46 | select INDIRECT_PIO if ARM64 |
Zhichang Yuan | adf38bb | 2018-03-21 17:23:02 -0500 | [diff] [blame] | 47 | help |
| 48 | Driver to enable I/O access to devices attached to the Low Pin |
| 49 | Count bus on the HiSilicon Hip06/7 SoC. |
| 50 | |
Huang Shijie | 85bf6d4 | 2013-05-28 14:20:07 +0800 | [diff] [blame] | 51 | config IMX_WEIM |
| 52 | bool "Freescale EIM DRIVER" |
| 53 | depends on ARCH_MXC |
| 54 | help |
Alexander Shiyan | 3f98b6b | 2013-06-29 08:27:54 +0400 | [diff] [blame] | 55 | Driver for i.MX WEIM controller. |
Huang Shijie | 85bf6d4 | 2013-05-28 14:20:07 +0800 | [diff] [blame] | 56 | The WEIM(Wireless External Interface Module) works like a bus. |
| 57 | You can attach many different devices on it, such as NOR, onenand. |
Huang Shijie | 85bf6d4 | 2013-05-28 14:20:07 +0800 | [diff] [blame] | 58 | |
James Hogan | 8286ae0 | 2015-03-25 15:39:50 +0000 | [diff] [blame] | 59 | config MIPS_CDMM |
| 60 | bool "MIPS Common Device Memory Map (CDMM) Driver" |
| 61 | depends on CPU_MIPSR2 |
| 62 | help |
| 63 | Driver needed for the MIPS Common Device Memory Map bus in MIPS |
| 64 | cores. This bus is for per-CPU tightly coupled devices such as the |
| 65 | Fast Debug Channel (FDC). |
| 66 | |
| 67 | For this to work, either your bootloader needs to enable the CDMM |
| 68 | region at an unused physical address on the boot CPU, or else your |
| 69 | platform code needs to implement mips_cdmm_phys_base() (see |
| 70 | asm/cdmm.h). |
| 71 | |
Thomas Petazzoni | fddddb5 | 2013-03-21 17:59:14 +0100 | [diff] [blame] | 72 | config MVEBU_MBUS |
| 73 | bool |
| 74 | depends on PLAT_ORION |
| 75 | help |
| 76 | Driver needed for the MBus configuration on Marvell EBU SoCs |
| 77 | (Kirkwood, Dove, Orion5x, MV78XX0 and Armada 370/XP). |
| 78 | |
Geert Uytterhoeven | 13fbf3c | 2015-02-05 11:11:24 +0100 | [diff] [blame] | 79 | config OMAP_INTERCONNECT |
| 80 | tristate "OMAP INTERCONNECT DRIVER" |
| 81 | depends on ARCH_OMAP2PLUS |
| 82 | |
| 83 | help |
| 84 | Driver to enable OMAP interconnect error handling driver. |
| 85 | |
Kishon Vijay Abraham I | 26a84b3 | 2012-08-22 14:10:02 +0530 | [diff] [blame] | 86 | config OMAP_OCP2SCP |
| 87 | tristate "OMAP OCP2SCP DRIVER" |
Tony Lindgren | 770b6cb | 2012-12-16 12:28:46 -0800 | [diff] [blame] | 88 | depends on ARCH_OMAP2PLUS |
Kishon Vijay Abraham I | 26a84b3 | 2012-08-22 14:10:02 +0530 | [diff] [blame] | 89 | help |
| 90 | Driver to enable ocp2scp module which transforms ocp interface |
| 91 | protocol to scp protocol. In OMAP4, USB PHY is connected via |
| 92 | OCP2SCP and in OMAP5, both USB PHY and SATA PHY is connected via |
| 93 | OCP2SCP. |
| 94 | |
Linus Walleij | 335a127 | 2016-07-08 00:11:02 +0200 | [diff] [blame] | 95 | config QCOM_EBI2 |
| 96 | bool "Qualcomm External Bus Interface 2 (EBI2)" |
Linus Walleij | d6db68b | 2016-10-02 23:53:59 +0200 | [diff] [blame] | 97 | depends on HAS_IOMEM |
Linus Walleij | 5fac7e8 | 2016-10-04 13:56:19 +0200 | [diff] [blame] | 98 | depends on ARCH_QCOM || COMPILE_TEST |
Linus Walleij | c5d8ccf | 2017-01-12 08:08:55 +0100 | [diff] [blame] | 99 | default ARCH_QCOM |
Linus Walleij | 335a127 | 2016-07-08 00:11:02 +0200 | [diff] [blame] | 100 | help |
| 101 | Say y here to enable support for the Qualcomm External Bus |
| 102 | Interface 2, which can be used to connect things like NAND Flash, |
| 103 | SRAM, ethernet adapters, FPGAs and LCD displays. |
| 104 | |
Geert Uytterhoeven | 89d463e | 2015-02-05 11:11:28 +0100 | [diff] [blame] | 105 | config SIMPLE_PM_BUS |
Paul Gortmaker | a248efb | 2017-11-30 12:57:00 +0100 | [diff] [blame] | 106 | tristate "Simple Power-Managed Bus Driver" |
Geert Uytterhoeven | 89d463e | 2015-02-05 11:11:28 +0100 | [diff] [blame] | 107 | depends on OF && PM |
Santosh Shilimkar | 0ee7261 | 2012-09-14 14:50:34 +0530 | [diff] [blame] | 108 | help |
Geert Uytterhoeven | 89d463e | 2015-02-05 11:11:28 +0100 | [diff] [blame] | 109 | Driver for transparent busses that don't need a real driver, but |
| 110 | where the bus controller is part of a PM domain, or under the control |
| 111 | of a functional clock, and thus relies on runtime PM for managing |
| 112 | this PM domain and/or clock. |
| 113 | An example of such a bus controller is the Renesas Bus State |
| 114 | Controller (BSC, sometimes called "LBSC within Bus Bridge", or |
| 115 | "External Bus Interface") as found on several Renesas ARM SoCs. |
Pawel Moll | a33b0da | 2014-07-22 18:32:59 +0100 | [diff] [blame] | 116 | |
Icenowy Zheng | 8818e86 | 2018-06-22 20:45:36 +0800 | [diff] [blame] | 117 | config SUN50I_DE2_BUS |
| 118 | bool "Allwinner A64 DE2 Bus Driver" |
| 119 | default ARM64 |
| 120 | depends on ARCH_SUNXI |
| 121 | select SUNXI_SRAM |
| 122 | help |
| 123 | Say y here to enable support for Allwinner A64 DE2 bus driver. It's |
| 124 | mostly transparent, but a SRAM region needs to be claimed in the SRAM |
| 125 | controller to make the all blocks in the DE2 part accessible. |
| 126 | |
Chen-Yu Tsai | d787dcd | 2015-10-23 20:41:31 +0200 | [diff] [blame] | 127 | config SUNXI_RSB |
| 128 | tristate "Allwinner sunXi Reduced Serial Bus Driver" |
Jagan Teki | dc1a37b | 2017-08-12 11:10:41 +0530 | [diff] [blame] | 129 | default MACH_SUN8I || MACH_SUN9I || ARM64 |
Chen-Yu Tsai | d787dcd | 2015-10-23 20:41:31 +0200 | [diff] [blame] | 130 | depends on ARCH_SUNXI |
| 131 | select REGMAP |
| 132 | help |
| 133 | Say y here to enable support for Allwinner's Reduced Serial Bus |
| 134 | (RSB) support. This controller is responsible for communicating |
| 135 | with various RSB based devices, such as AXP223, AXP8XX PMICs, |
| 136 | and AC100/AC200 ICs. |
| 137 | |
Jon Hunter | 46a8853 | 2016-06-17 13:40:32 +0100 | [diff] [blame] | 138 | config TEGRA_ACONNECT |
Thierry Reding | 2d301c0 | 2016-06-30 17:07:05 +0200 | [diff] [blame] | 139 | tristate "Tegra ACONNECT Bus Driver" |
Jon Hunter | 46a8853 | 2016-06-17 13:40:32 +0100 | [diff] [blame] | 140 | depends on ARCH_TEGRA_210_SOC |
| 141 | depends on OF && PM |
Jon Hunter | 46a8853 | 2016-06-17 13:40:32 +0100 | [diff] [blame] | 142 | help |
| 143 | Driver for the Tegra ACONNECT bus which is used to interface with |
| 144 | the devices inside the Audio Processing Engine (APE) for Tegra210. |
| 145 | |
Mirza Krak | 40eb477 | 2016-11-07 09:30:05 +0100 | [diff] [blame] | 146 | config TEGRA_GMI |
| 147 | tristate "Tegra Generic Memory Interface bus driver" |
| 148 | depends on ARCH_TEGRA |
| 149 | help |
| 150 | Driver for the Tegra Generic Memory Interface bus which can be used |
| 151 | to attach devices such as NOR, UART, FPGA and more. |
| 152 | |
David Lechner | 7cabf92 | 2019-09-01 17:58:22 -0500 | [diff] [blame] | 153 | config TI_PWMSS |
| 154 | bool |
David Lechner | f213729 | 2019-09-01 17:58:24 -0500 | [diff] [blame] | 155 | default y if (ARCH_OMAP2PLUS) && (PWM_TIECAP || PWM_TIEHRPWM || TI_EQEP) |
David Lechner | 7cabf92 | 2019-09-01 17:58:22 -0500 | [diff] [blame] | 156 | help |
| 157 | PWM Subsystem driver support for AM33xx SOC. |
| 158 | |
| 159 | PWM submodules require PWM config space access from submodule |
| 160 | drivers and require common parent driver support. |
| 161 | |
Tony Lindgren | 0eecc63 | 2017-10-10 14:23:43 -0700 | [diff] [blame] | 162 | config TI_SYSC |
| 163 | bool "TI sysc interconnect target module driver" |
| 164 | depends on ARCH_OMAP2PLUS |
| 165 | help |
| 166 | Generic driver for Texas Instruments interconnect target module |
| 167 | found on many TI SoCs. |
| 168 | |
Sebastien Bourdelin | 5b143d2a | 2017-11-01 13:14:33 -0400 | [diff] [blame] | 169 | config TS_NBUS |
| 170 | tristate "Technologic Systems NBUS Driver" |
| 171 | depends on SOC_IMX28 |
| 172 | depends on OF_GPIO && PWM |
| 173 | help |
| 174 | Driver for the Technologic Systems NBUS which is used to interface |
| 175 | with the peripherals in the FPGA of the TS-4600 SoM. |
| 176 | |
Masahiro Yamada | 4b7f48d | 2015-12-09 15:52:59 +0900 | [diff] [blame] | 177 | config UNIPHIER_SYSTEM_BUS |
Masahiro Yamada | 047a555 | 2016-01-23 23:06:28 +0900 | [diff] [blame] | 178 | tristate "UniPhier System Bus driver" |
Masahiro Yamada | 4b7f48d | 2015-12-09 15:52:59 +0900 | [diff] [blame] | 179 | depends on ARCH_UNIPHIER && OF |
| 180 | default y |
| 181 | help |
| 182 | Support for UniPhier System Bus, a simple external bus. This is |
| 183 | needed to use on-board devices connected to UniPhier SoCs. |
| 184 | |
Pawel Moll | 3b9334a | 2014-04-30 16:46:29 +0100 | [diff] [blame] | 185 | config VEXPRESS_CONFIG |
| 186 | bool "Versatile Express configuration bus" |
| 187 | default y if ARCH_VEXPRESS |
| 188 | depends on ARM || ARM64 |
Arnd Bergmann | b33cdd2 | 2014-05-26 17:25:22 +0200 | [diff] [blame] | 189 | depends on OF |
Pawel Moll | 3b9334a | 2014-04-30 16:46:29 +0100 | [diff] [blame] | 190 | select REGMAP |
| 191 | help |
| 192 | Platform configuration infrastructure for the ARM Ltd. |
| 193 | Versatile Express. |
Bartosz Golaszewski | 8e7223f | 2016-10-31 15:45:35 +0100 | [diff] [blame] | 194 | |
| 195 | config DA8XX_MSTPRI |
| 196 | bool "TI da8xx master peripheral priority driver" |
| 197 | depends on ARCH_DAVINCI_DA8XX |
| 198 | help |
| 199 | Driver for Texas Instruments da8xx master peripheral priority |
| 200 | configuration. Allows to adjust the priorities of all master |
| 201 | peripherals. |
| 202 | |
Bogdan Purcareata | 6bd067c | 2018-02-05 08:07:42 -0600 | [diff] [blame] | 203 | source "drivers/bus/fsl-mc/Kconfig" |
| 204 | |
Kishon Vijay Abraham I | 26a84b3 | 2012-08-22 14:10:02 +0530 | [diff] [blame] | 205 | endmenu |