Thomas Gleixner | d2912cb | 2019-06-04 10:11:33 +0200 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
Lv Zheng | 07d8391 | 2014-05-12 15:46:38 +0800 | [diff] [blame] | 2 | /* |
| 3 | * X86 specific ACPICA environments and implementation |
| 4 | * |
| 5 | * Copyright (C) 2014, Intel Corporation |
| 6 | * Author: Lv Zheng <lv.zheng@intel.com> |
Lv Zheng | 07d8391 | 2014-05-12 15:46:38 +0800 | [diff] [blame] | 7 | */ |
| 8 | |
| 9 | #ifndef _ASM_X86_ACENV_H |
| 10 | #define _ASM_X86_ACENV_H |
| 11 | |
| 12 | #include <asm/special_insns.h> |
| 13 | |
Lv Zheng | 07d8391 | 2014-05-12 15:46:38 +0800 | [diff] [blame] | 14 | /* Asm macros */ |
| 15 | |
| 16 | #define ACPI_FLUSH_CPU_CACHE() wbinvd() |
| 17 | |
Lv Zheng | 07d8391 | 2014-05-12 15:46:38 +0800 | [diff] [blame] | 18 | int __acpi_acquire_global_lock(unsigned int *lock); |
| 19 | int __acpi_release_global_lock(unsigned int *lock); |
| 20 | |
| 21 | #define ACPI_ACQUIRE_GLOBAL_LOCK(facs, Acq) \ |
| 22 | ((Acq) = __acpi_acquire_global_lock(&facs->global_lock)) |
| 23 | |
| 24 | #define ACPI_RELEASE_GLOBAL_LOCK(facs, Acq) \ |
| 25 | ((Acq) = __acpi_release_global_lock(&facs->global_lock)) |
| 26 | |
| 27 | /* |
| 28 | * Math helper asm macros |
| 29 | */ |
| 30 | #define ACPI_DIV_64_BY_32(n_hi, n_lo, d32, q32, r32) \ |
| 31 | asm("divl %2;" \ |
| 32 | : "=a"(q32), "=d"(r32) \ |
| 33 | : "r"(d32), \ |
| 34 | "0"(n_lo), "1"(n_hi)) |
| 35 | |
| 36 | #define ACPI_SHIFT_RIGHT_64(n_hi, n_lo) \ |
| 37 | asm("shrl $1,%2 ;" \ |
| 38 | "rcrl $1,%3;" \ |
| 39 | : "=r"(n_hi), "=r"(n_lo) \ |
| 40 | : "0"(n_hi), "1"(n_lo)) |
| 41 | |
Lv Zheng | 07d8391 | 2014-05-12 15:46:38 +0800 | [diff] [blame] | 42 | #endif /* _ASM_X86_ACENV_H */ |