blob: 6f8ce114032d08ac67f5de11aa4d6725b1a4296f [file] [log] [blame]
Thomas Gleixner5b497af2019-05-29 07:18:09 -07001/* SPDX-License-Identifier: GPL-2.0-only */
Dan Williams4d88a972015-05-31 14:41:48 -04002/*
3 * Copyright(c) 2013-2015 Intel Corporation. All rights reserved.
Dan Williams4d88a972015-05-31 14:41:48 -04004 */
5#ifndef __ND_H__
6#define __ND_H__
Dan Williams1f7df6f2015-06-09 20:13:14 -04007#include <linux/libnvdimm.h>
Dan Williams200c79d2016-03-22 00:22:16 -07008#include <linux/badblocks.h>
Dan Williamsf0dc0892015-05-16 12:28:53 -04009#include <linux/blkdev.h>
Dan Williams4d88a972015-05-31 14:41:48 -040010#include <linux/device.h>
11#include <linux/mutex.h>
12#include <linux/ndctl.h>
Dan Williamsbf9bccc2015-06-17 17:14:46 -040013#include <linux/types.h>
Dan Williams71999462016-02-18 10:29:49 -080014#include <linux/nd.h>
Dan Williams4a826c82015-06-09 16:09:36 -040015#include "label.h"
Dan Williams4d88a972015-05-31 14:41:48 -040016
Dan Williams8c2f7e82015-06-25 04:20:04 -040017enum {
Vishal Verma5212e112015-06-25 04:20:32 -040018 /*
19 * Limits the maximum number of block apertures a dimm can
20 * support and is an input to the geometry/on-disk-format of a
21 * BTT instance
22 */
23 ND_MAX_LANES = 256,
Vishal Vermafcae6952015-06-25 04:22:39 -040024 INT_LBASIZE_ALIGNMENT = 64,
Vishal Verma3ae3d672017-05-10 15:01:30 -060025 NVDIMM_IO_ATOMIC = 1,
Dan Williams8c2f7e82015-06-25 04:20:04 -040026};
27
Dan Williams4d88a972015-05-31 14:41:48 -040028struct nvdimm_drvdata {
29 struct device *dev;
Dan Williams028817682017-08-29 18:28:18 -070030 int nslabel_size;
Dan Williams4d88a972015-05-31 14:41:48 -040031 struct nd_cmd_get_config_size nsarea;
32 void *data;
Dan Williams5af96832021-09-08 22:12:04 -070033 bool cxl;
Dan Williams4a826c82015-06-09 16:09:36 -040034 int ns_current, ns_next;
35 struct resource dpa;
Dan Williamsbf9bccc2015-06-17 17:14:46 -040036 struct kref kref;
Dan Williams4d88a972015-05-31 14:41:48 -040037};
38
Dan Williamsb4366a82021-08-24 09:05:30 -070039static inline const u8 *nsl_ref_name(struct nvdimm_drvdata *ndd,
40 struct nd_namespace_label *nd_label)
41{
Dan Williams5af96832021-09-08 22:12:04 -070042 if (ndd->cxl)
43 return nd_label->cxl.name;
44 return nd_label->efi.name;
Dan Williamsb4366a82021-08-24 09:05:30 -070045}
46
47static inline u8 *nsl_get_name(struct nvdimm_drvdata *ndd,
48 struct nd_namespace_label *nd_label, u8 *name)
49{
Dan Williams5af96832021-09-08 22:12:04 -070050 if (ndd->cxl)
51 return memcpy(name, nd_label->cxl.name, NSLABEL_NAME_LEN);
52 return memcpy(name, nd_label->efi.name, NSLABEL_NAME_LEN);
Dan Williamsb4366a82021-08-24 09:05:30 -070053}
54
Dan Williams8176f142021-08-24 09:05:41 -070055static inline u8 *nsl_set_name(struct nvdimm_drvdata *ndd,
56 struct nd_namespace_label *nd_label, u8 *name)
57{
58 if (!name)
59 return NULL;
Dan Williams5af96832021-09-08 22:12:04 -070060 if (ndd->cxl)
61 return memcpy(nd_label->cxl.name, name, NSLABEL_NAME_LEN);
62 return memcpy(nd_label->efi.name, name, NSLABEL_NAME_LEN);
Dan Williams8176f142021-08-24 09:05:41 -070063}
64
Dan Williamsb4366a82021-08-24 09:05:30 -070065static inline u32 nsl_get_slot(struct nvdimm_drvdata *ndd,
66 struct nd_namespace_label *nd_label)
67{
Dan Williams5af96832021-09-08 22:12:04 -070068 if (ndd->cxl)
69 return __le32_to_cpu(nd_label->cxl.slot);
70 return __le32_to_cpu(nd_label->efi.slot);
Dan Williamsb4366a82021-08-24 09:05:30 -070071}
72
Dan Williams8176f142021-08-24 09:05:41 -070073static inline void nsl_set_slot(struct nvdimm_drvdata *ndd,
74 struct nd_namespace_label *nd_label, u32 slot)
75{
Dan Williams5af96832021-09-08 22:12:04 -070076 if (ndd->cxl)
77 nd_label->cxl.slot = __cpu_to_le32(slot);
78 else
79 nd_label->efi.slot = __cpu_to_le32(slot);
Dan Williams8176f142021-08-24 09:05:41 -070080}
81
Dan Williamsb4366a82021-08-24 09:05:30 -070082static inline u64 nsl_get_checksum(struct nvdimm_drvdata *ndd,
83 struct nd_namespace_label *nd_label)
84{
Dan Williams5af96832021-09-08 22:12:04 -070085 if (ndd->cxl)
86 return __le64_to_cpu(nd_label->cxl.checksum);
87 return __le64_to_cpu(nd_label->efi.checksum);
Dan Williamsb4366a82021-08-24 09:05:30 -070088}
89
Dan Williams8176f142021-08-24 09:05:41 -070090static inline void nsl_set_checksum(struct nvdimm_drvdata *ndd,
91 struct nd_namespace_label *nd_label,
92 u64 checksum)
93{
Dan Williams5af96832021-09-08 22:12:04 -070094 if (ndd->cxl)
95 nd_label->cxl.checksum = __cpu_to_le64(checksum);
96 else
97 nd_label->efi.checksum = __cpu_to_le64(checksum);
Dan Williams8176f142021-08-24 09:05:41 -070098}
99
Dan Williamsb4366a82021-08-24 09:05:30 -0700100static inline u32 nsl_get_flags(struct nvdimm_drvdata *ndd,
101 struct nd_namespace_label *nd_label)
102{
Dan Williams5af96832021-09-08 22:12:04 -0700103 if (ndd->cxl)
104 return __le32_to_cpu(nd_label->cxl.flags);
105 return __le32_to_cpu(nd_label->efi.flags);
Dan Williamsb4366a82021-08-24 09:05:30 -0700106}
107
Dan Williams8176f142021-08-24 09:05:41 -0700108static inline void nsl_set_flags(struct nvdimm_drvdata *ndd,
109 struct nd_namespace_label *nd_label, u32 flags)
110{
Dan Williams5af96832021-09-08 22:12:04 -0700111 if (ndd->cxl)
112 nd_label->cxl.flags = __cpu_to_le32(flags);
113 else
114 nd_label->efi.flags = __cpu_to_le32(flags);
Dan Williams8176f142021-08-24 09:05:41 -0700115}
116
Dan Williamsb4366a82021-08-24 09:05:30 -0700117static inline u64 nsl_get_dpa(struct nvdimm_drvdata *ndd,
118 struct nd_namespace_label *nd_label)
119{
Dan Williams5af96832021-09-08 22:12:04 -0700120 if (ndd->cxl)
121 return __le64_to_cpu(nd_label->cxl.dpa);
122 return __le64_to_cpu(nd_label->efi.dpa);
Dan Williamsb4366a82021-08-24 09:05:30 -0700123}
124
Dan Williams8176f142021-08-24 09:05:41 -0700125static inline void nsl_set_dpa(struct nvdimm_drvdata *ndd,
126 struct nd_namespace_label *nd_label, u64 dpa)
127{
Dan Williams5af96832021-09-08 22:12:04 -0700128 if (ndd->cxl)
129 nd_label->cxl.dpa = __cpu_to_le64(dpa);
130 else
131 nd_label->efi.dpa = __cpu_to_le64(dpa);
Dan Williams8176f142021-08-24 09:05:41 -0700132}
133
Dan Williamsb4366a82021-08-24 09:05:30 -0700134static inline u64 nsl_get_rawsize(struct nvdimm_drvdata *ndd,
135 struct nd_namespace_label *nd_label)
136{
Dan Williams5af96832021-09-08 22:12:04 -0700137 if (ndd->cxl)
138 return __le64_to_cpu(nd_label->cxl.rawsize);
139 return __le64_to_cpu(nd_label->efi.rawsize);
Dan Williamsb4366a82021-08-24 09:05:30 -0700140}
141
Dan Williams8176f142021-08-24 09:05:41 -0700142static inline void nsl_set_rawsize(struct nvdimm_drvdata *ndd,
143 struct nd_namespace_label *nd_label,
144 u64 rawsize)
145{
Dan Williams5af96832021-09-08 22:12:04 -0700146 if (ndd->cxl)
147 nd_label->cxl.rawsize = __cpu_to_le64(rawsize);
148 else
149 nd_label->efi.rawsize = __cpu_to_le64(rawsize);
Dan Williams8176f142021-08-24 09:05:41 -0700150}
151
Dan Williamsb4366a82021-08-24 09:05:30 -0700152static inline u64 nsl_get_isetcookie(struct nvdimm_drvdata *ndd,
153 struct nd_namespace_label *nd_label)
154{
Dan Williams5af96832021-09-08 22:12:04 -0700155 /* WARN future refactor attempts that break this assumption */
156 if (dev_WARN_ONCE(ndd->dev, ndd->cxl,
157 "CXL labels do not use the isetcookie concept\n"))
158 return 0;
159 return __le64_to_cpu(nd_label->efi.isetcookie);
Dan Williamsb4366a82021-08-24 09:05:30 -0700160}
161
Dan Williams8176f142021-08-24 09:05:41 -0700162static inline void nsl_set_isetcookie(struct nvdimm_drvdata *ndd,
163 struct nd_namespace_label *nd_label,
164 u64 isetcookie)
165{
Dan Williams5af96832021-09-08 22:12:04 -0700166 if (!ndd->cxl)
167 nd_label->efi.isetcookie = __cpu_to_le64(isetcookie);
Dan Williams8176f142021-08-24 09:05:41 -0700168}
169
Dan Williams9761b022021-08-24 09:05:35 -0700170static inline bool nsl_validate_isetcookie(struct nvdimm_drvdata *ndd,
171 struct nd_namespace_label *nd_label,
172 u64 cookie)
173{
Dan Williams5af96832021-09-08 22:12:04 -0700174 /*
175 * Let the EFI and CXL validation comingle, where fields that
176 * don't matter to CXL always validate.
177 */
178 if (ndd->cxl)
179 return true;
180 return cookie == __le64_to_cpu(nd_label->efi.isetcookie);
Dan Williams9761b022021-08-24 09:05:35 -0700181}
182
Dan Williamsb4366a82021-08-24 09:05:30 -0700183static inline u16 nsl_get_position(struct nvdimm_drvdata *ndd,
184 struct nd_namespace_label *nd_label)
185{
Dan Williams5af96832021-09-08 22:12:04 -0700186 if (ndd->cxl)
187 return __le16_to_cpu(nd_label->cxl.position);
188 return __le16_to_cpu(nd_label->efi.position);
Dan Williamsb4366a82021-08-24 09:05:30 -0700189}
190
Dan Williams8176f142021-08-24 09:05:41 -0700191static inline void nsl_set_position(struct nvdimm_drvdata *ndd,
192 struct nd_namespace_label *nd_label,
193 u16 position)
194{
Dan Williams5af96832021-09-08 22:12:04 -0700195 if (ndd->cxl)
196 nd_label->cxl.position = __cpu_to_le16(position);
197 else
198 nd_label->efi.position = __cpu_to_le16(position);
Dan Williams8176f142021-08-24 09:05:41 -0700199}
200
Dan Williamsb4366a82021-08-24 09:05:30 -0700201static inline u16 nsl_get_nlabel(struct nvdimm_drvdata *ndd,
202 struct nd_namespace_label *nd_label)
203{
Dan Williams5af96832021-09-08 22:12:04 -0700204 if (ndd->cxl)
205 return 0;
206 return __le16_to_cpu(nd_label->efi.nlabel);
Dan Williamsb4366a82021-08-24 09:05:30 -0700207}
208
Dan Williams8176f142021-08-24 09:05:41 -0700209static inline void nsl_set_nlabel(struct nvdimm_drvdata *ndd,
210 struct nd_namespace_label *nd_label,
211 u16 nlabel)
212{
Dan Williams5af96832021-09-08 22:12:04 -0700213 if (!ndd->cxl)
214 nd_label->efi.nlabel = __cpu_to_le16(nlabel);
Dan Williams8176f142021-08-24 09:05:41 -0700215}
216
Dan Williams42e192a2021-09-08 22:11:48 -0700217static inline u16 nsl_get_nrange(struct nvdimm_drvdata *ndd,
218 struct nd_namespace_label *nd_label)
219{
Dan Williams5af96832021-09-08 22:12:04 -0700220 if (ndd->cxl)
221 return __le16_to_cpu(nd_label->cxl.nrange);
Dan Williams42e192a2021-09-08 22:11:48 -0700222 return 1;
223}
224
225static inline void nsl_set_nrange(struct nvdimm_drvdata *ndd,
226 struct nd_namespace_label *nd_label,
227 u16 nrange)
228{
Dan Williams5af96832021-09-08 22:12:04 -0700229 if (ndd->cxl)
230 nd_label->cxl.nrange = __cpu_to_le16(nrange);
Dan Williams42e192a2021-09-08 22:11:48 -0700231}
232
Dan Williamsb4366a82021-08-24 09:05:30 -0700233static inline u64 nsl_get_lbasize(struct nvdimm_drvdata *ndd,
234 struct nd_namespace_label *nd_label)
235{
Dan Williams5af96832021-09-08 22:12:04 -0700236 /*
237 * Yes, for some reason the EFI labels convey a massive 64-bit
238 * lbasize, that got fixed for CXL.
239 */
240 if (ndd->cxl)
241 return __le16_to_cpu(nd_label->cxl.lbasize);
242 return __le64_to_cpu(nd_label->efi.lbasize);
Dan Williamsb4366a82021-08-24 09:05:30 -0700243}
244
Dan Williams8176f142021-08-24 09:05:41 -0700245static inline void nsl_set_lbasize(struct nvdimm_drvdata *ndd,
246 struct nd_namespace_label *nd_label,
247 u64 lbasize)
248{
Dan Williams5af96832021-09-08 22:12:04 -0700249 if (ndd->cxl)
250 nd_label->cxl.lbasize = __cpu_to_le16(lbasize);
251 else
252 nd_label->efi.lbasize = __cpu_to_le64(lbasize);
Dan Williams8176f142021-08-24 09:05:41 -0700253}
254
Dan Williamsd1c6e082021-09-08 22:11:37 -0700255static inline const uuid_t *nsl_get_uuid(struct nvdimm_drvdata *ndd,
256 struct nd_namespace_label *nd_label,
257 uuid_t *uuid)
258{
Dan Williams5af96832021-09-08 22:12:04 -0700259 if (ndd->cxl)
260 import_uuid(uuid, nd_label->cxl.uuid);
261 else
262 import_uuid(uuid, nd_label->efi.uuid);
Dan Williamsd1c6e082021-09-08 22:11:37 -0700263 return uuid;
264}
265
266static inline const uuid_t *nsl_set_uuid(struct nvdimm_drvdata *ndd,
267 struct nd_namespace_label *nd_label,
268 const uuid_t *uuid)
269{
Dan Williams5af96832021-09-08 22:12:04 -0700270 if (ndd->cxl)
271 export_uuid(nd_label->cxl.uuid, uuid);
272 else
273 export_uuid(nd_label->efi.uuid, uuid);
Dan Williamsd1c6e082021-09-08 22:11:37 -0700274 return uuid;
275}
276
277static inline bool nsl_uuid_equal(struct nvdimm_drvdata *ndd,
278 struct nd_namespace_label *nd_label,
279 const uuid_t *uuid)
280{
281 uuid_t tmp;
282
Dan Williams5af96832021-09-08 22:12:04 -0700283 if (ndd->cxl)
284 import_uuid(&tmp, nd_label->cxl.uuid);
285 else
286 import_uuid(&tmp, nd_label->efi.uuid);
Dan Williamsd1c6e082021-09-08 22:11:37 -0700287 return uuid_equal(&tmp, uuid);
288}
289
290static inline const u8 *nsl_uuid_raw(struct nvdimm_drvdata *ndd,
291 struct nd_namespace_label *nd_label)
292{
Dan Williams5af96832021-09-08 22:12:04 -0700293 if (ndd->cxl)
294 return nd_label->cxl.uuid;
295 return nd_label->efi.uuid;
Dan Williamsd1c6e082021-09-08 22:11:37 -0700296}
297
Dan Williamsf56541a2021-08-24 09:05:51 -0700298bool nsl_validate_blk_isetcookie(struct nvdimm_drvdata *ndd,
299 struct nd_namespace_label *nd_label,
300 u64 isetcookie);
Dan Williams8b03aa02021-08-24 09:06:02 -0700301bool nsl_validate_type_guid(struct nvdimm_drvdata *ndd,
302 struct nd_namespace_label *nd_label, guid_t *guid);
Dan Williamsa6e6d722021-08-24 09:06:07 -0700303enum nvdimm_claim_class nsl_get_claim_class(struct nvdimm_drvdata *ndd,
304 struct nd_namespace_label *nd_label);
Dan Williamsf56541a2021-08-24 09:05:51 -0700305
Dan Williamse5ae3b22016-06-07 17:00:04 -0700306struct nd_region_data {
307 int ns_count;
308 int ns_active;
Dan Williams595c7302016-09-23 17:53:52 -0700309 unsigned int hints_shift;
Gustavo A. R. Silva91061372020-03-19 18:09:37 -0500310 void __iomem *flush_wpq[];
Dan Williams3d880022015-05-31 15:02:11 -0400311};
312
Dan Williams595c7302016-09-23 17:53:52 -0700313static inline void __iomem *ndrd_get_flush_wpq(struct nd_region_data *ndrd,
314 int dimm, int hint)
315{
316 unsigned int num = 1 << ndrd->hints_shift;
317 unsigned int mask = num - 1;
318
319 return ndrd->flush_wpq[dimm * num + (hint & mask)];
320}
321
322static inline void ndrd_set_flush_wpq(struct nd_region_data *ndrd, int dimm,
323 int hint, void __iomem *flush)
324{
325 unsigned int num = 1 << ndrd->hints_shift;
326 unsigned int mask = num - 1;
327
328 ndrd->flush_wpq[dimm * num + (hint & mask)] = flush;
329}
330
Dan Williams4a826c82015-06-09 16:09:36 -0400331static inline struct nd_namespace_index *to_namespace_index(
332 struct nvdimm_drvdata *ndd, int i)
333{
334 if (i < 0)
335 return NULL;
336
337 return ndd->data + sizeof_namespace_index(ndd) * i;
338}
339
340static inline struct nd_namespace_index *to_current_namespace_index(
341 struct nvdimm_drvdata *ndd)
342{
343 return to_namespace_index(ndd, ndd->ns_current);
344}
345
346static inline struct nd_namespace_index *to_next_namespace_index(
347 struct nvdimm_drvdata *ndd)
348{
349 return to_namespace_index(ndd, ndd->ns_next);
350}
351
Dan Williams564e8712017-06-03 18:30:43 +0900352unsigned sizeof_namespace_label(struct nvdimm_drvdata *ndd);
353
Dan Williams5af96832021-09-08 22:12:04 -0700354#define efi_namespace_label_has(ndd, field) \
355 (!ndd->cxl && offsetof(struct nvdimm_efi_label, field) \
Dan Williams564e8712017-06-03 18:30:43 +0900356 < sizeof_namespace_label(ndd))
357
Dan Williams4a826c82015-06-09 16:09:36 -0400358#define nd_dbg_dpa(r, d, res, fmt, arg...) \
359 dev_dbg((r) ? &(r)->dev : (d)->dev, "%s: %.13s: %#llx @ %#llx " fmt, \
360 (r) ? dev_name((d)->dev) : "", res ? res->name : "null", \
361 (unsigned long long) (res ? resource_size(res) : 0), \
362 (unsigned long long) (res ? res->start : 0), ##arg)
363
Dan Williamsbf9bccc2015-06-17 17:14:46 -0400364#define for_each_dpa_resource(ndd, res) \
365 for (res = (ndd)->dpa.child; res; res = res->sibling)
366
Dan Williams4a826c82015-06-09 16:09:36 -0400367#define for_each_dpa_resource_safe(ndd, res, next) \
368 for (res = (ndd)->dpa.child, next = res ? res->sibling : NULL; \
369 res; res = next, next = next ? next->sibling : NULL)
370
Vishal Verma5212e112015-06-25 04:20:32 -0400371struct nd_percpu_lane {
372 int count;
373 spinlock_t lock;
374};
375
Dan Williamsc4703ce2019-04-30 21:51:21 -0700376enum nd_label_flags {
377 ND_LABEL_REAP,
378};
Dan Williamsae8219f2016-09-19 16:04:21 -0700379struct nd_label_ent {
380 struct list_head list;
Dan Williamsc4703ce2019-04-30 21:51:21 -0700381 unsigned long flags;
Dan Williamsae8219f2016-09-19 16:04:21 -0700382 struct nd_namespace_label *label;
383};
384
385enum nd_mapping_lock_class {
386 ND_MAPPING_CLASS0,
387 ND_MAPPING_UUID_SCAN,
388};
389
Dan Williams44c462e2016-09-19 16:38:50 -0700390struct nd_mapping {
391 struct nvdimm *nvdimm;
Dan Williams44c462e2016-09-19 16:38:50 -0700392 u64 start;
393 u64 size;
Dan Williams401c0a12017-08-04 17:20:16 -0700394 int position;
Dan Williamsae8219f2016-09-19 16:04:21 -0700395 struct list_head labels;
396 struct mutex lock;
Dan Williams44c462e2016-09-19 16:38:50 -0700397 /*
398 * @ndd is for private use at region enable / disable time for
399 * get_ndd() + put_ndd(), all other nd_mapping to ndd
400 * conversions use to_ndd() which respects enabled state of the
401 * nvdimm.
402 */
403 struct nvdimm_drvdata *ndd;
404};
405
Dan Williams1f7df6f2015-06-09 20:13:14 -0400406struct nd_region {
407 struct device dev;
Dan Williams1b40e092015-05-01 13:34:01 -0400408 struct ida ns_ida;
Dan Williams8c2f7e82015-06-25 04:20:04 -0400409 struct ida btt_ida;
Dan Williamse1455742015-07-30 17:57:47 -0400410 struct ida pfn_ida;
Dan Williamscd034122016-03-11 10:15:36 -0800411 struct ida dax_ida;
Dan Williams004f1af2015-08-24 19:20:23 -0400412 unsigned long flags;
Dan Williamsbf9bccc2015-06-17 17:14:46 -0400413 struct device *ns_seed;
Dan Williams8c2f7e82015-06-25 04:20:04 -0400414 struct device *btt_seed;
Dan Williamse1455742015-07-30 17:57:47 -0400415 struct device *pfn_seed;
Dan Williamscd034122016-03-11 10:15:36 -0800416 struct device *dax_seed;
Dan Williams2522afb2020-01-30 12:06:23 -0800417 unsigned long align;
Dan Williams1f7df6f2015-06-09 20:13:14 -0400418 u16 ndr_mappings;
419 u64 ndr_size;
420 u64 ndr_start;
Dan Williams8fc5c732018-11-09 12:43:07 -0800421 int id, num_lanes, ro, numa_node, target_node;
Dan Williams1f7df6f2015-06-09 20:13:14 -0400422 void *provider_data;
Toshi Kani975750a2017-06-12 16:25:11 -0600423 struct kernfs_node *bb_state;
Dave Jiang6a6bef92017-04-07 15:33:20 -0700424 struct badblocks bb;
Dan Williamseaf96152015-05-01 13:11:27 -0400425 struct nd_interleave_set *nd_set;
Vishal Verma5212e112015-06-25 04:20:32 -0400426 struct nd_percpu_lane __percpu *lane;
Pankaj Guptac5d43552019-07-05 19:33:22 +0530427 int (*flush)(struct nd_region *nd_region, struct bio *bio);
Gustavo A. R. Silva91061372020-03-19 18:09:37 -0500428 struct nd_mapping mapping[];
Dan Williams1f7df6f2015-06-09 20:13:14 -0400429};
430
Dan Williams8172db92021-09-08 22:11:42 -0700431static inline bool nsl_validate_nlabel(struct nd_region *nd_region,
432 struct nvdimm_drvdata *ndd,
433 struct nd_namespace_label *nd_label)
434{
Dan Williams5af96832021-09-08 22:12:04 -0700435 if (ndd->cxl)
436 return true;
Dan Williams8172db92021-09-08 22:11:42 -0700437 return nsl_get_nlabel(ndd, nd_label) == nd_region->ndr_mappings;
438}
439
Ross Zwisler047fc8a2015-06-25 04:21:02 -0400440struct nd_blk_region {
441 int (*enable)(struct nvdimm_bus *nvdimm_bus, struct device *dev);
Ross Zwisler047fc8a2015-06-25 04:21:02 -0400442 int (*do_io)(struct nd_blk_region *ndbr, resource_size_t dpa,
443 void *iobuf, u64 len, int rw);
444 void *blk_provider_data;
445 struct nd_region nd_region;
446};
447
Dan Williams4a826c82015-06-09 16:09:36 -0400448/*
449 * Lookup next in the repeating sequence of 01, 10, and 11.
450 */
451static inline unsigned nd_inc_seq(unsigned seq)
452{
453 static const unsigned next[] = { 0, 2, 3, 1 };
454
455 return next[seq & 3];
456}
Dan Williamsf524bf22015-05-30 12:36:02 -0400457
Vishal Verma5212e112015-06-25 04:20:32 -0400458struct btt;
Dan Williams8c2f7e82015-06-25 04:20:04 -0400459struct nd_btt {
460 struct device dev;
461 struct nd_namespace_common *ndns;
Vishal Verma5212e112015-06-25 04:20:32 -0400462 struct btt *btt;
Dan Williams8c2f7e82015-06-25 04:20:04 -0400463 unsigned long lbasize;
Vishal Vermaabe8b4e2016-07-27 16:38:59 -0600464 u64 size;
Dan Williamsd1c6e082021-09-08 22:11:37 -0700465 uuid_t *uuid;
Dan Williams8c2f7e82015-06-25 04:20:04 -0400466 int id;
Vishal Verma14e49452017-06-28 14:25:00 -0600467 int initial_offset;
468 u16 version_major;
469 u16 version_minor;
Dan Williams8c2f7e82015-06-25 04:20:04 -0400470};
471
Dan Williamse1455742015-07-30 17:57:47 -0400472enum nd_pfn_mode {
473 PFN_MODE_NONE,
474 PFN_MODE_RAM,
475 PFN_MODE_PMEM,
476};
477
478struct nd_pfn {
479 int id;
Dan Williamsd1c6e082021-09-08 22:11:37 -0700480 uuid_t *uuid;
Dan Williamse1455742015-07-30 17:57:47 -0400481 struct device dev;
Dan Williams315c5622015-12-10 14:45:23 -0800482 unsigned long align;
Dan Williamse1455742015-07-30 17:57:47 -0400483 unsigned long npfns;
484 enum nd_pfn_mode mode;
485 struct nd_pfn_sb *pfn_sb;
486 struct nd_namespace_common *ndns;
487};
488
Dan Williamscd034122016-03-11 10:15:36 -0800489struct nd_dax {
490 struct nd_pfn nd_pfn;
491};
492
Aneesh Kumar K.V8f4b01f2019-10-31 16:27:41 +0530493static inline u32 nd_info_block_reserve(void)
494{
495 return ALIGN(SZ_8K, PAGE_SIZE);
496}
497
Dan Williams4d88a972015-05-31 14:41:48 -0400498enum nd_async_mode {
499 ND_SYNC,
500 ND_ASYNC,
501};
502
Vishal Verma41cd8b72015-06-25 04:21:52 -0400503int nd_integrity_init(struct gendisk *disk, unsigned long meta_size);
Dan Williamsbf9bccc2015-06-17 17:14:46 -0400504void wait_nvdimm_bus_probe_idle(struct device *dev);
Dan Williams4d88a972015-05-31 14:41:48 -0400505void nd_device_register(struct device *dev);
506void nd_device_unregister(struct device *dev, enum nd_async_mode mode);
Dan Williams71999462016-02-18 10:29:49 -0800507void nd_device_notify(struct device *dev, enum nvdimm_event event);
Dan Williamsd1c6e082021-09-08 22:11:37 -0700508int nd_uuid_store(struct device *dev, uuid_t **uuid_out, const char *buf,
Dan Williamsbf9bccc2015-06-17 17:14:46 -0400509 size_t len);
Dan Williamsb2c48f92017-08-11 17:36:54 -0700510ssize_t nd_size_select_show(unsigned long current_size,
Dan Williams1b40e092015-05-01 13:34:01 -0400511 const unsigned long *supported, char *buf);
Dan Williamsb2c48f92017-08-11 17:36:54 -0700512ssize_t nd_size_select_store(struct device *dev, const char *buf,
513 unsigned long *current_size, const unsigned long *supported);
Dan Williams4d88a972015-05-31 14:41:48 -0400514int __init nvdimm_init(void);
Dan Williams3d880022015-05-31 15:02:11 -0400515int __init nd_region_init(void);
Dan Williamsb3fde742017-06-04 10:18:39 +0900516int __init nd_label_init(void);
Dan Williams4d88a972015-05-31 14:41:48 -0400517void nvdimm_exit(void);
Dan Williams3d880022015-05-31 15:02:11 -0400518void nd_region_exit(void);
Dan Williamsbf9bccc2015-06-17 17:14:46 -0400519struct nvdimm;
Dan Williamsadbb6822019-11-12 17:00:24 -0800520extern const struct attribute_group nd_device_attribute_group;
Dan Williamse2f6a0e2019-11-19 09:51:54 -0800521extern const struct attribute_group nd_numa_attribute_group;
Dan Williamse755799a2019-11-12 17:08:56 -0800522extern const struct attribute_group *nvdimm_bus_attribute_groups[];
Dan Williamsbf9bccc2015-06-17 17:14:46 -0400523struct nvdimm_drvdata *to_ndd(struct nd_mapping *nd_mapping);
Toshi Kaniaee65982016-08-16 13:08:40 -0600524int nvdimm_check_config_data(struct device *dev);
Dan Williams4d88a972015-05-31 14:41:48 -0400525int nvdimm_init_nsarea(struct nvdimm_drvdata *ndd);
526int nvdimm_init_config_data(struct nvdimm_drvdata *ndd);
Alexander Duyck2d657d12018-10-10 16:39:20 -0700527int nvdimm_get_config_data(struct nvdimm_drvdata *ndd, void *buf,
528 size_t offset, size_t len);
Dan Williamsf524bf22015-05-30 12:36:02 -0400529int nvdimm_set_config_data(struct nvdimm_drvdata *ndd, size_t offset,
530 void *buf, size_t len);
Dan Williams59e64732016-03-08 07:16:07 -0800531long nvdimm_clear_poison(struct device *dev, phys_addr_t phys,
532 unsigned int len);
Dan Williamsa0e37452020-01-30 12:06:18 -0800533void nvdimm_set_labeling(struct device *dev);
Dan Williams8f078b32017-05-04 14:01:24 -0700534void nvdimm_set_locked(struct device *dev);
Dan Williamsd34cb802017-09-25 11:01:31 -0700535void nvdimm_clear_locked(struct device *dev);
Dan Williams1cd73862019-01-19 08:45:56 -0800536int nvdimm_security_setup_events(struct device *dev);
Dave Jiang4c6926a2018-12-06 12:40:01 -0800537#if IS_ENABLED(CONFIG_NVDIMM_KEYS)
538int nvdimm_security_unlock(struct device *dev);
539#else
540static inline int nvdimm_security_unlock(struct device *dev)
541{
542 return 0;
543}
544#endif
Dan Williams8c2f7e82015-06-25 04:20:04 -0400545struct nd_btt *to_nd_btt(struct device *dev);
Dan Williamse1455742015-07-30 17:57:47 -0400546
547struct nd_gen_sb {
548 char reserved[SZ_4K - 8];
549 __le64 checksum;
550};
551
552u64 nd_sb_checksum(struct nd_gen_sb *sb);
Dan Williams8c2f7e82015-06-25 04:20:04 -0400553#if IS_ENABLED(CONFIG_BTT)
Dan Williams200c79d2016-03-22 00:22:16 -0700554int nd_btt_probe(struct device *dev, struct nd_namespace_common *ndns);
Dan Williams8c2f7e82015-06-25 04:20:04 -0400555bool is_nd_btt(struct device *dev);
556struct device *nd_btt_create(struct nd_region *nd_region);
557#else
Dan Williamse32bc722016-03-17 18:23:09 -0700558static inline int nd_btt_probe(struct device *dev,
Dan Williams200c79d2016-03-22 00:22:16 -0700559 struct nd_namespace_common *ndns)
Dan Williams8c2f7e82015-06-25 04:20:04 -0400560{
561 return -ENODEV;
562}
563
564static inline bool is_nd_btt(struct device *dev)
565{
566 return false;
567}
568
569static inline struct device *nd_btt_create(struct nd_region *nd_region)
570{
571 return NULL;
572}
Dan Williams8c2f7e82015-06-25 04:20:04 -0400573#endif
Dan Williamse1455742015-07-30 17:57:47 -0400574
575struct nd_pfn *to_nd_pfn(struct device *dev);
576#if IS_ENABLED(CONFIG_NVDIMM_PFN)
Oliver O'Halloran0dd69642017-06-27 19:56:33 +1000577
Aneesh Kumar K.Vf5376692019-09-05 21:16:03 +0530578#define MAX_NVDIMM_ALIGN 4
Oliver O'Halloran0dd69642017-06-27 19:56:33 +1000579
Dan Williams200c79d2016-03-22 00:22:16 -0700580int nd_pfn_probe(struct device *dev, struct nd_namespace_common *ndns);
Dan Williamse1455742015-07-30 17:57:47 -0400581bool is_nd_pfn(struct device *dev);
582struct device *nd_pfn_create(struct nd_region *nd_region);
Dan Williamscd034122016-03-11 10:15:36 -0800583struct device *nd_pfn_devinit(struct nd_pfn *nd_pfn,
584 struct nd_namespace_common *ndns);
Dan Williamsc5ed9262016-05-18 14:50:12 -0700585int nd_pfn_validate(struct nd_pfn *nd_pfn, const char *sig);
Dan Williams78c81cc2019-11-06 19:56:41 -0800586extern const struct attribute_group *nd_pfn_attribute_groups[];
Dan Williamse1455742015-07-30 17:57:47 -0400587#else
Dan Williams200c79d2016-03-22 00:22:16 -0700588static inline int nd_pfn_probe(struct device *dev,
589 struct nd_namespace_common *ndns)
Dan Williamse1455742015-07-30 17:57:47 -0400590{
591 return -ENODEV;
592}
593
594static inline bool is_nd_pfn(struct device *dev)
595{
596 return false;
597}
598
599static inline struct device *nd_pfn_create(struct nd_region *nd_region)
600{
601 return NULL;
602}
Dan Williams32ab0a3f2015-08-01 02:16:37 -0400603
Dan Williamsc5ed9262016-05-18 14:50:12 -0700604static inline int nd_pfn_validate(struct nd_pfn *nd_pfn, const char *sig)
Dan Williams32ab0a3f2015-08-01 02:16:37 -0400605{
606 return -ENODEV;
607}
Dan Williamse1455742015-07-30 17:57:47 -0400608#endif
609
Dan Williamscd034122016-03-11 10:15:36 -0800610struct nd_dax *to_nd_dax(struct device *dev);
611#if IS_ENABLED(CONFIG_NVDIMM_DAX)
Dan Williamsc5ed9262016-05-18 14:50:12 -0700612int nd_dax_probe(struct device *dev, struct nd_namespace_common *ndns);
Dan Williamscd034122016-03-11 10:15:36 -0800613bool is_nd_dax(struct device *dev);
614struct device *nd_dax_create(struct nd_region *nd_region);
615#else
Dan Williamsc5ed9262016-05-18 14:50:12 -0700616static inline int nd_dax_probe(struct device *dev,
617 struct nd_namespace_common *ndns)
618{
619 return -ENODEV;
620}
621
Dan Williamscd034122016-03-11 10:15:36 -0800622static inline bool is_nd_dax(struct device *dev)
623{
624 return false;
625}
626
627static inline struct device *nd_dax_create(struct nd_region *nd_region)
628{
629 return NULL;
630}
631#endif
632
Dan Williams3d880022015-05-31 15:02:11 -0400633int nd_region_to_nstype(struct nd_region *nd_region);
634int nd_region_register_namespaces(struct nd_region *nd_region, int *err);
Dan Williamsc12c48c2017-06-04 10:59:15 +0900635u64 nd_region_interleave_set_cookie(struct nd_region *nd_region,
636 struct nd_namespace_index *nsindex);
Dan Williams86ef58a2017-02-28 18:32:48 -0800637u64 nd_region_interleave_set_altcookie(struct nd_region *nd_region);
Dan Williams3d880022015-05-31 15:02:11 -0400638void nvdimm_bus_lock(struct device *dev);
639void nvdimm_bus_unlock(struct device *dev);
640bool is_nvdimm_bus_locked(struct device *dev);
Christoph Hellwig32f61d62020-09-01 17:57:47 +0200641void nvdimm_check_and_set_ro(struct gendisk *disk);
Dan Williamsbf9bccc2015-06-17 17:14:46 -0400642void nvdimm_drvdata_release(struct kref *kref);
643void put_ndd(struct nvdimm_drvdata *ndd);
Dan Williams4a826c82015-06-09 16:09:36 -0400644int nd_label_reserve_dpa(struct nvdimm_drvdata *ndd);
645void nvdimm_free_dpa(struct nvdimm_drvdata *ndd, struct resource *res);
646struct resource *nvdimm_allocate_dpa(struct nvdimm_drvdata *ndd,
647 struct nd_label_id *label_id, resource_size_t start,
648 resource_size_t n);
Dan Williams8c2f7e82015-06-25 04:20:04 -0400649resource_size_t nvdimm_namespace_capacity(struct nd_namespace_common *ndns);
Dan Williams08e6b3c2018-06-13 09:08:36 -0700650bool nvdimm_namespace_locked(struct nd_namespace_common *ndns);
Dan Williams8c2f7e82015-06-25 04:20:04 -0400651struct nd_namespace_common *nvdimm_namespace_common_probe(struct device *dev);
Vishal Verma5212e112015-06-25 04:20:32 -0400652int nvdimm_namespace_attach_btt(struct nd_namespace_common *ndns);
Dan Williams298f2bc2016-03-15 16:41:04 -0700653int nvdimm_namespace_detach_btt(struct nd_btt *nd_btt);
Vishal Verma5212e112015-06-25 04:20:32 -0400654const char *nvdimm_namespace_disk_name(struct nd_namespace_common *ndns,
655 char *name);
Dan Williamsf979b132017-06-04 12:12:07 +0900656unsigned int pmem_sector_size(struct nd_namespace_common *ndns);
Dan Williamsa4574f62020-10-13 16:50:29 -0700657struct range;
Dan Williamsa3901802016-04-07 20:02:06 -0700658void nvdimm_badblocks_populate(struct nd_region *nd_region,
Dan Williamsa4574f62020-10-13 16:50:29 -0700659 struct badblocks *bb, const struct range *range);
Aneesh Kumar K.V8f4b01f2019-10-31 16:27:41 +0530660int devm_namespace_enable(struct device *dev, struct nd_namespace_common *ndns,
661 resource_size_t size);
662void devm_namespace_disable(struct device *dev,
663 struct nd_namespace_common *ndns);
Dan Williams200c79d2016-03-22 00:22:16 -0700664#if IS_ENABLED(CONFIG_ND_CLAIM)
Aneesh Kumar K.Ve96f0bf2019-09-05 21:15:59 +0530665/* max struct page size independent of kernel config */
666#define MAX_STRUCT_PAGE_SIZE 64
Christoph Hellwige8d51342017-12-29 08:54:05 +0100667int nvdimm_setup_pfn(struct nd_pfn *nd_pfn, struct dev_pagemap *pgmap);
Dan Williams200c79d2016-03-22 00:22:16 -0700668#else
Christoph Hellwige8d51342017-12-29 08:54:05 +0100669static inline int nvdimm_setup_pfn(struct nd_pfn *nd_pfn,
670 struct dev_pagemap *pgmap)
Dan Williamsac515c02016-03-22 00:29:43 -0700671{
Christoph Hellwige8d51342017-12-29 08:54:05 +0100672 return -ENXIO;
Dan Williamsac515c02016-03-22 00:29:43 -0700673}
Dan Williams200c79d2016-03-22 00:22:16 -0700674#endif
Ross Zwisler047fc8a2015-06-25 04:21:02 -0400675int nd_blk_region_init(struct nd_region *nd_region);
Dan Williamse5ae3b22016-06-07 17:00:04 -0700676int nd_region_activate(struct nd_region *nd_region);
Dan Williams200c79d2016-03-22 00:22:16 -0700677static inline bool is_bad_pmem(struct badblocks *bb, sector_t sector,
678 unsigned int len)
679{
680 if (bb->count) {
681 sector_t first_bad;
682 int num_bad;
683
684 return !!badblocks_check(bb, sector, len / 512, &first_bad,
685 &num_bad);
686 }
687
688 return false;
689}
Ross Zwisler047fc8a2015-06-25 04:21:02 -0400690resource_size_t nd_namespace_blk_validate(struct nd_namespace_blk *nsblk);
Dan Williamsd1c6e082021-09-08 22:11:37 -0700691const uuid_t *nd_dev_to_uuid(struct device *dev);
Dan Williams004f1af2015-08-24 19:20:23 -0400692bool pmem_should_map_pages(struct device *dev);
Dan Williams4d88a972015-05-31 14:41:48 -0400693#endif /* __ND_H__ */