blob: d1152d1f9ba0a109eb7117c44922a9e9c8b8a2c2 [file] [log] [blame]
Ben Dooksa21765a2007-02-11 18:31:01 +01001/* linux/arch/arm/plat-s3c24xx/s3c244x.c
Ben Dooks96ce2382006-06-18 23:06:41 +01002 *
3 * Copyright (c) 2004-2006 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk>
5 *
Ben Dookse4d06e32007-02-16 12:12:31 +01006 * Samsung S3C2440 and S3C2442 Mobile CPU support (not S3C2443)
Ben Dooks96ce2382006-06-18 23:06:41 +01007 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13#include <linux/kernel.h>
14#include <linux/types.h>
15#include <linux/interrupt.h>
16#include <linux/list.h>
17#include <linux/timer.h>
18#include <linux/init.h>
Ben Dooksb6d1f542006-12-17 23:22:26 +010019#include <linux/serial_core.h>
Ben Dooks96ce2382006-06-18 23:06:41 +010020#include <linux/platform_device.h>
21#include <linux/sysdev.h>
22#include <linux/clk.h>
Russell Kingfced80c2008-09-06 12:10:45 +010023#include <linux/io.h>
Ben Dooks96ce2382006-06-18 23:06:41 +010024
25#include <asm/mach/arch.h>
26#include <asm/mach/map.h>
27#include <asm/mach/irq.h>
28
Russell Kinga09e64f2008-08-05 16:14:15 +010029#include <mach/hardware.h>
Ben Dooks96ce2382006-06-18 23:06:41 +010030#include <asm/irq.h>
31
Russell Kinga09e64f2008-08-05 16:14:15 +010032#include <mach/regs-clock.h>
Ben Dooksa2b7ba92008-10-07 22:26:09 +010033#include <plat/regs-serial.h>
Russell Kinga09e64f2008-08-05 16:14:15 +010034#include <mach/regs-gpio.h>
35#include <mach/regs-gpioj.h>
36#include <mach/regs-dsc.h>
Ben Dooks96ce2382006-06-18 23:06:41 +010037
Ben Dooksa2b7ba92008-10-07 22:26:09 +010038#include <plat/s3c2410.h>
39#include <plat/s3c2440.h>
Ben Dooks96ce2382006-06-18 23:06:41 +010040#include "s3c244x.h"
Ben Dooksd5120ae2008-10-07 23:09:51 +010041#include <plat/clock.h>
Ben Dooksa2b7ba92008-10-07 22:26:09 +010042#include <plat/devs.h>
43#include <plat/cpu.h>
44#include <plat/pm.h>
Ben Dooks96ce2382006-06-18 23:06:41 +010045
46static struct map_desc s3c244x_iodesc[] __initdata = {
47 IODESC_ENT(CLKPWR),
48 IODESC_ENT(TIMER),
49 IODESC_ENT(WATCHDOG),
Ben Dooks96ce2382006-06-18 23:06:41 +010050};
51
52/* uart initialisation */
53
54void __init s3c244x_init_uarts(struct s3c2410_uartcfg *cfg, int no)
55{
56 s3c24xx_init_uartdevs("s3c2440-uart", s3c2410_uart_resources, cfg, no);
57}
58
Ben Dooks74b265d2008-10-21 14:06:31 +010059void __init s3c244x_map_io(void)
Ben Dooks96ce2382006-06-18 23:06:41 +010060{
61 /* register our io-tables */
62
63 iotable_init(s3c244x_iodesc, ARRAY_SIZE(s3c244x_iodesc));
Ben Dooks96ce2382006-06-18 23:06:41 +010064
65 /* rename any peripherals used differing from the s3c2410 */
66
Ben Dooks90239bb2008-05-21 10:24:17 +010067 s3c_device_sdi.name = "s3c2440-sdi";
Ben Dooks96ce2382006-06-18 23:06:41 +010068 s3c_device_i2c.name = "s3c2440-i2c";
69 s3c_device_nand.name = "s3c2440-nand";
Ben Dooksb8ccca42006-06-27 22:53:03 +010070 s3c_device_usbgadget.name = "s3c2440-usbgadget";
Ben Dooks96ce2382006-06-18 23:06:41 +010071}
72
73void __init s3c244x_init_clocks(int xtal)
74{
75 unsigned long clkdiv;
76 unsigned long camdiv;
77 unsigned long hclk, fclk, pclk;
78 int hdiv = 1;
79
80 /* now we've got our machine bits initialised, work out what
81 * clocks we've got */
82
83 fclk = s3c2410_get_pll(__raw_readl(S3C2410_MPLLCON), xtal) * 2;
84
85 clkdiv = __raw_readl(S3C2410_CLKDIVN);
86 camdiv = __raw_readl(S3C2440_CAMDIVN);
87
88 /* work out clock scalings */
89
90 switch (clkdiv & S3C2440_CLKDIVN_HDIVN_MASK) {
91 case S3C2440_CLKDIVN_HDIVN_1:
92 hdiv = 1;
93 break;
94
95 case S3C2440_CLKDIVN_HDIVN_2:
96 hdiv = 2;
97 break;
98
99 case S3C2440_CLKDIVN_HDIVN_4_8:
100 hdiv = (camdiv & S3C2440_CAMDIVN_HCLK4_HALF) ? 8 : 4;
101 break;
102
103 case S3C2440_CLKDIVN_HDIVN_3_6:
104 hdiv = (camdiv & S3C2440_CAMDIVN_HCLK3_HALF) ? 6 : 3;
105 break;
106 }
107
108 hclk = fclk / hdiv;
109 pclk = hclk / ((clkdiv & S3C2440_CLKDIVN_PDIVN)? 2:1);
110
111 /* print brief summary of clocks, etc */
112
113 printk("S3C244X: core %ld.%03ld MHz, memory %ld.%03ld MHz, peripheral %ld.%03ld MHz\n",
114 print_mhz(fclk), print_mhz(hclk), print_mhz(pclk));
115
116 /* initialise the clocks here, to allow other things like the
117 * console to use them, and to add new ones after the initialisation
118 */
119
120 s3c24xx_setup_clocks(xtal, fclk, hclk, pclk);
Ben Dooks99c13852006-06-22 22:18:20 +0100121 s3c2410_baseclk_add();
Ben Dooks96ce2382006-06-18 23:06:41 +0100122}
123
124#ifdef CONFIG_PM
125
126static struct sleep_save s3c244x_sleep[] = {
127 SAVE_ITEM(S3C2440_DSC0),
128 SAVE_ITEM(S3C2440_DSC1),
129 SAVE_ITEM(S3C2440_GPJDAT),
130 SAVE_ITEM(S3C2440_GPJCON),
131 SAVE_ITEM(S3C2440_GPJUP)
132};
133
134static int s3c244x_suspend(struct sys_device *dev, pm_message_t state)
135{
136 s3c2410_pm_do_save(s3c244x_sleep, ARRAY_SIZE(s3c244x_sleep));
137 return 0;
138}
139
140static int s3c244x_resume(struct sys_device *dev)
141{
142 s3c2410_pm_do_restore(s3c244x_sleep, ARRAY_SIZE(s3c244x_sleep));
143 return 0;
144}
145
146#else
147#define s3c244x_suspend NULL
148#define s3c244x_resume NULL
149#endif
150
151/* Since the S3C2442 and S3C2440 share items, put both sysclasses here */
152
153struct sysdev_class s3c2440_sysclass = {
Kay Sieversaf5ca3f42007-12-20 02:09:39 +0100154 .name = "s3c2440-core",
Ben Dooks96ce2382006-06-18 23:06:41 +0100155 .suspend = s3c244x_suspend,
156 .resume = s3c244x_resume
157};
158
159struct sysdev_class s3c2442_sysclass = {
Kay Sieversaf5ca3f42007-12-20 02:09:39 +0100160 .name = "s3c2442-core",
Ben Dooks96ce2382006-06-18 23:06:41 +0100161 .suspend = s3c244x_suspend,
162 .resume = s3c244x_resume
163};
164
165/* need to register class before we actually register the device, and
166 * we also need to ensure that it has been initialised before any of the
167 * drivers even try to use it (even if not on an s3c2440 based system)
168 * as a driver which may support both 2410 and 2440 may try and use it.
169*/
170
171static int __init s3c2440_core_init(void)
172{
173 return sysdev_class_register(&s3c2440_sysclass);
174}
175
176core_initcall(s3c2440_core_init);
177
178static int __init s3c2442_core_init(void)
179{
180 return sysdev_class_register(&s3c2442_sysclass);
181}
182
183core_initcall(s3c2442_core_init);