blob: 89ebe22a3e27d9b780a3f349d1a6eb4f7707a34c [file] [log] [blame]
Thierry Reding099a6642015-09-09 15:29:22 +02001if ARCH_TEGRA
2
3# 32-bit ARM SoCs
4if ARM
5
6config ARCH_TEGRA_2x_SOC
7 bool "Enable support for Tegra20 family"
8 select ARCH_NEEDS_CPU_IDLE_COUPLED if SMP
9 select ARM_ERRATA_720789
10 select ARM_ERRATA_754327 if SMP
11 select ARM_ERRATA_764369 if SMP
12 select PINCTRL_TEGRA20
13 select PL310_ERRATA_727915 if CACHE_L2X0
14 select PL310_ERRATA_769419 if CACHE_L2X0
Jon Hunter7e10cf72017-03-28 13:42:54 +010015 select SOC_TEGRA_FLOWCTRL
Thierry Reding5e7d4c62017-02-23 18:11:57 +010016 select SOC_TEGRA_PMC
Thierry Reding099a6642015-09-09 15:29:22 +020017 select TEGRA_TIMER
18 help
19 Support for NVIDIA Tegra AP20 and T20 processors, based on the
20 ARM CortexA9MP CPU and the ARM PL310 L2 cache controller
21
22config ARCH_TEGRA_3x_SOC
23 bool "Enable support for Tegra30 family"
24 select ARM_ERRATA_754322
25 select ARM_ERRATA_764369 if SMP
26 select PINCTRL_TEGRA30
27 select PL310_ERRATA_769419 if CACHE_L2X0
Jon Hunter7e10cf72017-03-28 13:42:54 +010028 select SOC_TEGRA_FLOWCTRL
Thierry Reding5e7d4c62017-02-23 18:11:57 +010029 select SOC_TEGRA_PMC
Thierry Reding099a6642015-09-09 15:29:22 +020030 select TEGRA_TIMER
31 help
32 Support for NVIDIA Tegra T30 processor family, based on the
33 ARM CortexA9MP CPU and the ARM PL310 L2 cache controller
34
35config ARCH_TEGRA_114_SOC
36 bool "Enable support for Tegra114 family"
37 select ARM_ERRATA_798181 if SMP
Thierry Reding099a6642015-09-09 15:29:22 +020038 select HAVE_ARM_ARCH_TIMER
39 select PINCTRL_TEGRA114
Jon Hunter7e10cf72017-03-28 13:42:54 +010040 select SOC_TEGRA_FLOWCTRL
Thierry Reding5e7d4c62017-02-23 18:11:57 +010041 select SOC_TEGRA_PMC
Thierry Reding099a6642015-09-09 15:29:22 +020042 select TEGRA_TIMER
43 help
44 Support for NVIDIA Tegra T114 processor family, based on the
45 ARM CortexA15MP CPU
46
47config ARCH_TEGRA_124_SOC
48 bool "Enable support for Tegra124 family"
Thierry Reding099a6642015-09-09 15:29:22 +020049 select HAVE_ARM_ARCH_TIMER
50 select PINCTRL_TEGRA124
Jon Hunter7e10cf72017-03-28 13:42:54 +010051 select SOC_TEGRA_FLOWCTRL
Thierry Reding5e7d4c62017-02-23 18:11:57 +010052 select SOC_TEGRA_PMC
Thierry Reding099a6642015-09-09 15:29:22 +020053 select TEGRA_TIMER
54 help
55 Support for NVIDIA Tegra T124 processor family, based on the
56 ARM CortexA15MP CPU
57
58endif
59
60# 64-bit ARM SoCs
61if ARM64
62
63config ARCH_TEGRA_132_SOC
64 bool "NVIDIA Tegra132 SoC"
65 select PINCTRL_TEGRA124
Jon Hunter1fd09e52017-03-28 13:42:58 +010066 select SOC_TEGRA_FLOWCTRL
Thierry Reding5e7d4c62017-02-23 18:11:57 +010067 select SOC_TEGRA_PMC
Thierry Reding099a6642015-09-09 15:29:22 +020068 help
69 Enable support for NVIDIA Tegra132 SoC, based on the Denver
70 ARMv8 CPU. The Tegra132 SoC is similar to the Tegra124 SoC,
71 but contains an NVIDIA Denver CPU complex in place of
72 Tegra124's "4+1" Cortex-A15 CPU complex.
73
Thierry Reding95445952015-11-16 07:15:55 +010074config ARCH_TEGRA_210_SOC
75 bool "NVIDIA Tegra210 SoC"
76 select PINCTRL_TEGRA210
Jon Hunter1fd09e52017-03-28 13:42:58 +010077 select SOC_TEGRA_FLOWCTRL
Thierry Reding5e7d4c62017-02-23 18:11:57 +010078 select SOC_TEGRA_PMC
Thierry Reding95445952015-11-16 07:15:55 +010079 help
80 Enable support for the NVIDIA Tegra210 SoC. Also known as Tegra X1,
81 the Tegra210 has four Cortex-A57 cores paired with four Cortex-A53
82 cores in a switched configuration. It features a GPU of the Maxwell
83 architecture with support for DX11, SM4, OpenGL 4.5, OpenGL ES 3.1
84 and providing 256 CUDA cores. It supports hardware-accelerated en-
85 and decoding of various video standards including H.265, H.264 and
86 VP8 at 4K resolution and up to 60 fps.
87
88 Besides the multimedia features it also comes with a variety of I/O
89 controllers, such as GPIO, I2C, SPI, SDHCI, PCIe, SATA and XHCI, to
90 name only a few.
91
Joseph Lo25a06442016-07-05 17:04:27 +080092config ARCH_TEGRA_186_SOC
93 bool "NVIDIA Tegra186 SoC"
94 select MAILBOX
95 select TEGRA_BPMP
96 select TEGRA_HSP_MBOX
97 select TEGRA_IVC
Thierry Redingc641ec62017-08-30 12:42:34 +020098 select SOC_TEGRA_PMC
Joseph Lo25a06442016-07-05 17:04:27 +080099 help
100 Enable support for the NVIDIA Tegar186 SoC. The Tegra186 features a
101 combination of Denver and Cortex-A57 CPU cores and a GPU based on
102 the Pascal architecture. It contains an ADSP with a Cortex-A9 CPU
103 used for audio processing, hardware video encoders/decoders with
104 multi-format support, ISP for image capture processing and BPMP for
105 power management.
106
Thierry Reding099a6642015-09-09 15:29:22 +0200107endif
108endif
Thierry Reding5e7d4c62017-02-23 18:11:57 +0100109
Thierry Reding27a03422017-08-17 16:42:17 +0200110config SOC_TEGRA_FUSE
111 def_bool y
112 depends on ARCH_TEGRA
113 select SOC_BUS
114
Jon Hunter7e10cf72017-03-28 13:42:54 +0100115config SOC_TEGRA_FLOWCTRL
116 bool
117
Thierry Reding5e7d4c62017-02-23 18:11:57 +0100118config SOC_TEGRA_PMC
119 bool
120
Thierry Redinge7149a72017-03-29 18:34:52 +0200121config SOC_TEGRA_POWERGATE_BPMP
122 def_bool y
123 depends on PM_GENERIC_DOMAINS
124 depends on TEGRA_BPMP