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Balaji T Ke8deb282009-12-14 00:25:31 +01001/*
2 * twl6030-irq.c - TWL6030 irq support
3 *
4 * Copyright (C) 2005-2009 Texas Instruments, Inc.
5 *
6 * Modifications to defer interrupt handling to a kernel thread:
7 * Copyright (C) 2006 MontaVista Software, Inc.
8 *
9 * Based on tlv320aic23.c:
10 * Copyright (c) by Kai Svahn <kai.svahn@nokia.com>
11 *
12 * Code cleanup and modifications to IRQ handler.
13 * by syed khasim <x0khasim@ti.com>
14 *
15 * TWL6030 specific code and IRQ handling changes by
16 * Jagadeesh Bhaskar Pakaravoor <j-pakaravoor@ti.com>
17 * Balaji T K <balajitk@ti.com>
18 *
19 * This program is free software; you can redistribute it and/or modify
20 * it under the terms of the GNU General Public License as published by
21 * the Free Software Foundation; either version 2 of the License, or
22 * (at your option) any later version.
23 *
24 * This program is distributed in the hope that it will be useful,
25 * but WITHOUT ANY WARRANTY; without even the implied warranty of
26 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
27 * GNU General Public License for more details.
28 *
29 * You should have received a copy of the GNU General Public License
30 * along with this program; if not, write to the Free Software
31 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
32 */
33
34#include <linux/init.h>
35#include <linux/interrupt.h>
36#include <linux/irq.h>
37#include <linux/kthread.h>
38#include <linux/i2c/twl.h>
kishore kadiyala72f2e2c2010-09-24 17:13:20 +000039#include <linux/platform_device.h>
Balaji T Ke8deb282009-12-14 00:25:31 +010040
41/*
42 * TWL6030 (unlike its predecessors, which had two level interrupt handling)
43 * three interrupt registers INT_STS_A, INT_STS_B and INT_STS_C.
44 * It exposes status bits saying who has raised an interrupt. There are
45 * three mask registers that corresponds to these status registers, that
46 * enables/disables these interrupts.
47 *
48 * We set up IRQs starting at a platform-specified base. An interrupt map table,
49 * specifies mapping between interrupt number and the associated module.
50 *
51 */
52
53static int twl6030_interrupt_mapping[24] = {
54 PWR_INTR_OFFSET, /* Bit 0 PWRON */
55 PWR_INTR_OFFSET, /* Bit 1 RPWRON */
56 PWR_INTR_OFFSET, /* Bit 2 BAT_VLOW */
57 RTC_INTR_OFFSET, /* Bit 3 RTC_ALARM */
58 RTC_INTR_OFFSET, /* Bit 4 RTC_PERIOD */
59 HOTDIE_INTR_OFFSET, /* Bit 5 HOT_DIE */
60 SMPSLDO_INTR_OFFSET, /* Bit 6 VXXX_SHORT */
61 SMPSLDO_INTR_OFFSET, /* Bit 7 VMMC_SHORT */
62
63 SMPSLDO_INTR_OFFSET, /* Bit 8 VUSIM_SHORT */
64 BATDETECT_INTR_OFFSET, /* Bit 9 BAT */
65 SIMDETECT_INTR_OFFSET, /* Bit 10 SIM */
66 MMCDETECT_INTR_OFFSET, /* Bit 11 MMC */
67 RSV_INTR_OFFSET, /* Bit 12 Reserved */
68 MADC_INTR_OFFSET, /* Bit 13 GPADC_RT_EOC */
69 MADC_INTR_OFFSET, /* Bit 14 GPADC_SW_EOC */
70 GASGAUGE_INTR_OFFSET, /* Bit 15 CC_AUTOCAL */
71
72 USBOTG_INTR_OFFSET, /* Bit 16 ID_WKUP */
73 USBOTG_INTR_OFFSET, /* Bit 17 VBUS_WKUP */
74 USBOTG_INTR_OFFSET, /* Bit 18 ID */
75 USBOTG_INTR_OFFSET, /* Bit 19 VBUS */
76 CHARGER_INTR_OFFSET, /* Bit 20 CHRG_CTRL */
77 CHARGER_INTR_OFFSET, /* Bit 21 EXT_CHRG */
78 CHARGER_INTR_OFFSET, /* Bit 22 INT_CHRG */
79 RSV_INTR_OFFSET, /* Bit 23 Reserved */
80};
81/*----------------------------------------------------------------------*/
82
83static unsigned twl6030_irq_base;
84
85static struct completion irq_event;
86
87/*
88 * This thread processes interrupts reported by the Primary Interrupt Handler.
89 */
90static int twl6030_irq_thread(void *data)
91{
92 long irq = (long)data;
93 static unsigned i2c_errors;
94 static const unsigned max_i2c_errors = 100;
95 int ret;
96
97 current->flags |= PF_NOFREEZE;
98
99 while (!kthread_should_stop()) {
100 int i;
101 union {
102 u8 bytes[4];
103 u32 int_sts;
104 } sts;
105
106 /* Wait for IRQ, then read PIH irq status (also blocking) */
107 wait_for_completion_interruptible(&irq_event);
108
109 /* read INT_STS_A, B and C in one shot using a burst read */
110 ret = twl_i2c_read(TWL_MODULE_PIH, sts.bytes,
111 REG_INT_STS_A, 3);
112 if (ret) {
113 pr_warning("twl6030: I2C error %d reading PIH ISR\n",
114 ret);
115 if (++i2c_errors >= max_i2c_errors) {
116 printk(KERN_ERR "Maximum I2C error count"
117 " exceeded. Terminating %s.\n",
118 __func__);
119 break;
120 }
121 complete(&irq_event);
122 continue;
123 }
124
125
126
127 sts.bytes[3] = 0; /* Only 24 bits are valid*/
128
129 for (i = 0; sts.int_sts; sts.int_sts >>= 1, i++) {
130 local_irq_disable();
131 if (sts.int_sts & 0x1) {
132 int module_irq = twl6030_irq_base +
133 twl6030_interrupt_mapping[i];
134 struct irq_desc *d = irq_to_desc(module_irq);
135
136 if (!d) {
137 pr_err("twl6030: Invalid SIH IRQ: %d\n",
138 module_irq);
139 return -EINVAL;
140 }
141
142 /* These can't be masked ... always warn
143 * if we get any surprises.
144 */
145 if (d->status & IRQ_DISABLED)
146 note_interrupt(module_irq, d,
147 IRQ_NONE);
148 else
149 d->handle_irq(module_irq, d);
150
151 }
152 local_irq_enable();
153 }
154 ret = twl_i2c_write(TWL_MODULE_PIH, sts.bytes,
155 REG_INT_STS_A, 3); /* clear INT_STS_A */
156 if (ret)
157 pr_warning("twl6030: I2C error in clearing PIH ISR\n");
158
159 enable_irq(irq);
160 }
161
162 return 0;
163}
164
165/*
166 * handle_twl6030_int() is the desc->handle method for the twl6030 interrupt.
167 * This is a chained interrupt, so there is no desc->action method for it.
168 * Now we need to query the interrupt controller in the twl6030 to determine
169 * which module is generating the interrupt request. However, we can't do i2c
170 * transactions in interrupt context, so we must defer that work to a kernel
171 * thread. All we do here is acknowledge and mask the interrupt and wakeup
172 * the kernel thread.
173 */
174static irqreturn_t handle_twl6030_pih(int irq, void *devid)
175{
176 disable_irq_nosync(irq);
177 complete(devid);
178 return IRQ_HANDLED;
179}
180
181/*----------------------------------------------------------------------*/
182
183static inline void activate_irq(int irq)
184{
185#ifdef CONFIG_ARM
186 /* ARM requires an extra step to clear IRQ_NOREQUEST, which it
187 * sets on behalf of every irq_chip. Also sets IRQ_NOPROBE.
188 */
189 set_irq_flags(irq, IRQF_VALID);
190#else
191 /* same effect on other architectures */
192 set_irq_noprobe(irq);
193#endif
194}
195
196/*----------------------------------------------------------------------*/
197
198static unsigned twl6030_irq_next;
199
200/*----------------------------------------------------------------------*/
201int twl6030_interrupt_unmask(u8 bit_mask, u8 offset)
202{
203 int ret;
204 u8 unmask_value;
205 ret = twl_i2c_read_u8(TWL_MODULE_PIH, &unmask_value,
206 REG_INT_STS_A + offset);
207 unmask_value &= (~(bit_mask));
208 ret |= twl_i2c_write_u8(TWL_MODULE_PIH, unmask_value,
209 REG_INT_STS_A + offset); /* unmask INT_MSK_A/B/C */
210 return ret;
211}
212EXPORT_SYMBOL(twl6030_interrupt_unmask);
213
214int twl6030_interrupt_mask(u8 bit_mask, u8 offset)
215{
216 int ret;
217 u8 mask_value;
218 ret = twl_i2c_read_u8(TWL_MODULE_PIH, &mask_value,
219 REG_INT_STS_A + offset);
220 mask_value |= (bit_mask);
221 ret |= twl_i2c_write_u8(TWL_MODULE_PIH, mask_value,
222 REG_INT_STS_A + offset); /* mask INT_MSK_A/B/C */
223 return ret;
224}
225EXPORT_SYMBOL(twl6030_interrupt_mask);
226
kishore kadiyala72f2e2c2010-09-24 17:13:20 +0000227int twl6030_mmc_card_detect_config(void)
228{
229 int ret;
230 u8 reg_val = 0;
231
232 /* Unmasking the Card detect Interrupt line for MMC1 from Phoenix */
233 twl6030_interrupt_unmask(TWL6030_MMCDETECT_INT_MASK,
234 REG_INT_MSK_LINE_B);
235 twl6030_interrupt_unmask(TWL6030_MMCDETECT_INT_MASK,
236 REG_INT_MSK_STS_B);
237 /*
238 * Intially Configuring MMC_CTRL for receving interrupts &
239 * Card status on TWL6030 for MMC1
240 */
241 ret = twl_i2c_read_u8(TWL6030_MODULE_ID0, &reg_val, TWL6030_MMCCTRL);
242 if (ret < 0) {
243 pr_err("twl6030: Failed to read MMCCTRL, error %d\n", ret);
244 return ret;
245 }
246 reg_val &= ~VMMC_AUTO_OFF;
247 reg_val |= SW_FC;
248 ret = twl_i2c_write_u8(TWL6030_MODULE_ID0, reg_val, TWL6030_MMCCTRL);
249 if (ret < 0) {
250 pr_err("twl6030: Failed to write MMCCTRL, error %d\n", ret);
251 return ret;
252 }
253
254 /* Configuring PullUp-PullDown register */
255 ret = twl_i2c_read_u8(TWL6030_MODULE_ID0, &reg_val,
256 TWL6030_CFG_INPUT_PUPD3);
257 if (ret < 0) {
258 pr_err("twl6030: Failed to read CFG_INPUT_PUPD3, error %d\n",
259 ret);
260 return ret;
261 }
262 reg_val &= ~(MMC_PU | MMC_PD);
263 ret = twl_i2c_write_u8(TWL6030_MODULE_ID0, reg_val,
264 TWL6030_CFG_INPUT_PUPD3);
265 if (ret < 0) {
266 pr_err("twl6030: Failed to write CFG_INPUT_PUPD3, error %d\n",
267 ret);
268 return ret;
269 }
270 return 0;
271}
272EXPORT_SYMBOL(twl6030_mmc_card_detect_config);
273
274int twl6030_mmc_card_detect(struct device *dev, int slot)
275{
276 int ret = -EIO;
277 u8 read_reg = 0;
278 struct platform_device *pdev = to_platform_device(dev);
279
280 if (pdev->id) {
281 /* TWL6030 provide's Card detect support for
282 * only MMC1 controller.
283 */
284 pr_err("Unkown MMC controller %d in %s\n", pdev->id, __func__);
285 return ret;
286 }
287 /*
288 * BIT0 of MMC_CTRL on TWL6030 provides card status for MMC1
289 * 0 - Card not present ,1 - Card present
290 */
291 ret = twl_i2c_read_u8(TWL6030_MODULE_ID0, &read_reg,
292 TWL6030_MMCCTRL);
293 if (ret >= 0)
294 ret = read_reg & STS_MMC;
295 return ret;
296}
297EXPORT_SYMBOL(twl6030_mmc_card_detect);
298
Balaji T Ke8deb282009-12-14 00:25:31 +0100299int twl6030_init_irq(int irq_num, unsigned irq_base, unsigned irq_end)
300{
301
302 int status = 0;
303 int i;
304 struct task_struct *task;
305 int ret;
306 u8 mask[4];
307
308 static struct irq_chip twl6030_irq_chip;
309 mask[1] = 0xFF;
310 mask[2] = 0xFF;
311 mask[3] = 0xFF;
312 ret = twl_i2c_write(TWL_MODULE_PIH, &mask[0],
313 REG_INT_MSK_LINE_A, 3); /* MASK ALL INT LINES */
314 ret = twl_i2c_write(TWL_MODULE_PIH, &mask[0],
315 REG_INT_MSK_STS_A, 3); /* MASK ALL INT STS */
316 ret = twl_i2c_write(TWL_MODULE_PIH, &mask[0],
317 REG_INT_STS_A, 3); /* clear INT_STS_A,B,C */
318
319 twl6030_irq_base = irq_base;
320
321 /* install an irq handler for each of the modules;
322 * clone dummy irq_chip since PIH can't *do* anything
323 */
324 twl6030_irq_chip = dummy_irq_chip;
325 twl6030_irq_chip.name = "twl6030";
326 twl6030_irq_chip.set_type = NULL;
327
328 for (i = irq_base; i < irq_end; i++) {
329 set_irq_chip_and_handler(i, &twl6030_irq_chip,
330 handle_simple_irq);
331 activate_irq(i);
332 }
333
334 twl6030_irq_next = i;
335 pr_info("twl6030: %s (irq %d) chaining IRQs %d..%d\n", "PIH",
336 irq_num, irq_base, twl6030_irq_next - 1);
337
338 /* install an irq handler to demultiplex the TWL6030 interrupt */
339 init_completion(&irq_event);
340 task = kthread_run(twl6030_irq_thread, (void *)irq_num, "twl6030-irq");
341 if (IS_ERR(task)) {
342 pr_err("twl6030: could not create irq %d thread!\n", irq_num);
343 status = PTR_ERR(task);
344 goto fail_kthread;
345 }
346
347 status = request_irq(irq_num, handle_twl6030_pih, IRQF_DISABLED,
348 "TWL6030-PIH", &irq_event);
349 if (status < 0) {
350 pr_err("twl6030: could not claim irq%d: %d\n", irq_num, status);
351 goto fail_irq;
352 }
353 return status;
354fail_irq:
355 free_irq(irq_num, &irq_event);
356
357fail_kthread:
358 for (i = irq_base; i < irq_end; i++)
359 set_irq_chip_and_handler(i, NULL, NULL);
360 return status;
361}
362
363int twl6030_exit_irq(void)
364{
365
366 if (twl6030_irq_base) {
367 pr_err("twl6030: can't yet clean up IRQs?\n");
368 return -ENOSYS;
369 }
370 return 0;
371}
372