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review.shift-gmbh.com / SHIFTPHONES / mainline / linux / 712e960f0ee9337f3473ba3de2bcfc7e87b7c5a4 / . / drivers / media / dvb-frontends / cxd2820r_priv.h
blob: a0d53f01a8bfcb6f81d7ce27b8bb3dbc7a36a61f [file] [log] [blame]
Antti Palosaari27cfc852011-04-07 16:27:43 -0300[diff] [blame]1/*
2 * Sony CXD2820R demodulator driver
3 *
4 * Copyright (C) 2010 Antti Palosaari <crope@iki.fi>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License along
17 * with this program; if not, write to the Free Software Foundation, Inc.,
18 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
19 */
20
21
22#ifndef CXD2820R_PRIV_H
23#define CXD2820R_PRIV_H
24
Steve Kerrison9ac51c52011-05-02 18:19:13 -0300[diff] [blame]25#include <linux/dvb/version.h>
Antti Palosaari27cfc852011-04-07 16:27:43 -0300[diff] [blame]26#include "dvb_frontend.h"
27#include "dvb_math.h"
28#include "cxd2820r.h"
Antti Palosaari1e8f31f2012-07-19 21:10:36 -0300[diff] [blame]29#include <linux/gpio.h>
Antti Palosaari27cfc852011-04-07 16:27:43 -0300[diff] [blame]30
Antti Palosaari27cfc852011-04-07 16:27:43 -0300[diff] [blame]31struct reg_val_mask {
32 u32 reg;
33 u8 val;
34 u8 mask;
35};
36
37struct cxd2820r_priv {
38 struct i2c_adapter *i2c;
Manu Abraham14c03862011-11-24 11:59:53 -0300[diff] [blame]39 struct dvb_frontend fe;
Antti Palosaari27cfc852011-04-07 16:27:43 -0300[diff] [blame]40 struct cxd2820r_config cfg;
Antti Palosaari27cfc852011-04-07 16:27:43 -0300[diff] [blame]41
Antti Palosaari1d44ccb2011-05-25 12:42:52 -0300[diff] [blame]42 bool ber_running;
Antti Palosaari27cfc852011-04-07 16:27:43 -0300[diff] [blame]43
44 u8 bank[2];
Antti Palosaari1e8f31f2012-07-19 21:10:36 -0300[diff] [blame]45#define GPIO_COUNT 3
46 u8 gpio[GPIO_COUNT];
47#ifdef CONFIG_GPIOLIB
48 struct gpio_chip gpio_chip;
49#endif
Antti Palosaari2e1ea062011-05-03 20:21:59 -0300[diff] [blame]50
Mauro Carvalho Chehab0df289a2015-06-07 14:53:52 -0300[diff] [blame]51 enum fe_delivery_system delivery_system;
Antti Palosaari1d44ccb2011-05-25 12:42:52 -0300[diff] [blame]52 bool last_tune_failed; /* for switch between T and T2 tune */
Antti Palosaari27cfc852011-04-07 16:27:43 -0300[diff] [blame]53};
54
Steve Kerrison9ac51c52011-05-02 18:19:13 -0300[diff] [blame]55/* cxd2820r_core.c */
56
57extern int cxd2820r_debug;
58
Antti Palosaari1e8f31f2012-07-19 21:10:36 -0300[diff] [blame]59int cxd2820r_gpio(struct dvb_frontend *fe, u8 *gpio);
Steve Kerrison9ac51c52011-05-02 18:19:13 -0300[diff] [blame]60
61int cxd2820r_wr_reg_mask(struct cxd2820r_priv *priv, u32 reg, u8 val,
62 u8 mask);
Antti Palosaari2e1ea062011-05-03 20:21:59 -0300[diff] [blame]63
Steve Kerrison9ac51c52011-05-02 18:19:13 -0300[diff] [blame]64int cxd2820r_wr_regs(struct cxd2820r_priv *priv, u32 reginfo, u8 *val,
65 int len);
Antti Palosaari2e1ea062011-05-03 20:21:59 -0300[diff] [blame]66
Steve Kerrison9ac51c52011-05-02 18:19:13 -0300[diff] [blame]67int cxd2820r_wr_regs(struct cxd2820r_priv *priv, u32 reginfo, u8 *val,
68 int len);
69
70int cxd2820r_rd_regs(struct cxd2820r_priv *priv, u32 reginfo, u8 *val,
71 int len);
72
73int cxd2820r_wr_reg(struct cxd2820r_priv *priv, u32 reg, u8 val);
74
75int cxd2820r_rd_reg(struct cxd2820r_priv *priv, u32 reg, u8 *val);
76
77/* cxd2820r_c.c */
78
Mauro Carvalho Chehabf311f682011-12-30 22:22:10 -0300[diff] [blame]79int cxd2820r_get_frontend_c(struct dvb_frontend *fe);
Steve Kerrison9ac51c52011-05-02 18:19:13 -0300[diff] [blame]80
Mauro Carvalho Chehabf311f682011-12-30 22:22:10 -0300[diff] [blame]81int cxd2820r_set_frontend_c(struct dvb_frontend *fe);
Antti Palosaari2e1ea062011-05-03 20:21:59 -0300[diff] [blame]82
Mauro Carvalho Chehab0df289a2015-06-07 14:53:52 -0300[diff] [blame]83int cxd2820r_read_status_c(struct dvb_frontend *fe, enum fe_status *status);
Steve Kerrison9ac51c52011-05-02 18:19:13 -0300[diff] [blame]84
85int cxd2820r_read_ber_c(struct dvb_frontend *fe, u32 *ber);
86
87int cxd2820r_read_signal_strength_c(struct dvb_frontend *fe, u16 *strength);
88
89int cxd2820r_read_snr_c(struct dvb_frontend *fe, u16 *snr);
90
91int cxd2820r_read_ucblocks_c(struct dvb_frontend *fe, u32 *ucblocks);
92
93int cxd2820r_init_c(struct dvb_frontend *fe);
94
95int cxd2820r_sleep_c(struct dvb_frontend *fe);
96
97int cxd2820r_get_tune_settings_c(struct dvb_frontend *fe,
98 struct dvb_frontend_tune_settings *s);
99
100/* cxd2820r_t.c */
101
Mauro Carvalho Chehabf311f682011-12-30 22:22:10 -0300[diff] [blame]102int cxd2820r_get_frontend_t(struct dvb_frontend *fe);
Steve Kerrison9ac51c52011-05-02 18:19:13 -0300[diff] [blame]103
Mauro Carvalho Chehabf311f682011-12-30 22:22:10 -0300[diff] [blame]104int cxd2820r_set_frontend_t(struct dvb_frontend *fe);
Antti Palosaari2e1ea062011-05-03 20:21:59 -0300[diff] [blame]105
Mauro Carvalho Chehab0df289a2015-06-07 14:53:52 -0300[diff] [blame]106int cxd2820r_read_status_t(struct dvb_frontend *fe, enum fe_status *status);
Steve Kerrison9ac51c52011-05-02 18:19:13 -0300[diff] [blame]107
108int cxd2820r_read_ber_t(struct dvb_frontend *fe, u32 *ber);
109
110int cxd2820r_read_signal_strength_t(struct dvb_frontend *fe, u16 *strength);
111
112int cxd2820r_read_snr_t(struct dvb_frontend *fe, u16 *snr);
113
114int cxd2820r_read_ucblocks_t(struct dvb_frontend *fe, u32 *ucblocks);
115
116int cxd2820r_init_t(struct dvb_frontend *fe);
117
118int cxd2820r_sleep_t(struct dvb_frontend *fe);
119
120int cxd2820r_get_tune_settings_t(struct dvb_frontend *fe,
121 struct dvb_frontend_tune_settings *s);
122
123/* cxd2820r_t2.c */
124
Mauro Carvalho Chehabf311f682011-12-30 22:22:10 -0300[diff] [blame]125int cxd2820r_get_frontend_t2(struct dvb_frontend *fe);
Steve Kerrison9ac51c52011-05-02 18:19:13 -0300[diff] [blame]126
Mauro Carvalho Chehabf311f682011-12-30 22:22:10 -0300[diff] [blame]127int cxd2820r_set_frontend_t2(struct dvb_frontend *fe);
Antti Palosaari2e1ea062011-05-03 20:21:59 -0300[diff] [blame]128
Mauro Carvalho Chehab0df289a2015-06-07 14:53:52 -0300[diff] [blame]129int cxd2820r_read_status_t2(struct dvb_frontend *fe, enum fe_status *status);
Steve Kerrison9ac51c52011-05-02 18:19:13 -0300[diff] [blame]130
131int cxd2820r_read_ber_t2(struct dvb_frontend *fe, u32 *ber);
132
133int cxd2820r_read_signal_strength_t2(struct dvb_frontend *fe, u16 *strength);
134
135int cxd2820r_read_snr_t2(struct dvb_frontend *fe, u16 *snr);
136
137int cxd2820r_read_ucblocks_t2(struct dvb_frontend *fe, u32 *ucblocks);
138
139int cxd2820r_init_t2(struct dvb_frontend *fe);
140
141int cxd2820r_sleep_t2(struct dvb_frontend *fe);
142
143int cxd2820r_get_tune_settings_t2(struct dvb_frontend *fe,
144 struct dvb_frontend_tune_settings *s);
Antti Palosaari2e1ea062011-05-03 20:21:59 -0300[diff] [blame]145
Antti Palosaari27cfc852011-04-07 16:27:43 -0300[diff] [blame]146#endif /* CXD2820R_PRIV_H */