Thomas Gleixner | ec8f24b | 2019-05-19 13:07:45 +0100 | [diff] [blame] | 1 | # SPDX-License-Identifier: GPL-2.0-only |
Olof Johansson | eed6b3e | 2015-07-15 07:10:21 -0400 | [diff] [blame] | 2 | menu "Platform selection" |
| 3 | |
Andreas Färber | c88cc3e | 2017-02-14 22:22:09 +0100 | [diff] [blame] | 4 | config ARCH_ACTIONS |
| 5 | bool "Actions Semi Platforms" |
| 6 | select OWL_TIMER |
Manivannan Sadhasivam | e0c27a1 | 2018-04-04 22:52:51 +0530 | [diff] [blame] | 7 | select PINCTRL |
Andreas Färber | c88cc3e | 2017-02-14 22:22:09 +0100 | [diff] [blame] | 8 | help |
| 9 | This enables support for the Actions Semiconductor S900 SoC family. |
| 10 | |
Andre Przywara | ce3dd55 | 2015-12-22 12:27:47 +0000 | [diff] [blame] | 11 | config ARCH_SUNXI |
| 12 | bool "Allwinner sunxi 64-bit SoC Family" |
Arnd Bergmann | 900a902 | 2017-04-18 15:55:51 +0200 | [diff] [blame] | 13 | select ARCH_HAS_RESET_CONTROLLER |
Suzuki K Poulose | 2348548 | 2016-05-09 23:37:35 +0100 | [diff] [blame] | 14 | select GENERIC_IRQ_CHIP |
Samuel Holland | 4e34614 | 2021-01-17 23:50:33 -0600 | [diff] [blame] | 15 | select IRQ_DOMAIN_HIERARCHY |
| 16 | select IRQ_FASTEOI_HIERARCHY_HANDLERS |
Andre Przywara | d229d20 | 2016-08-08 18:21:43 +0100 | [diff] [blame] | 17 | select PINCTRL |
Arnd Bergmann | 900a902 | 2017-04-18 15:55:51 +0200 | [diff] [blame] | 18 | select RESET_CONTROLLER |
Samuel Holland | cbccad6 | 2021-03-21 23:47:07 -0500 | [diff] [blame] | 19 | select SUN4I_TIMER |
Andre Przywara | ce3dd55 | 2015-12-22 12:27:47 +0000 | [diff] [blame] | 20 | help |
| 21 | This enables support for Allwinner sunxi based SoCs like the A64. |
| 22 | |
Antoine Tenart | e2f0aba | 2016-02-25 11:14:51 +0100 | [diff] [blame] | 23 | config ARCH_ALPINE |
| 24 | bool "Annapurna Labs Alpine platform" |
Sudeep Holla | 5a3f75a | 2016-08-03 15:29:33 +0100 | [diff] [blame] | 25 | select ALPINE_MSI if PCI |
Antoine Tenart | e2f0aba | 2016-02-25 11:14:51 +0100 | [diff] [blame] | 26 | help |
| 27 | This enables support for the Annapurna Labs Alpine |
| 28 | Soc family. |
| 29 | |
Hector Martin | aea5f69 | 2021-01-20 16:51:23 +0900 | [diff] [blame] | 30 | config ARCH_APPLE |
| 31 | bool "Apple Silicon SoC family" |
| 32 | select APPLE_AIC |
| 33 | help |
| 34 | This enables support for Apple's in-house ARM SoC family, starting |
| 35 | with the Apple M1. |
| 36 | |
Eric Anholt | 628d30d | 2016-06-03 08:18:23 +0200 | [diff] [blame] | 37 | config ARCH_BCM2835 |
| 38 | bool "Broadcom BCM2835 family" |
Daniel Lezcano | bb0eb05 | 2017-05-26 19:34:11 +0200 | [diff] [blame] | 39 | select TIMER_OF |
Linus Walleij | da9a1c67 | 2016-04-19 11:08:07 +0200 | [diff] [blame] | 40 | select GPIOLIB |
Eric Anholt | 7a9b6be | 2019-03-08 13:02:16 -0800 | [diff] [blame] | 41 | select MFD_CORE |
Eric Anholt | 628d30d | 2016-06-03 08:18:23 +0200 | [diff] [blame] | 42 | select PINCTRL |
| 43 | select PINCTRL_BCM2835 |
| 44 | select ARM_AMBA |
Stefan Wahren | 781fa0a | 2019-09-30 20:29:12 +0200 | [diff] [blame] | 45 | select ARM_GIC |
Eric Anholt | 628d30d | 2016-06-03 08:18:23 +0200 | [diff] [blame] | 46 | select ARM_TIMER_SP804 |
Eric Anholt | 628d30d | 2016-06-03 08:18:23 +0200 | [diff] [blame] | 47 | help |
Stefan Wahren | 781fa0a | 2019-09-30 20:29:12 +0200 | [diff] [blame] | 48 | This enables support for the Broadcom BCM2837 and BCM2711 SoC. |
| 49 | These SoCs are used in the Raspberry Pi 3 and 4 devices. |
Eric Anholt | 628d30d | 2016-06-03 08:18:23 +0200 | [diff] [blame] | 50 | |
Rafał Miłecki | dccb22d | 2020-11-12 16:08:30 +0100 | [diff] [blame] | 51 | config ARCH_BCM4908 |
| 52 | bool "Broadcom BCM4908 family" |
| 53 | select GPIOLIB |
| 54 | help |
| 55 | This enables support for the Broadcom BCM4906, BCM4908 and |
| 56 | BCM49408 SoCs. These SoCs use Brahma-B53 cores and can be |
| 57 | found in home routers. |
| 58 | |
Ray Jui | 36b7c58 | 2015-07-27 15:42:20 -0700 | [diff] [blame] | 59 | config ARCH_BCM_IPROC |
| 60 | bool "Broadcom iProc SoC Family" |
Anup Patel | 382618b | 2016-02-10 11:40:46 +0530 | [diff] [blame] | 61 | select COMMON_CLK_IPROC |
Linus Walleij | da9a1c67 | 2016-04-19 11:08:07 +0200 | [diff] [blame] | 62 | select GPIOLIB |
Anup Patel | 382618b | 2016-02-10 11:40:46 +0530 | [diff] [blame] | 63 | select PINCTRL |
Ray Jui | 36b7c58 | 2015-07-27 15:42:20 -0700 | [diff] [blame] | 64 | help |
| 65 | This enables support for Broadcom iProc based SoCs |
| 66 | |
Jisheng Zhang | dd40fd9 | 2015-08-03 21:24:45 +0200 | [diff] [blame] | 67 | config ARCH_BERLIN |
| 68 | bool "Marvell Berlin SoC Family" |
| 69 | select DW_APB_ICTL |
Jisheng Zhang | b0fc70c | 2020-10-09 15:08:31 +0800 | [diff] [blame] | 70 | select DW_APB_TIMER_OF |
Linus Walleij | da9a1c67 | 2016-04-19 11:08:07 +0200 | [diff] [blame] | 71 | select GPIOLIB |
Jisheng Zhang | 75d8e1b | 2015-10-16 15:37:09 +0800 | [diff] [blame] | 72 | select PINCTRL |
Jisheng Zhang | dd40fd9 | 2015-08-03 21:24:45 +0200 | [diff] [blame] | 73 | help |
| 74 | This enables support for Marvell Berlin SoC Family |
| 75 | |
Manivannan Sadhasivam | ea367d3 | 2019-01-25 22:05:43 +0530 | [diff] [blame] | 76 | config ARCH_BITMAIN |
| 77 | bool "Bitmain SoC Platforms" |
| 78 | help |
| 79 | This enables support for the Bitmain SoC Family. |
| 80 | |
Florian Fainelli | 37eb56dc | 2016-06-29 12:49:34 -0700 | [diff] [blame] | 81 | config ARCH_BRCMSTB |
| 82 | bool "Broadcom Set-Top-Box SoCs" |
Jim Quinlan | 809eec6 | 2019-05-31 10:22:03 -0700 | [diff] [blame] | 83 | select ARCH_HAS_RESET_CONTROLLER |
Florian Fainelli | 37eb56dc | 2016-06-29 12:49:34 -0700 | [diff] [blame] | 84 | select GENERIC_IRQ_CHIP |
Doug Berger | 724cf0a | 2019-05-31 10:34:38 -0700 | [diff] [blame] | 85 | select PINCTRL |
Florian Fainelli | 37eb56dc | 2016-06-29 12:49:34 -0700 | [diff] [blame] | 86 | help |
| 87 | This enables support for Broadcom's ARMv8 Set Top Box SoCs |
| 88 | |
Olof Johansson | eed6b3e | 2015-07-15 07:10:21 -0400 | [diff] [blame] | 89 | config ARCH_EXYNOS |
Krzysztof Kozlowski | c87b3e9 | 2015-11-16 10:09:13 +0900 | [diff] [blame] | 90 | bool "ARMv8 based Samsung Exynos SoC family" |
Olof Johansson | eed6b3e | 2015-07-15 07:10:21 -0400 | [diff] [blame] | 91 | select COMMON_CLK_SAMSUNG |
Marek Szyprowski | ce96a964 | 2021-12-20 17:50:04 +0100 | [diff] [blame] | 92 | select CLKSRC_EXYNOS_MCT |
Krzysztof Kozlowski | caab3df | 2017-03-14 19:10:28 +0200 | [diff] [blame] | 93 | select EXYNOS_PM_DOMAINS if PM_GENERIC_DOMAINS |
| 94 | select EXYNOS_PMU |
Olof Johansson | eed6b3e | 2015-07-15 07:10:21 -0400 | [diff] [blame] | 95 | select PINCTRL |
| 96 | select PINCTRL_EXYNOS |
Marek Szyprowski | 5220a73 | 2018-10-10 20:25:58 +0200 | [diff] [blame] | 97 | select PM_GENERIC_DOMAINS if PM |
Krzysztof Kozlowski | 3b3428e | 2016-05-10 16:30:54 +0200 | [diff] [blame] | 98 | select SOC_SAMSUNG |
Olof Johansson | eed6b3e | 2015-07-15 07:10:21 -0400 | [diff] [blame] | 99 | help |
Krzysztof Kozlowski | c87b3e9 | 2015-11-16 10:09:13 +0900 | [diff] [blame] | 100 | This enables support for ARMv8 based Samsung Exynos SoC family. |
Olof Johansson | eed6b3e | 2015-07-15 07:10:21 -0400 | [diff] [blame] | 101 | |
Lars Povlsen | 31a91c8 | 2020-06-15 15:32:34 +0200 | [diff] [blame] | 102 | config ARCH_SPARX5 |
| 103 | bool "ARMv8 based Microchip Sparx5 SoC family" |
| 104 | select PINCTRL |
| 105 | select DW_APB_TIMER_OF |
| 106 | help |
| 107 | This enables support for the Microchip Sparx5 ARMv8-based |
| 108 | SoC family of TSN-capable gigabit switches. |
| 109 | |
| 110 | The SparX-5 Ethernet switch family provides a rich set of |
| 111 | switching features such as advanced TCAM-based VLAN and QoS |
| 112 | processing enabling delivery of differentiated services, and |
| 113 | security through TCAM-based frame processing using versatile |
| 114 | content aware processor (VCAP). |
| 115 | |
Nishanth Menon | c772457 | 2018-06-26 11:26:12 -0500 | [diff] [blame] | 116 | config ARCH_K3 |
| 117 | bool "Texas Instruments Inc. K3 multicore SoC architecture" |
| 118 | select PM_GENERIC_DOMAINS if PM |
Lokesh Vutla | 009669e | 2019-04-30 15:42:30 +0530 | [diff] [blame] | 119 | select MAILBOX |
YueHaibing | a6b112b | 2019-05-10 11:52:55 +0800 | [diff] [blame] | 120 | select SOC_TI |
Lokesh Vutla | 009669e | 2019-04-30 15:42:30 +0530 | [diff] [blame] | 121 | select TI_MESSAGE_MANAGER |
| 122 | select TI_SCI_PROTOCOL |
| 123 | select TI_SCI_INTR_IRQCHIP |
| 124 | select TI_SCI_INTA_IRQCHIP |
Grygorii Strashko | ec792ec | 2020-06-19 19:25:27 +0300 | [diff] [blame] | 125 | select TI_K3_SOCINFO |
Nishanth Menon | c772457 | 2018-06-26 11:26:12 -0500 | [diff] [blame] | 126 | help |
| 127 | This enables support for Texas Instruments' K3 multicore SoC |
| 128 | architecture. |
| 129 | |
Bhupesh Sharma | 53a5fde | 2015-10-24 01:01:50 +0530 | [diff] [blame] | 130 | config ARCH_LAYERSCAPE |
| 131 | bool "ARMv8 based Freescale Layerscape SoC family" |
York Sun | eeb3d68 | 2016-08-23 15:14:03 -0700 | [diff] [blame] | 132 | select EDAC_SUPPORT |
Olof Johansson | eed6b3e | 2015-07-15 07:10:21 -0400 | [diff] [blame] | 133 | help |
Bhupesh Sharma | 53a5fde | 2015-10-24 01:01:50 +0530 | [diff] [blame] | 134 | This enables support for the Freescale Layerscape SoC family. |
Olof Johansson | eed6b3e | 2015-07-15 07:10:21 -0400 | [diff] [blame] | 135 | |
Chanho Min | 198ed96 | 2016-04-11 20:54:44 +0900 | [diff] [blame] | 136 | config ARCH_LG1K |
| 137 | bool "LG Electronics LG1K SoC Family" |
| 138 | help |
| 139 | This enables support for LG Electronics LG1K SoC Family |
| 140 | |
Olof Johansson | eed6b3e | 2015-07-15 07:10:21 -0400 | [diff] [blame] | 141 | config ARCH_HISI |
| 142 | bool "Hisilicon SoC Family" |
Leo Yan | 2b905d3 | 2016-01-21 18:53:48 +0800 | [diff] [blame] | 143 | select ARM_TIMER_SP804 |
Sudeep Holla | f9db43b | 2016-08-03 15:29:34 +0100 | [diff] [blame] | 144 | select HISILICON_IRQ_MBIGEN if PCI |
John Stultz | 21adc4d | 2016-08-22 15:45:30 -0700 | [diff] [blame] | 145 | select PINCTRL |
Olof Johansson | eed6b3e | 2015-07-15 07:10:21 -0400 | [diff] [blame] | 146 | help |
| 147 | This enables support for Hisilicon ARMv8 SoC family |
| 148 | |
Daniele Alessandrelli | a6a4abf | 2020-07-17 10:04:10 +0100 | [diff] [blame] | 149 | config ARCH_KEEMBAY |
| 150 | bool "Keem Bay SoC" |
| 151 | help |
| 152 | This enables support for Intel Movidius SoC code-named Keem Bay. |
| 153 | |
Olof Johansson | eed6b3e | 2015-07-15 07:10:21 -0400 | [diff] [blame] | 154 | config ARCH_MEDIATEK |
Sean Wang | 598f9b2 | 2017-10-19 17:52:54 +0800 | [diff] [blame] | 155 | bool "MediaTek SoC Family" |
Olof Johansson | eed6b3e | 2015-07-15 07:10:21 -0400 | [diff] [blame] | 156 | select ARM_GIC |
| 157 | select PINCTRL |
Yingjoe Chen | c050b45 | 2015-10-02 23:05:18 +0800 | [diff] [blame] | 158 | select MTK_TIMER |
Olof Johansson | eed6b3e | 2015-07-15 07:10:21 -0400 | [diff] [blame] | 159 | help |
Sean Wang | 598f9b2 | 2017-10-19 17:52:54 +0800 | [diff] [blame] | 160 | This enables support for MediaTek MT27xx, MT65xx, MT76xx |
| 161 | & MT81xx ARMv8 SoCs |
Olof Johansson | eed6b3e | 2015-07-15 07:10:21 -0400 | [diff] [blame] | 162 | |
Andreas Färber | 451e9e5 | 2016-03-02 03:34:56 +0100 | [diff] [blame] | 163 | config ARCH_MESON |
| 164 | bool "Amlogic Platforms" |
| 165 | help |
Jerome Brunet | b3077ff | 2019-02-08 11:14:04 +0100 | [diff] [blame] | 166 | This enables support for the arm64 based Amlogic SoCs |
| 167 | such as the s905, S905X/D, S912, A113X/D or S905X/D2 |
Andreas Färber | 451e9e5 | 2016-03-02 03:34:56 +0100 | [diff] [blame] | 168 | |
Gregory CLEMENT | b4f596b | 2016-02-02 18:12:37 +0100 | [diff] [blame] | 169 | config ARCH_MVEBU |
| 170 | bool "Marvell EBU SoC Family" |
Thomas Petazzoni | ad87c0f | 2016-04-26 09:58:29 +0200 | [diff] [blame] | 171 | select ARMADA_AP806_SYSCON |
| 172 | select ARMADA_CP110_SYSCON |
Gregory CLEMENT | ff60d83 | 2016-06-10 15:23:29 +0200 | [diff] [blame] | 173 | select ARMADA_37XX_CLK |
Gregory CLEMENT | d2718d1 | 2017-04-05 17:18:03 +0200 | [diff] [blame] | 174 | select GPIOLIB |
| 175 | select GPIOLIB_IRQCHIP |
Thomas Petazzoni | 29ad6bd | 2017-06-21 15:29:16 +0200 | [diff] [blame] | 176 | select MVEBU_GICP |
| 177 | select MVEBU_ICU |
Thomas Petazzoni | b3920b2 | 2016-02-18 17:20:29 +0100 | [diff] [blame] | 178 | select MVEBU_ODMI |
Thomas Petazzoni | 04208a2 | 2016-08-05 16:55:20 +0200 | [diff] [blame] | 179 | select MVEBU_PIC |
Miquel Raynal | 228197c | 2018-10-01 16:13:52 +0200 | [diff] [blame] | 180 | select MVEBU_SEI |
Gregory CLEMENT | d2718d1 | 2017-04-05 17:18:03 +0200 | [diff] [blame] | 181 | select OF_GPIO |
| 182 | select PINCTRL |
| 183 | select PINCTRL_ARMADA_37XX |
Gregory CLEMENT | c4c1436 | 2017-06-12 17:34:55 +0200 | [diff] [blame] | 184 | select PINCTRL_ARMADA_AP806 |
| 185 | select PINCTRL_ARMADA_CP110 |
Gregory CLEMENT | b4f596b | 2016-02-02 18:12:37 +0100 | [diff] [blame] | 186 | help |
Thomas Petazzoni | b3920b2 | 2016-02-18 17:20:29 +0100 | [diff] [blame] | 187 | This enables support for Marvell EBU familly, including: |
| 188 | - Armada 3700 SoC Family |
| 189 | - Armada 7K SoC Family |
| 190 | - Armada 8K SoC Family |
Gregory CLEMENT | b4f596b | 2016-02-02 18:12:37 +0100 | [diff] [blame] | 191 | |
Lucas Stach | 930507c | 2018-12-09 14:26:06 +0000 | [diff] [blame] | 192 | config ARCH_MXC |
| 193 | bool "ARMv8 based NXP i.MX SoC family" |
| 194 | select ARM64_ERRATUM_843419 |
Anders Roxell | a29c782 | 2019-01-15 20:18:39 +0100 | [diff] [blame] | 195 | select ARM64_ERRATUM_845719 if COMPAT |
Lucas Stach | 67b9282 | 2019-01-25 17:20:34 +0100 | [diff] [blame] | 196 | select IMX_GPCV2 |
Lucas Stach | 84a2ab2 | 2019-01-25 17:24:37 +0100 | [diff] [blame] | 197 | select IMX_GPCV2_PM_DOMAINS |
| 198 | select PM |
| 199 | select PM_GENERIC_DOMAINS |
YueHaibing | fafaa0a | 2019-04-24 17:15:17 +0800 | [diff] [blame] | 200 | select SOC_BUS |
Anson Huang | 1991529 | 2019-06-21 15:07:17 +0800 | [diff] [blame] | 201 | select TIMER_IMX_SYS_CTR |
Lucas Stach | 930507c | 2018-12-09 14:26:06 +0000 | [diff] [blame] | 202 | help |
| 203 | This enables support for the ARMv8 based SoCs in the |
| 204 | NXP i.MX family. |
| 205 | |
Olof Johansson | eed6b3e | 2015-07-15 07:10:21 -0400 | [diff] [blame] | 206 | config ARCH_QCOM |
| 207 | bool "Qualcomm Platforms" |
Michael Scott | e19811a | 2016-10-21 10:56:08 -0700 | [diff] [blame] | 208 | select GPIOLIB |
Olof Johansson | eed6b3e | 2015-07-15 07:10:21 -0400 | [diff] [blame] | 209 | select PINCTRL |
| 210 | help |
| 211 | This enables support for the ARMv8 based Qualcomm chipsets. |
| 212 | |
Andreas Färber | 1b0d665 | 2017-02-13 19:45:05 +0100 | [diff] [blame] | 213 | config ARCH_REALTEK |
| 214 | bool "Realtek Platforms" |
Andreas Färber | e3ca955 | 2019-10-20 16:42:41 +0200 | [diff] [blame] | 215 | select RESET_CONTROLLER |
Andreas Färber | 1b0d665 | 2017-02-13 19:45:05 +0100 | [diff] [blame] | 216 | help |
| 217 | This enables support for the ARMv8 based Realtek chipsets, |
| 218 | like the RTD1295. |
| 219 | |
Simon Horman | 26a7e06 | 2015-11-17 02:42:32 +0900 | [diff] [blame] | 220 | config ARCH_RENESAS |
| 221 | bool "Renesas SoC Platforms" |
Takeshi Kihara | 9374eee | 2018-11-15 10:46:49 +0100 | [diff] [blame] | 222 | select GPIOLIB |
Simon Horman | 26a7e06 | 2015-11-17 02:42:32 +0900 | [diff] [blame] | 223 | select PINCTRL |
Geert Uytterhoeven | 8d6799a | 2016-11-14 19:37:08 +0100 | [diff] [blame] | 224 | select SOC_BUS |
Simon Horman | 26a7e06 | 2015-11-17 02:42:32 +0900 | [diff] [blame] | 225 | help |
| 226 | This enables support for the ARMv8 based Renesas SoCs. |
| 227 | |
Geert Uytterhoeven | 0964d66 | 2018-08-28 17:10:11 +0200 | [diff] [blame] | 228 | config ARCH_ROCKCHIP |
| 229 | bool "Rockchip Platforms" |
| 230 | select ARCH_HAS_RESET_CONTROLLER |
Geert Uytterhoeven | 0964d66 | 2018-08-28 17:10:11 +0200 | [diff] [blame] | 231 | select PINCTRL |
Geert Uytterhoeven | 0964d66 | 2018-08-28 17:10:11 +0200 | [diff] [blame] | 232 | select PM |
| 233 | select ROCKCHIP_TIMER |
| 234 | help |
| 235 | This enables support for the ARMv8 based Rockchip chipsets, |
| 236 | like the RK3368. |
| 237 | |
Mihaela Martinas | 3d4e015 | 2019-10-16 15:48:24 +0300 | [diff] [blame] | 238 | config ARCH_S32 |
| 239 | bool "NXP S32 SoC Family" |
| 240 | help |
| 241 | This enables support for the NXP S32 family of processors. |
| 242 | |
Geert Uytterhoeven | 0964d66 | 2018-08-28 17:10:11 +0200 | [diff] [blame] | 243 | config ARCH_SEATTLE |
| 244 | bool "AMD Seattle SoC Family" |
| 245 | help |
| 246 | This enables support for AMD Seattle SOC Family |
| 247 | |
Krzysztof Kozlowski | 910499e | 2021-03-11 16:25:32 +0100 | [diff] [blame] | 248 | config ARCH_INTEL_SOCFPGA |
Krzysztof Kozlowski | 4a9a1a5 | 2021-03-11 16:25:38 +0100 | [diff] [blame] | 249 | bool "Intel's SoCFPGA ARMv8 Families" |
| 250 | help |
| 251 | This enables support for Intel's SoCFPGA ARMv8 families: |
| 252 | Stratix 10 (ex. Altera), Agilex and eASIC N5X. |
Krzysztof Kozlowski | 910499e | 2021-03-11 16:25:32 +0100 | [diff] [blame] | 253 | |
Geert Uytterhoeven | 0964d66 | 2018-08-28 17:10:11 +0200 | [diff] [blame] | 254 | config ARCH_SYNQUACER |
| 255 | bool "Socionext SynQuacer SoC Family" |
| 256 | |
Olof Johansson | eed6b3e | 2015-07-15 07:10:21 -0400 | [diff] [blame] | 257 | config ARCH_TEGRA |
| 258 | bool "NVIDIA Tegra SoC Family" |
| 259 | select ARCH_HAS_RESET_CONTROLLER |
Sameer Pujar | 2e988a8 | 2019-03-22 17:43:03 +0530 | [diff] [blame] | 260 | select ARM_GIC_PM |
Olof Johansson | eed6b3e | 2015-07-15 07:10:21 -0400 | [diff] [blame] | 261 | select CLKSRC_MMIO |
Daniel Lezcano | bb0eb05 | 2017-05-26 19:34:11 +0200 | [diff] [blame] | 262 | select TIMER_OF |
Linus Walleij | da9a1c67 | 2016-04-19 11:08:07 +0200 | [diff] [blame] | 263 | select GPIOLIB |
Olof Johansson | eed6b3e | 2015-07-15 07:10:21 -0400 | [diff] [blame] | 264 | select PINCTRL |
Jon Hunter | 9882324 | 2016-03-30 10:15:16 +0100 | [diff] [blame] | 265 | select PM |
| 266 | select PM_GENERIC_DOMAINS |
Olof Johansson | eed6b3e | 2015-07-15 07:10:21 -0400 | [diff] [blame] | 267 | select RESET_CONTROLLER |
| 268 | help |
| 269 | This enables support for the NVIDIA Tegra SoC family. |
| 270 | |
Olof Johansson | eed6b3e | 2015-07-15 07:10:21 -0400 | [diff] [blame] | 271 | config ARCH_SPRD |
Arnd Bergmann | b5f73d4 | 2020-04-07 16:21:46 +0200 | [diff] [blame] | 272 | bool "Spreadtrum SoC platform" |
Olof Johansson | eed6b3e | 2015-07-15 07:10:21 -0400 | [diff] [blame] | 273 | help |
| 274 | Support for Spreadtrum ARM based SoCs |
| 275 | |
| 276 | config ARCH_THUNDER |
| 277 | bool "Cavium Inc. Thunder SoC Family" |
| 278 | help |
| 279 | This enables support for Cavium's Thunder Family of SoCs. |
| 280 | |
Jayachandran C | 03b6fd5 | 2017-02-05 00:57:02 +0000 | [diff] [blame] | 281 | config ARCH_THUNDER2 |
| 282 | bool "Cavium ThunderX2 Server Processors" |
| 283 | select GPIOLIB |
| 284 | help |
| 285 | This enables support for Cavium's ThunderX2 CN99XX family of |
| 286 | server processors. |
| 287 | |
Masahiro Yamada | 56aaafb | 2015-11-24 18:08:28 +0900 | [diff] [blame] | 288 | config ARCH_UNIPHIER |
| 289 | bool "Socionext UniPhier SoC Family" |
Masahiro Yamada | 7592490 | 2016-10-08 11:25:34 +0900 | [diff] [blame] | 290 | select ARCH_HAS_RESET_CONTROLLER |
Masahiro Yamada | 56aaafb | 2015-11-24 18:08:28 +0900 | [diff] [blame] | 291 | select PINCTRL |
Masahiro Yamada | ab6ab44 | 2018-06-25 12:34:45 +0900 | [diff] [blame] | 292 | select RESET_CONTROLLER |
Masahiro Yamada | 56aaafb | 2015-11-24 18:08:28 +0900 | [diff] [blame] | 293 | help |
| 294 | This enables support for Socionext UniPhier SoC family. |
| 295 | |
Olof Johansson | eed6b3e | 2015-07-15 07:10:21 -0400 | [diff] [blame] | 296 | config ARCH_VEXPRESS |
| 297 | bool "ARMv8 software model (Versatile Express)" |
Linus Walleij | da9a1c67 | 2016-04-19 11:08:07 +0200 | [diff] [blame] | 298 | select GPIOLIB |
Sudeep Holla | 8da7cc0 | 2016-06-20 15:56:09 +0100 | [diff] [blame] | 299 | select PM |
| 300 | select PM_GENERIC_DOMAINS |
Olof Johansson | eed6b3e | 2015-07-15 07:10:21 -0400 | [diff] [blame] | 301 | help |
| 302 | This enables support for the ARMv8 software model (Versatile |
| 303 | Express). |
| 304 | |
Nobuhiro Iwamatsu | 0aa56c7 | 2020-04-28 05:58:48 +0900 | [diff] [blame] | 305 | config ARCH_VISCONTI |
| 306 | bool "Toshiba Visconti SoC Family" |
| 307 | select PINCTRL |
| 308 | select PINCTRL_VISCONTI |
| 309 | help |
| 310 | This enables support for Toshiba Visconti SoCs Family. |
| 311 | |
Zi Shen Lim | 5bfb388 | 2016-02-20 19:49:20 +0530 | [diff] [blame] | 312 | config ARCH_VULCAN |
Jayachandran C | a314520 | 2017-05-22 07:36:04 +0000 | [diff] [blame] | 313 | def_bool n |
Zi Shen Lim | 5bfb388 | 2016-02-20 19:49:20 +0530 | [diff] [blame] | 314 | |
Olof Johansson | eed6b3e | 2015-07-15 07:10:21 -0400 | [diff] [blame] | 315 | config ARCH_XGENE |
| 316 | bool "AppliedMicro X-Gene SOC Family" |
| 317 | help |
| 318 | This enables support for AppliedMicro X-Gene SOC Family |
| 319 | |
Olof Johansson | eed6b3e | 2015-07-15 07:10:21 -0400 | [diff] [blame] | 320 | config ARCH_ZYNQMP |
| 321 | bool "Xilinx ZynqMP Family" |
Olof Johansson | eed6b3e | 2015-07-15 07:10:21 -0400 | [diff] [blame] | 322 | help |
| 323 | This enables support for Xilinx ZynqMP Family |
| 324 | |
| 325 | endmenu |