Thomas Gleixner | 1a59d1b8 | 2019-05-27 08:55:05 +0200 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0-or-later |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2 | /* |
| 3 | * fixup-tb0226.c, The TANBAC TB0226 specific PCI fixups. |
| 4 | * |
Yoichi Yuasa | ada8e95 | 2009-07-03 00:39:38 +0900 | [diff] [blame] | 5 | * Copyright (C) 2002-2005 Yoichi Yuasa <yuasa@linux-mips.org> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 6 | */ |
| 7 | #include <linux/init.h> |
| 8 | #include <linux/pci.h> |
| 9 | |
Yoichi Yuasa | 43d2c4c | 2005-10-14 15:59:00 -0700 | [diff] [blame] | 10 | #include <asm/vr41xx/giu.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 11 | #include <asm/vr41xx/tb0226.h> |
| 12 | |
Manuel Lauss | 8eba365 | 2017-09-12 20:36:28 +0200 | [diff] [blame] | 13 | int pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 14 | { |
| 15 | int irq = -1; |
| 16 | |
| 17 | switch (slot) { |
| 18 | case 12: |
| 19 | vr41xx_set_irq_trigger(GD82559_1_PIN, |
Yoichi Yuasa | 43d2c4c | 2005-10-14 15:59:00 -0700 | [diff] [blame] | 20 | IRQ_TRIGGER_LEVEL, |
| 21 | IRQ_SIGNAL_THROUGH); |
| 22 | vr41xx_set_irq_level(GD82559_1_PIN, IRQ_LEVEL_LOW); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 23 | irq = GD82559_1_IRQ; |
| 24 | break; |
| 25 | case 13: |
| 26 | vr41xx_set_irq_trigger(GD82559_2_PIN, |
Yoichi Yuasa | 43d2c4c | 2005-10-14 15:59:00 -0700 | [diff] [blame] | 27 | IRQ_TRIGGER_LEVEL, |
| 28 | IRQ_SIGNAL_THROUGH); |
| 29 | vr41xx_set_irq_level(GD82559_2_PIN, IRQ_LEVEL_LOW); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 30 | irq = GD82559_2_IRQ; |
| 31 | break; |
| 32 | case 14: |
| 33 | switch (pin) { |
| 34 | case 1: |
| 35 | vr41xx_set_irq_trigger(UPD720100_INTA_PIN, |
Yoichi Yuasa | 43d2c4c | 2005-10-14 15:59:00 -0700 | [diff] [blame] | 36 | IRQ_TRIGGER_LEVEL, |
| 37 | IRQ_SIGNAL_THROUGH); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 38 | vr41xx_set_irq_level(UPD720100_INTA_PIN, |
Yoichi Yuasa | 43d2c4c | 2005-10-14 15:59:00 -0700 | [diff] [blame] | 39 | IRQ_LEVEL_LOW); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 40 | irq = UPD720100_INTA_IRQ; |
| 41 | break; |
| 42 | case 2: |
| 43 | vr41xx_set_irq_trigger(UPD720100_INTB_PIN, |
Yoichi Yuasa | 43d2c4c | 2005-10-14 15:59:00 -0700 | [diff] [blame] | 44 | IRQ_TRIGGER_LEVEL, |
| 45 | IRQ_SIGNAL_THROUGH); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 46 | vr41xx_set_irq_level(UPD720100_INTB_PIN, |
Yoichi Yuasa | 43d2c4c | 2005-10-14 15:59:00 -0700 | [diff] [blame] | 47 | IRQ_LEVEL_LOW); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 48 | irq = UPD720100_INTB_IRQ; |
| 49 | break; |
| 50 | case 3: |
| 51 | vr41xx_set_irq_trigger(UPD720100_INTC_PIN, |
Yoichi Yuasa | 43d2c4c | 2005-10-14 15:59:00 -0700 | [diff] [blame] | 52 | IRQ_TRIGGER_LEVEL, |
| 53 | IRQ_SIGNAL_THROUGH); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 54 | vr41xx_set_irq_level(UPD720100_INTC_PIN, |
Yoichi Yuasa | 43d2c4c | 2005-10-14 15:59:00 -0700 | [diff] [blame] | 55 | IRQ_LEVEL_LOW); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 56 | irq = UPD720100_INTC_IRQ; |
| 57 | break; |
| 58 | default: |
| 59 | break; |
| 60 | } |
| 61 | break; |
| 62 | default: |
| 63 | break; |
| 64 | } |
| 65 | |
| 66 | return irq; |
| 67 | } |
| 68 | |
| 69 | /* Do platform specific device initialization at pci_enable_device() time */ |
| 70 | int pcibios_plat_dev_init(struct pci_dev *dev) |
| 71 | { |
| 72 | return 0; |
| 73 | } |