Vasanth Ananthan | c47d244 | 2012-11-20 21:02:11 +0900 | [diff] [blame] | 1 | * Samsung AHCI SATA Controller |
| 2 | |
| 3 | SATA nodes are defined to describe on-chip Serial ATA controllers. |
| 4 | Each SATA controller should have its own node. |
| 5 | |
| 6 | Required properties: |
Yuvaraj Kumar C D | ba0d7ed | 2014-03-18 07:49:14 +0900 | [diff] [blame] | 7 | - compatible : compatible list, contains "samsung,exynos5-sata" |
| 8 | - interrupts : <interrupt mapping for SATA IRQ> |
| 9 | - reg : <registers mapping> |
| 10 | - samsung,sata-freq : <frequency in MHz> |
Arnd Bergmann | 9dfbff1 | 2014-03-29 02:15:43 +0100 | [diff] [blame] | 11 | - phys : Must contain exactly one entry as specified |
| 12 | in phy-bindings.txt |
| 13 | - phy-names : Must be "sata-phy" |
| 14 | |
| 15 | Optional properties: |
| 16 | - clocks : Must contain an entry for each entry in clock-names. |
| 17 | - clock-names : Shall be "sata" for the external SATA bus clock, |
| 18 | and "sclk_sata" for the internal controller clock. |
Vasanth Ananthan | c47d244 | 2012-11-20 21:02:11 +0900 | [diff] [blame] | 19 | |
| 20 | Example: |
Yuvaraj Kumar C D | ba0d7ed | 2014-03-18 07:49:14 +0900 | [diff] [blame] | 21 | sata@122f0000 { |
| 22 | compatible = "snps,dwc-ahci"; |
| 23 | samsung,sata-freq = <66>; |
| 24 | reg = <0x122f0000 0x1ff>; |
| 25 | interrupts = <0 115 0>; |
| 26 | clocks = <&clock 277>, <&clock 143>; |
| 27 | clock-names = "sata", "sclk_sata"; |
| 28 | phys = <&sata_phy>; |
| 29 | phy-names = "sata-phy"; |
| 30 | }; |