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Thomas Gleixnerec8f24b2019-05-19 13:07:45 +01001# SPDX-License-Identifier: GPL-2.0-only
Ray Juib17f2f92015-03-04 16:35:49 -08002#
3# Broadcom pinctrl drivers
4#
5
6config PINCTRL_BCM281XX
7 bool "Broadcom BCM281xx pinctrl driver"
8 depends on OF && (ARCH_BCM_MOBILE || COMPILE_TEST)
9 select PINMUX
10 select PINCONF
11 select GENERIC_PINCONF
12 select REGMAP_MMIO
Florian Fainelli652da8242015-12-01 17:41:30 -080013 default ARCH_BCM_MOBILE
Ray Juib17f2f92015-03-04 16:35:49 -080014 help
15 Say Y here to support Broadcom BCM281xx pinctrl driver, which is used
16 for the BCM281xx SoC family, including BCM11130, BCM11140, BCM11351,
17 BCM28145, and BCM28155 SoCs. This driver requires the pinctrl
18 framework. GPIO is provided by a separate GPIO driver.
19
20config PINCTRL_BCM2835
Doug Bergeree11f862019-05-09 13:59:54 -070021 bool "Broadcom BCM2835 GPIO (with PINCONF) driver"
YueHaibing138f79d2019-05-28 17:13:04 +080022 depends on OF && (ARCH_BCM2835 || ARCH_BRCMSTB || COMPILE_TEST)
Ray Juib17f2f92015-03-04 16:35:49 -080023 select PINMUX
24 select PINCONF
Matheus Castello0de70492018-04-30 20:42:13 -040025 select GENERIC_PINCONF
Necip Fazil Yildiran513034d2020-09-14 17:40:26 +030026 select GPIOLIB
Linus Walleij85ae9e52016-11-14 18:48:19 +010027 select GPIOLIB_IRQCHIP
Doug Bergeree11f862019-05-09 13:59:54 -070028 default ARCH_BCM2835 || ARCH_BRCMSTB
29 help
30 Say Y here to enable the Broadcom BCM2835 GPIO driver.
Ray Juicbd159e2015-03-04 16:35:51 -080031
Álvaro Fernández Rojas132f9502021-03-24 09:19:05 +010032config PINCTRL_BCM63XX
33 bool
34 select GENERIC_PINCONF
35 select GPIO_REGMAP
36 select PINCONF
37 select PINMUX
38
Álvaro Fernández Rojas9bf34ac2021-03-24 09:19:08 +010039config PINCTRL_BCM6328
40 bool "Broadcom BCM6328 GPIO driver"
41 depends on (BMIPS_GENERIC || COMPILE_TEST)
42 select PINCTRL_BCM63XX
43 default BMIPS_GENERIC
44 help
45 Say Y here to enable the Broadcom BCM6328 GPIO driver.
46
Álvaro Fernández Rojas9494b162021-03-24 09:19:11 +010047config PINCTRL_BCM6358
48 bool "Broadcom BCM6358 GPIO driver"
49 depends on (BMIPS_GENERIC || COMPILE_TEST)
50 select PINCTRL_BCM63XX
51 default BMIPS_GENERIC
52 help
53 Say Y here to enable the Broadcom BCM6358 GPIO driver.
54
Álvaro Fernández Rojas705791e2021-03-24 09:19:14 +010055config PINCTRL_BCM6362
56 bool "Broadcom BCM6362 GPIO driver"
57 depends on (BMIPS_GENERIC || COMPILE_TEST)
58 select PINCTRL_BCM63XX
59 default BMIPS_GENERIC
60 help
61 Say Y here to enable the Broadcom BCM6362 GPIO driver.
62
Pramod Kumar616043d2015-11-19 09:22:19 +053063config PINCTRL_IPROC_GPIO
64 bool "Broadcom iProc GPIO (with PINCONF) driver"
65 depends on OF_GPIO && (ARCH_BCM_IPROC || COMPILE_TEST)
Ray Juib64333c2015-03-09 13:45:00 -070066 select GPIOLIB_IRQCHIP
67 select PINCONF
68 select GENERIC_PINCONF
Pramod Kumar616043d2015-11-19 09:22:19 +053069 default ARCH_BCM_IPROC
Ray Juib64333c2015-03-09 13:45:00 -070070 help
Pramod Kumar616043d2015-11-19 09:22:19 +053071 Say yes here to enable the Broadcom iProc GPIO driver.
72
73 The Broadcom iProc based SoCs- Cygnus, NS2, NSP and Stingray, use
74 same GPIO Controller IP hence this driver could be used for all.
Ray Juib64333c2015-03-09 13:45:00 -070075
76 The Broadcom Cygnus SoC has 3 GPIO controllers including the ASIU
77 GPIO controller (ASIU), the chipCommonG GPIO controller (CCM), and
78 the always-ON GPIO controller (CRMU/AON). All 3 GPIO controllers are
79 supported by this driver.
80
Pramod Kumar616043d2015-11-19 09:22:19 +053081 The Broadcom NSP has two GPIO controllers including the ChipcommonA
82 GPIO, the ChipcommonB GPIO. Later controller is supported by this
83 driver.
84
85 The Broadcom NS2 has two GPIO controller including the CRMU GPIO,
86 the ChipcommonG GPIO. Both controllers are supported by this driver.
87
88 The Broadcom Stingray GPIO controllers are supported by this driver.
89
90 All above SoCs GPIO controllers support basic PINCONF functions such
Ray Juib64333c2015-03-09 13:45:00 -070091 as bias pull up, pull down, and drive strength configurations, when
92 these pins are muxed to GPIO.
93
Pramod Kumar616043d2015-11-19 09:22:19 +053094 It provides the framework where pins from the individual GPIO can be
95 individually muxed to GPIO function, through interaction with the
96 SoCs IOMUX controller. This features could be used only on SoCs which
97 support individual pin muxing.
Ray Juib64333c2015-03-09 13:45:00 -070098
Ray Juicbd159e2015-03-04 16:35:51 -080099config PINCTRL_CYGNUS_MUX
100 bool "Broadcom Cygnus IOMUX driver"
101 depends on (ARCH_BCM_CYGNUS || COMPILE_TEST)
Arnd Bergmann53056f52016-07-15 22:29:54 +0200102 depends on OF
Ray Juicbd159e2015-03-04 16:35:51 -0800103 select PINMUX
104 select GENERIC_PINCONF
105 default ARCH_BCM_CYGNUS
106 help
107 Say yes here to enable the Broadcom Cygnus IOMUX driver.
108
109 The Broadcom Cygnus IOMUX driver supports group based IOMUX
110 configuration, with the exception that certain individual pins
Masahiro Yamada03671052017-02-27 14:29:28 -0800111 can be overridden to GPIO function
Yendapally Reddy Dhananjaya Reddy8bfcbbb2015-12-04 12:11:42 -0500112
Rafał Miłeckic12fb172018-09-26 21:31:03 +0200113config PINCTRL_NS
114 bool "Broadcom Northstar pins driver"
115 depends on OF && (ARCH_BCM_5301X || COMPILE_TEST)
116 select PINMUX
117 select GENERIC_PINCONF
118 default ARCH_BCM_5301X
119 help
120 Say yes here to enable the Broadcom NS SoC pins driver.
121
122 The Broadcom Northstar pins driver supports muxing multi-purpose pins
123 that can be used for various functions (e.g. SPI, I2C, UART) as well
124 as GPIOs.
125
Yendapally Reddy Dhananjaya Reddy8bfcbbb2015-12-04 12:11:42 -0500126config PINCTRL_NSP_GPIO
127 bool "Broadcom NSP GPIO (with PINCONF) driver"
128 depends on OF_GPIO && (ARCH_BCM_NSP || COMPILE_TEST)
129 select GPIOLIB_IRQCHIP
130 select PINCONF
131 select GENERIC_PINCONF
132 default ARCH_BCM_NSP
133 help
134 Say yes here to enable the Broadcom NSP GPIO driver.
135
136 The Broadcom Northstar Plus SoC ChipcommonA GPIO controller is
137 supported by this driver.
138
139 The ChipcommonA GPIO controller support basic PINCONF functions such
140 as bias pull up, pull down, and drive strength configurations, when
141 these pins are muxed to GPIO.
Yendapally Reddy Dhananjaya Reddyb5aa1002016-04-29 08:51:38 -0400142
143config PINCTRL_NS2_MUX
144 bool "Broadcom Northstar2 pinmux driver"
145 depends on OF
146 depends on ARCH_BCM_IPROC || COMPILE_TEST
147 select PINMUX
148 select GENERIC_PINCONF
149 default ARM64 && ARCH_BCM_IPROC
150 help
151 Say yes here to enable the Broadcom NS2 MUX driver.
152
153 The Broadcom Northstar2 IOMUX driver supports group based IOMUX
154 configuration.
Yendapally Reddy Dhananjaya Reddycc4fa832016-06-23 13:35:07 -0400155
156config PINCTRL_NSP_MUX
157 bool "Broadcom NSP IOMUX driver"
158 depends on (ARCH_BCM_NSP || COMPILE_TEST)
Arnd Bergmann53056f52016-07-15 22:29:54 +0200159 depends on OF
Yendapally Reddy Dhananjaya Reddycc4fa832016-06-23 13:35:07 -0400160 select PINMUX
161 select GENERIC_PINCONF
162 default ARCH_BCM_NSP
163 help
164 Say yes here to enable the Broadcom NSP SOC IOMUX driver.
165
166 The Broadcom Northstar Plus IOMUX driver supports pin based IOMUX
167 configuration, with certain individual pins can be overridden
168 to GPIO function.