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Yoshinori Sato618b9022015-01-28 02:52:42 +09001/*
2 * linux/arch/h8300/kernel/cpu/timer/timer8.c
3 *
4 * Yoshinori Sato <ysato@users.sourcefoge.jp>
5 *
6 * 8bit Timer driver
7 *
8 */
9
10#include <linux/errno.h>
Yoshinori Sato618b9022015-01-28 02:52:42 +090011#include <linux/kernel.h>
12#include <linux/interrupt.h>
13#include <linux/init.h>
Yoshinori Sato618b9022015-01-28 02:52:42 +090014#include <linux/clockchips.h>
Yoshinori Sato618b9022015-01-28 02:52:42 +090015#include <linux/clk.h>
16#include <linux/io.h>
17#include <linux/of.h>
Yoshinori Sato4633f4c2015-11-07 01:31:44 +090018#include <linux/of_address.h>
19#include <linux/of_irq.h>
Yoshinori Sato618b9022015-01-28 02:52:42 +090020
Yoshinori Sato618b9022015-01-28 02:52:42 +090021#define _8TCR 0
22#define _8TCSR 2
23#define TCORA 4
24#define TCORB 6
25#define _8TCNT 8
26
Yoshinori Sato618b9022015-01-28 02:52:42 +090027#define FLAG_STARTED (1 << 3)
28
Yoshinori Sato4633f4c2015-11-07 01:31:44 +090029#define SCALE 64
30
Yoshinori Sato618b9022015-01-28 02:52:42 +090031struct timer8_priv {
Yoshinori Sato618b9022015-01-28 02:52:42 +090032 struct clock_event_device ced;
Yoshinori Sato618b9022015-01-28 02:52:42 +090033 unsigned long mapbase;
34 raw_spinlock_t lock;
35 unsigned long flags;
36 unsigned int rate;
37 unsigned int tcora;
38 struct clk *pclk;
39};
40
41static unsigned long timer8_get_counter(struct timer8_priv *p)
42{
43 unsigned long v1, v2, v3;
44 int o1, o2;
45
46 o1 = ctrl_inb(p->mapbase + _8TCSR) & 0x20;
47
48 /* Make sure the timer value is stable. Stolen from acpi_pm.c */
49 do {
50 o2 = o1;
51 v1 = ctrl_inw(p->mapbase + _8TCNT);
52 v2 = ctrl_inw(p->mapbase + _8TCNT);
53 v3 = ctrl_inw(p->mapbase + _8TCNT);
54 o1 = ctrl_inb(p->mapbase + _8TCSR) & 0x20;
55 } while (unlikely((o1 != o2) || (v1 > v2 && v1 < v3)
56 || (v2 > v3 && v2 < v1) || (v3 > v1 && v3 < v2)));
57
58 v2 |= o1 << 10;
59 return v2;
60}
61
62static irqreturn_t timer8_interrupt(int irq, void *dev_id)
63{
64 struct timer8_priv *p = dev_id;
65
66 ctrl_outb(ctrl_inb(p->mapbase + _8TCSR) & ~0x40,
67 p->mapbase + _8TCSR);
Daniel Lezcano7053fda2015-11-08 18:07:38 +010068
Yoshinori Sato618b9022015-01-28 02:52:42 +090069 ctrl_outw(p->tcora, p->mapbase + TCORA);
Daniel Lezcano7053fda2015-11-08 18:07:38 +010070
71 if (clockevent_state_oneshot(&p->ced))
72 ctrl_outw(0x0000, p->mapbase + _8TCR);
73
74 p->ced.event_handler(&p->ced);
Yoshinori Sato618b9022015-01-28 02:52:42 +090075
76 return IRQ_HANDLED;
77}
78
79static void timer8_set_next(struct timer8_priv *p, unsigned long delta)
80{
81 unsigned long flags;
82 unsigned long now;
83
84 raw_spin_lock_irqsave(&p->lock, flags);
85 if (delta >= 0x10000)
Daniel Lezcano8c09b7d2015-11-09 09:02:38 +010086 pr_warn("delta out of range\n");
Yoshinori Sato618b9022015-01-28 02:52:42 +090087 now = timer8_get_counter(p);
88 p->tcora = delta;
89 ctrl_outb(ctrl_inb(p->mapbase + _8TCR) | 0x40, p->mapbase + _8TCR);
90 if (delta > now)
91 ctrl_outw(delta, p->mapbase + TCORA);
92 else
93 ctrl_outw(now + 1, p->mapbase + TCORA);
94
95 raw_spin_unlock_irqrestore(&p->lock, flags);
96}
97
98static int timer8_enable(struct timer8_priv *p)
99{
Yoshinori Sato4633f4c2015-11-07 01:31:44 +0900100 p->rate = clk_get_rate(p->pclk) / SCALE;
Yoshinori Sato618b9022015-01-28 02:52:42 +0900101 ctrl_outw(0xffff, p->mapbase + TCORA);
102 ctrl_outw(0x0000, p->mapbase + _8TCNT);
103 ctrl_outw(0x0c02, p->mapbase + _8TCR);
104
105 return 0;
106}
107
108static int timer8_start(struct timer8_priv *p)
109{
110 int ret = 0;
111 unsigned long flags;
112
113 raw_spin_lock_irqsave(&p->lock, flags);
114
115 if (!(p->flags & FLAG_STARTED))
116 ret = timer8_enable(p);
117
118 if (ret)
119 goto out;
120 p->flags |= FLAG_STARTED;
121
122 out:
123 raw_spin_unlock_irqrestore(&p->lock, flags);
124
125 return ret;
126}
127
128static void timer8_stop(struct timer8_priv *p)
129{
130 unsigned long flags;
131
132 raw_spin_lock_irqsave(&p->lock, flags);
133
134 ctrl_outw(0x0000, p->mapbase + _8TCR);
135
136 raw_spin_unlock_irqrestore(&p->lock, flags);
137}
138
139static inline struct timer8_priv *ced_to_priv(struct clock_event_device *ced)
140{
141 return container_of(ced, struct timer8_priv, ced);
142}
143
Daniel Lezcano1f058d52015-11-08 17:46:54 +0100144static void timer8_clock_event_start(struct timer8_priv *p, unsigned long delta)
Yoshinori Sato618b9022015-01-28 02:52:42 +0900145{
146 struct clock_event_device *ced = &p->ced;
147
148 timer8_start(p);
149
150 ced->shift = 32;
151 ced->mult = div_sc(p->rate, NSEC_PER_SEC, ced->shift);
152 ced->max_delta_ns = clockevent_delta2ns(0xffff, ced);
153 ced->min_delta_ns = clockevent_delta2ns(0x0001, ced);
154
Daniel Lezcano1f058d52015-11-08 17:46:54 +0100155 timer8_set_next(p, delta);
Yoshinori Sato618b9022015-01-28 02:52:42 +0900156}
157
Viresh Kumarfc2b2f52015-07-27 15:02:00 +0530158static int timer8_clock_event_shutdown(struct clock_event_device *ced)
159{
160 timer8_stop(ced_to_priv(ced));
161 return 0;
162}
163
164static int timer8_clock_event_periodic(struct clock_event_device *ced)
Yoshinori Sato618b9022015-01-28 02:52:42 +0900165{
166 struct timer8_priv *p = ced_to_priv(ced);
167
Yoshinori Sato4633f4c2015-11-07 01:31:44 +0900168 pr_info("%s: used for periodic clock events\n", ced->name);
Viresh Kumarfc2b2f52015-07-27 15:02:00 +0530169 timer8_stop(p);
Daniel Lezcano1f058d52015-11-08 17:46:54 +0100170 timer8_clock_event_start(p, (p->rate + HZ/2) / HZ);
Viresh Kumarfc2b2f52015-07-27 15:02:00 +0530171
172 return 0;
173}
174
175static int timer8_clock_event_oneshot(struct clock_event_device *ced)
176{
177 struct timer8_priv *p = ced_to_priv(ced);
178
Yoshinori Sato4633f4c2015-11-07 01:31:44 +0900179 pr_info("%s: used for oneshot clock events\n", ced->name);
Viresh Kumarfc2b2f52015-07-27 15:02:00 +0530180 timer8_stop(p);
Daniel Lezcano1f058d52015-11-08 17:46:54 +0100181 timer8_clock_event_start(p, 0x10000);
Viresh Kumarfc2b2f52015-07-27 15:02:00 +0530182
183 return 0;
Yoshinori Sato618b9022015-01-28 02:52:42 +0900184}
185
186static int timer8_clock_event_next(unsigned long delta,
187 struct clock_event_device *ced)
188{
189 struct timer8_priv *p = ced_to_priv(ced);
190
Viresh Kumarfc2b2f52015-07-27 15:02:00 +0530191 BUG_ON(!clockevent_state_oneshot(ced));
Yoshinori Sato618b9022015-01-28 02:52:42 +0900192 timer8_set_next(p, delta - 1);
193
194 return 0;
195}
196
Yoshinori Sato4633f4c2015-11-07 01:31:44 +0900197static struct timer8_priv timer8_priv = {
198 .ced = {
199 .name = "h8300_8timer",
200 .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
201 .rating = 200,
202 .set_next_event = timer8_clock_event_next,
203 .set_state_shutdown = timer8_clock_event_shutdown,
204 .set_state_periodic = timer8_clock_event_periodic,
205 .set_state_oneshot = timer8_clock_event_oneshot,
206 },
207};
208
209static void __init h8300_8timer_init(struct device_node *node)
Yoshinori Sato618b9022015-01-28 02:52:42 +0900210{
Yoshinori Sato4633f4c2015-11-07 01:31:44 +0900211 void __iomem *base;
Yoshinori Sato618b9022015-01-28 02:52:42 +0900212 int irq;
Yoshinori Sato4633f4c2015-11-07 01:31:44 +0900213 int ret = 0;
214 int rate;
215 struct clk *clk;
Yoshinori Sato618b9022015-01-28 02:52:42 +0900216
Yoshinori Sato4633f4c2015-11-07 01:31:44 +0900217 clk = of_clk_get(node, 0);
218 if (IS_ERR(clk)) {
219 pr_err("failed to get clock for clockevent\n");
220 return;
Yoshinori Sato618b9022015-01-28 02:52:42 +0900221 }
222
Yoshinori Sato4633f4c2015-11-07 01:31:44 +0900223 base = of_iomap(node, 0);
224 if (!base) {
225 pr_err("failed to map registers for clockevent\n");
226 goto free_clk;
227 }
228
229 irq = irq_of_parse_and_map(node, 0);
Daniel Lezcano54a0cd52015-11-08 17:56:18 +0100230 if (!irq) {
Yoshinori Sato4633f4c2015-11-07 01:31:44 +0900231 pr_err("failed to get irq for clockevent\n");
232 goto unmap_reg;
Yoshinori Sato618b9022015-01-28 02:52:42 +0900233 }
234
Yoshinori Sato4633f4c2015-11-07 01:31:44 +0900235 timer8_priv.mapbase = (unsigned long)base;
236 timer8_priv.pclk = clk;
Yoshinori Sato618b9022015-01-28 02:52:42 +0900237
Yoshinori Sato4633f4c2015-11-07 01:31:44 +0900238 ret = request_irq(irq, timer8_interrupt,
239 IRQF_TIMER, timer8_priv.ced.name, &timer8_priv);
Yoshinori Sato618b9022015-01-28 02:52:42 +0900240 if (ret < 0) {
Yoshinori Sato4633f4c2015-11-07 01:31:44 +0900241 pr_err("failed to request irq %d for clockevent\n", irq);
242 goto unmap_reg;
Yoshinori Sato618b9022015-01-28 02:52:42 +0900243 }
Yoshinori Sato4633f4c2015-11-07 01:31:44 +0900244 rate = clk_get_rate(clk) / SCALE;
245 clockevents_config_and_register(&timer8_priv.ced, rate, 1, 0x0000ffff);
246 return;
Yoshinori Sato618b9022015-01-28 02:52:42 +0900247
Yoshinori Sato4633f4c2015-11-07 01:31:44 +0900248unmap_reg:
249 iounmap(base);
250free_clk:
251 clk_put(clk);
Yoshinori Sato618b9022015-01-28 02:52:42 +0900252}
253
Yoshinori Sato4633f4c2015-11-07 01:31:44 +0900254CLOCKSOURCE_OF_DECLARE(h8300_8bit, "renesas,8bit-timer", h8300_8timer_init);