Manjunatha Halli | e8454ff | 2011-01-11 06:35:22 -0300 | [diff] [blame] | 1 | /* |
| 2 | * FM Driver for Connectivity chip of Texas Instruments. |
| 3 | * FM Common module header file |
| 4 | * |
| 5 | * Copyright (C) 2011 Texas Instruments |
| 6 | * |
| 7 | * This program is free software; you can redistribute it and/or modify |
| 8 | * it under the terms of the GNU General Public License version 2 as |
| 9 | * published by the Free Software Foundation. |
| 10 | * |
| 11 | * This program is distributed in the hope that it will be useful, |
| 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 14 | * GNU General Public License for more details. |
| 15 | * |
| 16 | * You should have received a copy of the GNU General Public License |
| 17 | * along with this program; if not, write to the Free Software |
| 18 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
| 19 | * |
| 20 | */ |
| 21 | |
| 22 | #ifndef _FMDRV_COMMON_H |
| 23 | #define _FMDRV_COMMON_H |
| 24 | |
| 25 | #define FM_ST_REG_TIMEOUT msecs_to_jiffies(6000) /* 6 sec */ |
| 26 | #define FM_PKT_LOGICAL_CHAN_NUMBER 0x08 /* Logical channel 8 */ |
| 27 | |
| 28 | #define REG_RD 0x1 |
| 29 | #define REG_WR 0x0 |
| 30 | |
| 31 | struct fm_reg_table { |
| 32 | u8 opcode; |
| 33 | u8 type; |
| 34 | u8 *name; |
| 35 | }; |
| 36 | |
| 37 | #define STEREO_GET 0 |
| 38 | #define RSSI_LVL_GET 1 |
| 39 | #define IF_COUNT_GET 2 |
| 40 | #define FLAG_GET 3 |
| 41 | #define RDS_SYNC_GET 4 |
| 42 | #define RDS_DATA_GET 5 |
| 43 | #define FREQ_SET 10 |
| 44 | #define AF_FREQ_SET 11 |
| 45 | #define MOST_MODE_SET 12 |
| 46 | #define MOST_BLEND_SET 13 |
| 47 | #define DEMPH_MODE_SET 14 |
| 48 | #define SEARCH_LVL_SET 15 |
| 49 | #define BAND_SET 16 |
| 50 | #define MUTE_STATUS_SET 17 |
| 51 | #define RDS_PAUSE_LVL_SET 18 |
| 52 | #define RDS_PAUSE_DUR_SET 19 |
| 53 | #define RDS_MEM_SET 20 |
| 54 | #define RDS_BLK_B_SET 21 |
| 55 | #define RDS_MSK_B_SET 22 |
| 56 | #define RDS_PI_MASK_SET 23 |
| 57 | #define RDS_PI_SET 24 |
| 58 | #define RDS_SYSTEM_SET 25 |
| 59 | #define INT_MASK_SET 26 |
| 60 | #define SEARCH_DIR_SET 27 |
| 61 | #define VOLUME_SET 28 |
| 62 | #define AUDIO_ENABLE_SET 29 |
| 63 | #define PCM_MODE_SET 30 |
| 64 | #define I2S_MODE_CONFIG_SET 31 |
| 65 | #define POWER_SET 32 |
| 66 | #define INTX_CONFIG_SET 33 |
| 67 | #define PULL_EN_SET 34 |
| 68 | #define HILO_SET 35 |
| 69 | #define SWITCH2FREF 36 |
| 70 | #define FREQ_DRIFT_REPORT 37 |
| 71 | |
| 72 | #define PCE_GET 40 |
| 73 | #define FIRM_VER_GET 41 |
| 74 | #define ASIC_VER_GET 42 |
| 75 | #define ASIC_ID_GET 43 |
| 76 | #define MAN_ID_GET 44 |
| 77 | #define TUNER_MODE_SET 45 |
| 78 | #define STOP_SEARCH 46 |
| 79 | #define RDS_CNTRL_SET 47 |
| 80 | |
| 81 | #define WRITE_HARDWARE_REG 100 |
| 82 | #define CODE_DOWNLOAD 101 |
| 83 | #define RESET 102 |
| 84 | |
| 85 | #define FM_POWER_MODE 254 |
| 86 | #define FM_INTERRUPT 255 |
| 87 | |
| 88 | /* Transmitter API */ |
| 89 | |
| 90 | #define CHANL_SET 55 |
| 91 | #define CHANL_BW_SET 56 |
| 92 | #define REF_SET 57 |
| 93 | #define POWER_ENB_SET 90 |
| 94 | #define POWER_ATT_SET 58 |
| 95 | #define POWER_LEV_SET 59 |
| 96 | #define AUDIO_DEV_SET 60 |
| 97 | #define PILOT_DEV_SET 61 |
| 98 | #define RDS_DEV_SET 62 |
| 99 | #define TX_BAND_SET 65 |
| 100 | #define PUPD_SET 91 |
| 101 | #define AUDIO_IO_SET 63 |
| 102 | #define PREMPH_SET 64 |
| 103 | #define MONO_SET 66 |
| 104 | #define MUTE 92 |
| 105 | #define MPX_LMT_ENABLE 67 |
| 106 | #define PI_SET 93 |
| 107 | #define ECC_SET 69 |
| 108 | #define PTY 70 |
| 109 | #define AF 71 |
| 110 | #define DISPLAY_MODE 74 |
| 111 | #define RDS_REP_SET 77 |
| 112 | #define RDS_CONFIG_DATA_SET 98 |
| 113 | #define RDS_DATA_SET 99 |
| 114 | #define RDS_DATA_ENB 94 |
| 115 | #define TA_SET 78 |
| 116 | #define TP_SET 79 |
| 117 | #define DI_SET 80 |
| 118 | #define MS_SET 81 |
| 119 | #define PS_SCROLL_SPEED 82 |
| 120 | #define TX_AUDIO_LEVEL_TEST 96 |
| 121 | #define TX_AUDIO_LEVEL_TEST_THRESHOLD 73 |
| 122 | #define TX_AUDIO_INPUT_LEVEL_RANGE_SET 54 |
| 123 | #define RX_ANTENNA_SELECT 87 |
| 124 | #define I2C_DEV_ADDR_SET 86 |
| 125 | #define REF_ERR_CALIB_PARAM_SET 88 |
| 126 | #define REF_ERR_CALIB_PERIODICITY_SET 89 |
| 127 | #define SOC_INT_TRIGGER 52 |
| 128 | #define SOC_AUDIO_PATH_SET 83 |
| 129 | #define SOC_PCMI_OVERRIDE 84 |
| 130 | #define SOC_I2S_OVERRIDE 85 |
| 131 | #define RSSI_BLOCK_SCAN_FREQ_SET 95 |
| 132 | #define RSSI_BLOCK_SCAN_START 97 |
| 133 | #define RSSI_BLOCK_SCAN_DATA_GET 5 |
| 134 | #define READ_FMANT_TUNE_VALUE 104 |
| 135 | |
| 136 | /* SKB helpers */ |
| 137 | struct fm_skb_cb { |
| 138 | __u8 fm_op; |
| 139 | struct completion *completion; |
| 140 | }; |
| 141 | |
| 142 | #define fm_cb(skb) ((struct fm_skb_cb *)(skb->cb)) |
| 143 | |
| 144 | /* FM Channel-8 command message format */ |
| 145 | struct fm_cmd_msg_hdr { |
| 146 | __u8 hdr; /* Logical Channel-8 */ |
| 147 | __u8 len; /* Number of bytes follows */ |
| 148 | __u8 op; /* FM Opcode */ |
| 149 | __u8 rd_wr; /* Read/Write command */ |
| 150 | __u8 dlen; /* Length of payload */ |
| 151 | } __attribute__ ((packed)); |
| 152 | |
| 153 | #define FM_CMD_MSG_HDR_SIZE 5 /* sizeof(struct fm_cmd_msg_hdr) */ |
| 154 | |
| 155 | /* FM Channel-8 event messgage format */ |
| 156 | struct fm_event_msg_hdr { |
| 157 | __u8 header; /* Logical Channel-8 */ |
| 158 | __u8 len; /* Number of bytes follows */ |
| 159 | __u8 status; /* Event status */ |
| 160 | __u8 num_fm_hci_cmds; /* Number of pkts the host allowed to send */ |
| 161 | __u8 op; /* FM Opcode */ |
| 162 | __u8 rd_wr; /* Read/Write command */ |
| 163 | __u8 dlen; /* Length of payload */ |
| 164 | } __attribute__ ((packed)); |
| 165 | |
| 166 | #define FM_EVT_MSG_HDR_SIZE 7 /* sizeof(struct fm_event_msg_hdr) */ |
| 167 | |
| 168 | /* TI's magic number in firmware file */ |
| 169 | #define FM_FW_FILE_HEADER_MAGIC 0x42535442 |
| 170 | |
| 171 | #define FM_ENABLE 1 |
| 172 | #define FM_DISABLE 0 |
| 173 | |
| 174 | /* FLAG_GET register bits */ |
| 175 | #define FM_FR_EVENT (1 << 0) |
| 176 | #define FM_BL_EVENT (1 << 1) |
| 177 | #define FM_RDS_EVENT (1 << 2) |
| 178 | #define FM_BBLK_EVENT (1 << 3) |
| 179 | #define FM_LSYNC_EVENT (1 << 4) |
| 180 | #define FM_LEV_EVENT (1 << 5) |
| 181 | #define FM_IFFR_EVENT (1 << 6) |
| 182 | #define FM_PI_EVENT (1 << 7) |
| 183 | #define FM_PD_EVENT (1 << 8) |
| 184 | #define FM_STIC_EVENT (1 << 9) |
| 185 | #define FM_MAL_EVENT (1 << 10) |
| 186 | #define FM_POW_ENB_EVENT (1 << 11) |
| 187 | |
| 188 | /* |
| 189 | * Firmware files of FM. ASIC ID and ASIC version will be appened to this, |
| 190 | * later. |
| 191 | */ |
| 192 | #define FM_FMC_FW_FILE_START ("fmc_ch8") |
| 193 | #define FM_RX_FW_FILE_START ("fm_rx_ch8") |
| 194 | #define FM_TX_FW_FILE_START ("fm_tx_ch8") |
| 195 | |
| 196 | #define FM_UNDEFINED_FREQ 0xFFFFFFFF |
| 197 | |
| 198 | /* Band types */ |
| 199 | #define FM_BAND_EUROPE_US 0 |
| 200 | #define FM_BAND_JAPAN 1 |
| 201 | |
| 202 | /* Seek directions */ |
| 203 | #define FM_SEARCH_DIRECTION_DOWN 0 |
| 204 | #define FM_SEARCH_DIRECTION_UP 1 |
| 205 | |
| 206 | /* Tunner modes */ |
| 207 | #define FM_TUNER_STOP_SEARCH_MODE 0 |
| 208 | #define FM_TUNER_PRESET_MODE 1 |
| 209 | #define FM_TUNER_AUTONOMOUS_SEARCH_MODE 2 |
| 210 | #define FM_TUNER_AF_JUMP_MODE 3 |
| 211 | |
| 212 | /* Min and Max volume */ |
| 213 | #define FM_RX_VOLUME_MIN 0 |
| 214 | #define FM_RX_VOLUME_MAX 70 |
| 215 | |
| 216 | /* Volume gain step */ |
| 217 | #define FM_RX_VOLUME_GAIN_STEP 0x370 |
| 218 | |
| 219 | /* Mute modes */ |
| 220 | #define FM_MUTE_ON 0 |
| 221 | #define FM_MUTE_OFF 1 |
| 222 | #define FM_MUTE_ATTENUATE 2 |
| 223 | |
| 224 | #define FM_RX_UNMUTE_MODE 0x00 |
| 225 | #define FM_RX_RF_DEP_MODE 0x01 |
| 226 | #define FM_RX_AC_MUTE_MODE 0x02 |
| 227 | #define FM_RX_HARD_MUTE_LEFT_MODE 0x04 |
| 228 | #define FM_RX_HARD_MUTE_RIGHT_MODE 0x08 |
| 229 | #define FM_RX_SOFT_MUTE_FORCE_MODE 0x10 |
| 230 | |
| 231 | /* RF dependent mute mode */ |
| 232 | #define FM_RX_RF_DEPENDENT_MUTE_ON 1 |
| 233 | #define FM_RX_RF_DEPENDENT_MUTE_OFF 0 |
| 234 | |
| 235 | /* RSSI threshold min and max */ |
| 236 | #define FM_RX_RSSI_THRESHOLD_MIN -128 |
| 237 | #define FM_RX_RSSI_THRESHOLD_MAX 127 |
| 238 | |
| 239 | /* Stereo/Mono mode */ |
| 240 | #define FM_STEREO_MODE 0 |
| 241 | #define FM_MONO_MODE 1 |
| 242 | #define FM_STEREO_SOFT_BLEND 1 |
| 243 | |
| 244 | /* FM RX De-emphasis filter modes */ |
| 245 | #define FM_RX_EMPHASIS_FILTER_50_USEC 0 |
| 246 | #define FM_RX_EMPHASIS_FILTER_75_USEC 1 |
| 247 | |
| 248 | /* FM RDS modes */ |
| 249 | #define FM_RDS_DISABLE 0 |
| 250 | #define FM_RDS_ENABLE 1 |
| 251 | |
| 252 | #define FM_NO_PI_CODE 0 |
| 253 | |
| 254 | /* FM and RX RDS block enable/disable */ |
| 255 | #define FM_RX_PWR_SET_FM_ON_RDS_OFF 0x1 |
| 256 | #define FM_RX_PWR_SET_FM_AND_RDS_BLK_ON 0x3 |
| 257 | #define FM_RX_PWR_SET_FM_AND_RDS_BLK_OFF 0x0 |
| 258 | |
| 259 | /* RX RDS */ |
| 260 | #define FM_RX_RDS_FLUSH_FIFO 0x1 |
| 261 | #define FM_RX_RDS_FIFO_THRESHOLD 64 /* tuples */ |
| 262 | #define FM_RDS_BLK_SIZE 3 /* 3 bytes */ |
| 263 | |
| 264 | /* RDS block types */ |
| 265 | #define FM_RDS_BLOCK_A 0 |
| 266 | #define FM_RDS_BLOCK_B 1 |
| 267 | #define FM_RDS_BLOCK_C 2 |
| 268 | #define FM_RDS_BLOCK_Ctag 3 |
| 269 | #define FM_RDS_BLOCK_D 4 |
| 270 | #define FM_RDS_BLOCK_E 5 |
| 271 | |
| 272 | #define FM_RDS_BLK_IDX_A 0 |
| 273 | #define FM_RDS_BLK_IDX_B 1 |
| 274 | #define FM_RDS_BLK_IDX_C 2 |
| 275 | #define FM_RDS_BLK_IDX_D 3 |
| 276 | #define FM_RDS_BLK_IDX_UNKNOWN 0xF0 |
| 277 | |
| 278 | #define FM_RDS_STATUS_ERR_MASK 0x18 |
| 279 | |
| 280 | /* |
| 281 | * Represents an RDS group type & version. |
| 282 | * There are 15 groups, each group has 2 versions: A and B. |
| 283 | */ |
| 284 | #define FM_RDS_GROUP_TYPE_MASK_0A ((unsigned long)1<<0) |
| 285 | #define FM_RDS_GROUP_TYPE_MASK_0B ((unsigned long)1<<1) |
| 286 | #define FM_RDS_GROUP_TYPE_MASK_1A ((unsigned long)1<<2) |
| 287 | #define FM_RDS_GROUP_TYPE_MASK_1B ((unsigned long)1<<3) |
| 288 | #define FM_RDS_GROUP_TYPE_MASK_2A ((unsigned long)1<<4) |
| 289 | #define FM_RDS_GROUP_TYPE_MASK_2B ((unsigned long)1<<5) |
| 290 | #define FM_RDS_GROUP_TYPE_MASK_3A ((unsigned long)1<<6) |
| 291 | #define FM_RDS_GROUP_TYPE_MASK_3B ((unsigned long)1<<7) |
| 292 | #define FM_RDS_GROUP_TYPE_MASK_4A ((unsigned long)1<<8) |
| 293 | #define FM_RDS_GROUP_TYPE_MASK_4B ((unsigned long)1<<9) |
| 294 | #define FM_RDS_GROUP_TYPE_MASK_5A ((unsigned long)1<<10) |
| 295 | #define FM_RDS_GROUP_TYPE_MASK_5B ((unsigned long)1<<11) |
| 296 | #define FM_RDS_GROUP_TYPE_MASK_6A ((unsigned long)1<<12) |
| 297 | #define FM_RDS_GROUP_TYPE_MASK_6B ((unsigned long)1<<13) |
| 298 | #define FM_RDS_GROUP_TYPE_MASK_7A ((unsigned long)1<<14) |
| 299 | #define FM_RDS_GROUP_TYPE_MASK_7B ((unsigned long)1<<15) |
| 300 | #define FM_RDS_GROUP_TYPE_MASK_8A ((unsigned long)1<<16) |
| 301 | #define FM_RDS_GROUP_TYPE_MASK_8B ((unsigned long)1<<17) |
| 302 | #define FM_RDS_GROUP_TYPE_MASK_9A ((unsigned long)1<<18) |
| 303 | #define FM_RDS_GROUP_TYPE_MASK_9B ((unsigned long)1<<19) |
| 304 | #define FM_RDS_GROUP_TYPE_MASK_10A ((unsigned long)1<<20) |
| 305 | #define FM_RDS_GROUP_TYPE_MASK_10B ((unsigned long)1<<21) |
| 306 | #define FM_RDS_GROUP_TYPE_MASK_11A ((unsigned long)1<<22) |
| 307 | #define FM_RDS_GROUP_TYPE_MASK_11B ((unsigned long)1<<23) |
| 308 | #define FM_RDS_GROUP_TYPE_MASK_12A ((unsigned long)1<<24) |
| 309 | #define FM_RDS_GROUP_TYPE_MASK_12B ((unsigned long)1<<25) |
| 310 | #define FM_RDS_GROUP_TYPE_MASK_13A ((unsigned long)1<<26) |
| 311 | #define FM_RDS_GROUP_TYPE_MASK_13B ((unsigned long)1<<27) |
| 312 | #define FM_RDS_GROUP_TYPE_MASK_14A ((unsigned long)1<<28) |
| 313 | #define FM_RDS_GROUP_TYPE_MASK_14B ((unsigned long)1<<29) |
| 314 | #define FM_RDS_GROUP_TYPE_MASK_15A ((unsigned long)1<<30) |
| 315 | #define FM_RDS_GROUP_TYPE_MASK_15B ((unsigned long)1<<31) |
| 316 | |
| 317 | /* RX Alternate Frequency info */ |
| 318 | #define FM_RDS_MIN_AF 1 |
| 319 | #define FM_RDS_MAX_AF 204 |
| 320 | #define FM_RDS_MAX_AF_JAPAN 140 |
| 321 | #define FM_RDS_1_AF_FOLLOWS 225 |
| 322 | #define FM_RDS_25_AF_FOLLOWS 249 |
| 323 | |
| 324 | /* RDS system type (RDS/RBDS) */ |
| 325 | #define FM_RDS_SYSTEM_RDS 0 |
| 326 | #define FM_RDS_SYSTEM_RBDS 1 |
| 327 | |
| 328 | /* AF on/off */ |
| 329 | #define FM_RX_RDS_AF_SWITCH_MODE_ON 1 |
| 330 | #define FM_RX_RDS_AF_SWITCH_MODE_OFF 0 |
| 331 | |
| 332 | /* Retry count when interrupt process goes wrong */ |
| 333 | #define FM_IRQ_TIMEOUT_RETRY_MAX 5 /* 5 times */ |
| 334 | |
| 335 | /* Audio IO set values */ |
| 336 | #define FM_RX_AUDIO_ENABLE_I2S 0x01 |
| 337 | #define FM_RX_AUDIO_ENABLE_ANALOG 0x02 |
| 338 | #define FM_RX_AUDIO_ENABLE_I2S_AND_ANALOG 0x03 |
| 339 | #define FM_RX_AUDIO_ENABLE_DISABLE 0x00 |
| 340 | |
| 341 | /* HI/LO set values */ |
| 342 | #define FM_RX_IFFREQ_TO_HI_SIDE 0x0 |
| 343 | #define FM_RX_IFFREQ_TO_LO_SIDE 0x1 |
| 344 | #define FM_RX_IFFREQ_HILO_AUTOMATIC 0x2 |
| 345 | |
| 346 | /* |
| 347 | * Default RX mode configuration. Chip will be configured |
| 348 | * with this default values after loading RX firmware. |
| 349 | */ |
| 350 | #define FM_DEFAULT_RX_VOLUME 10 |
| 351 | #define FM_DEFAULT_RSSI_THRESHOLD 3 |
| 352 | |
| 353 | /* Range for TX power level in units for dB/uV */ |
| 354 | #define FM_PWR_LVL_LOW 91 |
| 355 | #define FM_PWR_LVL_HIGH 122 |
| 356 | |
| 357 | /* Chip specific default TX power level value */ |
| 358 | #define FM_PWR_LVL_DEF 4 |
| 359 | |
| 360 | /* FM TX Pre-emphasis filter values */ |
| 361 | #define FM_TX_PREEMPH_OFF 1 |
| 362 | #define FM_TX_PREEMPH_50US 0 |
| 363 | #define FM_TX_PREEMPH_75US 2 |
| 364 | |
Lucas De Marchi | 25985ed | 2011-03-30 22:57:33 -0300 | [diff] [blame] | 365 | /* FM TX antenna impedance values */ |
Manjunatha Halli | e8454ff | 2011-01-11 06:35:22 -0300 | [diff] [blame] | 366 | #define FM_TX_ANT_IMP_50 0 |
| 367 | #define FM_TX_ANT_IMP_200 1 |
| 368 | #define FM_TX_ANT_IMP_500 2 |
| 369 | |
| 370 | /* Functions exported by FM common sub-module */ |
Xi Wang | a612780 | 2011-12-02 06:01:11 -0300 | [diff] [blame] | 371 | int fmc_prepare(struct fmdev *); |
| 372 | int fmc_release(struct fmdev *); |
Manjunatha Halli | e8454ff | 2011-01-11 06:35:22 -0300 | [diff] [blame] | 373 | |
| 374 | void fmc_update_region_info(struct fmdev *, u8); |
Xi Wang | a612780 | 2011-12-02 06:01:11 -0300 | [diff] [blame] | 375 | int fmc_send_cmd(struct fmdev *, u8, u16, |
Manjunatha Halli | e8454ff | 2011-01-11 06:35:22 -0300 | [diff] [blame] | 376 | void *, unsigned int, void *, int *); |
Xi Wang | a612780 | 2011-12-02 06:01:11 -0300 | [diff] [blame] | 377 | int fmc_is_rds_data_available(struct fmdev *, struct file *, |
Manjunatha Halli | e8454ff | 2011-01-11 06:35:22 -0300 | [diff] [blame] | 378 | struct poll_table_struct *); |
Xi Wang | a612780 | 2011-12-02 06:01:11 -0300 | [diff] [blame] | 379 | int fmc_transfer_rds_from_internal_buff(struct fmdev *, struct file *, |
Manjunatha Halli | e8454ff | 2011-01-11 06:35:22 -0300 | [diff] [blame] | 380 | u8 __user *, size_t); |
| 381 | |
Xi Wang | a612780 | 2011-12-02 06:01:11 -0300 | [diff] [blame] | 382 | int fmc_set_freq(struct fmdev *, u32); |
| 383 | int fmc_set_mode(struct fmdev *, u8); |
| 384 | int fmc_set_region(struct fmdev *, u8); |
| 385 | int fmc_set_mute_mode(struct fmdev *, u8); |
| 386 | int fmc_set_stereo_mono(struct fmdev *, u16); |
| 387 | int fmc_set_rds_mode(struct fmdev *, u8); |
Manjunatha Halli | e8454ff | 2011-01-11 06:35:22 -0300 | [diff] [blame] | 388 | |
Xi Wang | a612780 | 2011-12-02 06:01:11 -0300 | [diff] [blame] | 389 | int fmc_get_freq(struct fmdev *, u32 *); |
| 390 | int fmc_get_region(struct fmdev *, u8 *); |
| 391 | int fmc_get_mode(struct fmdev *, u8 *); |
Manjunatha Halli | e8454ff | 2011-01-11 06:35:22 -0300 | [diff] [blame] | 392 | |
| 393 | /* |
| 394 | * channel spacing |
| 395 | */ |
| 396 | #define FM_CHANNEL_SPACING_50KHZ 1 |
| 397 | #define FM_CHANNEL_SPACING_100KHZ 2 |
| 398 | #define FM_CHANNEL_SPACING_200KHZ 4 |
| 399 | #define FM_FREQ_MUL 50 |
| 400 | |
| 401 | #endif |
| 402 | |