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Roland Dreieraef9ec32005-11-02 14:07:13 -08001/*
2 * Copyright (c) 2005 Cisco Systems. All rights reserved.
3 *
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
9 *
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
12 * conditions are met:
13 *
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
16 * disclaimer.
17 *
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and/or other materials
21 * provided with the distribution.
22 *
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30 * SOFTWARE.
Roland Dreieraef9ec32005-11-02 14:07:13 -080031 */
32
33#ifndef IB_SRP_H
34#define IB_SRP_H
35
36#include <linux/types.h>
37#include <linux/list.h>
Ingo Molnar8e9e5f4f2006-01-30 15:21:21 -080038#include <linux/mutex.h>
Roland Dreiercf368712006-03-24 15:47:26 -080039#include <linux/scatterlist.h>
Roland Dreieraef9ec32005-11-02 14:07:13 -080040
41#include <scsi/scsi_host.h>
42#include <scsi/scsi_cmnd.h>
43
44#include <rdma/ib_verbs.h>
45#include <rdma/ib_sa.h>
46#include <rdma/ib_cm.h>
Bart Van Assche19f31342018-01-22 14:27:12 -080047#include <rdma/rdma_cm.h>
Roland Dreieraef9ec32005-11-02 14:07:13 -080048
49enum {
50 SRP_PATH_REC_TIMEOUT_MS = 1000,
51 SRP_ABORT_TIMEOUT_MS = 5000,
52
53 SRP_PORT_REDIRECT = 1,
54 SRP_DLID_REDIRECT = 2,
David Dillow9fe4bcf2008-01-08 17:08:52 -050055 SRP_STALE_CONN = 3,
Roland Dreieraef9ec32005-11-02 14:07:13 -080056
Vu Pham74b0a152006-06-17 20:37:32 -070057 SRP_DEF_SG_TABLESIZE = 12,
Roland Dreieraef9ec32005-11-02 14:07:13 -080058
Bart Van Assche4d73f952013-10-26 14:40:37 +020059 SRP_DEFAULT_QUEUE_SIZE = 1 << 6,
Bart Van Asschedd5e6e32010-08-30 19:27:20 +000060 SRP_RSP_SQ_SIZE = 1,
Bart Van Asschedd5e6e32010-08-30 19:27:20 +000061 SRP_TSK_MGMT_SQ_SIZE = 1,
Bart Van Assche4d73f952013-10-26 14:40:37 +020062 SRP_DEFAULT_CMD_SQ_SIZE = SRP_DEFAULT_QUEUE_SIZE - SRP_RSP_SQ_SIZE -
63 SRP_TSK_MGMT_SQ_SIZE,
Roland Dreieraef9ec32005-11-02 14:07:13 -080064
David Dillowf8b6e312010-11-26 13:02:21 -050065 SRP_TAG_NO_REQ = ~0U,
66 SRP_TAG_TSK_MGMT = 1U << 31,
Roland Dreierf5358a12006-06-17 20:37:29 -070067
Bart Van Assche52ede082014-05-20 15:07:45 +020068 SRP_MAX_PAGES_PER_MR = 512,
Bart Van Assche482fffc2018-12-17 13:20:35 -080069
70 SRP_MAX_ADD_CDB_LEN = 16,
Bart Van Assche882981f2018-12-17 13:20:39 -080071
72 SRP_MAX_IMM_SGE = 2,
73 SRP_MAX_SGE = SRP_MAX_IMM_SGE + 1,
74 /*
75 * Choose the immediate data offset such that a 32 byte CDB still fits.
76 */
77 SRP_IMM_DATA_OFFSET = sizeof(struct srp_cmd) +
78 SRP_MAX_ADD_CDB_LEN +
79 sizeof(struct srp_imm_buf),
Roland Dreieraef9ec32005-11-02 14:07:13 -080080};
81
Roland Dreieraef9ec32005-11-02 14:07:13 -080082enum srp_target_state {
Bart Van Assche34aa6542014-10-30 14:47:22 +010083 SRP_TARGET_SCANNING,
Roland Dreieraef9ec32005-11-02 14:07:13 -080084 SRP_TARGET_LIVE,
Bart Van Asscheef6c49d2011-12-26 16:49:18 +000085 SRP_TARGET_REMOVED,
Roland Dreieraef9ec32005-11-02 14:07:13 -080086};
87
David Dillowbb125882010-10-08 14:40:47 -040088enum srp_iu_type {
89 SRP_IU_CMD,
90 SRP_IU_TSK_MGMT,
91 SRP_IU_RSP,
David Dillow8cba2072007-12-19 17:08:43 -050092};
93
Bart Van Assche5cfb1782014-05-20 15:08:34 +020094/*
95 * @mr_page_mask: HCA memory registration page mask.
96 * @mr_page_size: HCA memory registration page size.
Max Gurtovoyf273ad42020-05-28 16:45:44 -030097 * @mr_max_size: Maximum size in bytes of a single FR registration request.
Bart Van Assche5cfb1782014-05-20 15:08:34 +020098 */
Roland Dreierf5358a12006-06-17 20:37:29 -070099struct srp_device {
100 struct list_head dev_list;
Roland Dreieraef9ec32005-11-02 14:07:13 -0800101 struct ib_device *dev;
Roland Dreieraef9ec32005-11-02 14:07:13 -0800102 struct ib_pd *pd;
Bart Van Asschecee687b2017-10-11 10:27:28 -0700103 u32 global_rkey;
Bart Van Assche52ede082014-05-20 15:07:45 +0200104 u64 mr_page_mask;
105 int mr_page_size;
106 int mr_max_size;
107 int max_pages_per_mr;
Bart Van Assche5cfb1782014-05-20 15:08:34 +0200108 bool has_fr;
109 bool use_fast_reg;
Roland Dreierf5358a12006-06-17 20:37:29 -0700110};
111
112struct srp_host {
Greg Kroah-Hartman05321932008-03-06 00:13:36 +0100113 struct srp_device *srp_dev;
Roland Dreierf5358a12006-06-17 20:37:29 -0700114 u8 port;
Tony Jonesee959b02008-02-22 00:13:36 +0100115 struct device dev;
Roland Dreieraef9ec32005-11-02 14:07:13 -0800116 struct list_head target_list;
Matthew Wilcoxb3589fd2006-06-17 20:37:30 -0700117 spinlock_t target_lock;
Roland Dreieraef9ec32005-11-02 14:07:13 -0800118 struct completion released;
119 struct list_head list;
Bart Van Assche2d7091b2014-03-14 13:52:45 +0100120 struct mutex add_target_mutex;
Roland Dreieraef9ec32005-11-02 14:07:13 -0800121};
122
123struct srp_request {
Roland Dreieraef9ec32005-11-02 14:07:13 -0800124 struct scsi_cmnd *scmnd;
125 struct srp_iu *cmd;
Max Gurtovoyf273ad42020-05-28 16:45:44 -0300126 struct srp_fr_desc **fr_list;
David Dillowc07d4242011-01-16 13:57:10 -0500127 struct srp_direct_buf *indirect_desc;
128 dma_addr_t indirect_dma_addr;
Bart Van Assche52ede082014-05-20 15:07:45 +0200129 short nmdesc;
Christoph Hellwig1dc7b1f2015-11-13 12:57:13 +0100130 struct ib_cqe reg_cqe;
Roland Dreieraef9ec32005-11-02 14:07:13 -0800131};
132
Bart Van Assche509c07b2014-10-30 14:48:30 +0100133/**
134 * struct srp_rdma_ch
135 * @comp_vector: Completion vector used by this RDMA channel.
Bart Van Assche513d5642018-12-17 13:20:38 -0800136 * @max_it_iu_len: Maximum initiator-to-target information unit length.
Bart Van Assche4f6d4982018-12-17 13:20:37 -0800137 * @max_ti_iu_len: Maximum target-to-initiator information unit length.
Bart Van Assche509c07b2014-10-30 14:48:30 +0100138 */
139struct srp_rdma_ch {
David Dillow9af76272010-11-26 15:34:46 -0500140 /* These are RW in the hot path, and commonly used together */
141 struct list_head free_tx;
David Dillow9af76272010-11-26 15:34:46 -0500142 spinlock_t lock;
143 s32 req_lim;
144
145 /* These are read-only in the hot path */
Bart Van Assche509c07b2014-10-30 14:48:30 +0100146 struct srp_target_port *target ____cacheline_aligned_in_smp;
147 struct ib_cq *send_cq;
David Dillow9af76272010-11-26 15:34:46 -0500148 struct ib_cq *recv_cq;
149 struct ib_qp *qp;
Max Gurtovoyf273ad42020-05-28 16:45:44 -0300150 struct srp_fr_pool *fr_pool;
Bart Van Assche513d5642018-12-17 13:20:38 -0800151 uint32_t max_it_iu_len;
Bart Van Assche4f6d4982018-12-17 13:20:37 -0800152 uint32_t max_ti_iu_len;
Bart Van Asschebf583472019-09-30 16:16:59 -0700153 u8 max_imm_sge;
Bart Van Assche882981f2018-12-17 13:20:39 -0800154 bool use_imm_data;
Bart Van Assche509c07b2014-10-30 14:48:30 +0100155
156 /* Everything above this point is used in the hot path of
157 * command processing. Try to keep them packed into cachelines.
158 */
159
160 struct completion done;
161 int status;
162
Bart Van Assche19f31342018-01-22 14:27:12 -0800163 union {
164 struct ib_cm {
165 struct sa_path_rec path;
166 struct ib_sa_query *path_query;
167 int path_query_id;
168 struct ib_cm_id *cm_id;
169 } ib_cm;
170 struct rdma_cm {
171 struct rdma_cm_id *cm_id;
172 } rdma_cm;
173 };
Bart Van Assche509c07b2014-10-30 14:48:30 +0100174
Bart Van Assche509c07b2014-10-30 14:48:30 +0100175 struct srp_iu **tx_ring;
176 struct srp_iu **rx_ring;
Bart Van Assche509c07b2014-10-30 14:48:30 +0100177 int comp_vector;
178
Bart Van Assche0a6fdbd2017-02-14 10:56:31 -0800179 u64 tsk_mgmt_tag;
Bart Van Assche509c07b2014-10-30 14:48:30 +0100180 struct completion tsk_mgmt_done;
181 u8 tsk_mgmt_status;
Bart Van Asschec014c8c2015-05-18 13:23:57 +0200182 bool connected;
Bart Van Assche509c07b2014-10-30 14:48:30 +0100183};
184
185/**
186 * struct srp_target_port
187 * @comp_vector: Completion vector used by the first RDMA channel created for
188 * this target port.
189 */
190struct srp_target_port {
191 /* read and written in the hot path */
192 spinlock_t lock;
193
Bart Van Assche509c07b2014-10-30 14:48:30 +0100194 /* read only in the hot path */
Bart Van Asschecee687b2017-10-11 10:27:28 -0700195 u32 global_rkey;
Bart Van Assched92c0da2014-10-06 17:14:36 +0200196 struct srp_rdma_ch *ch;
Bart Van Assche19f31342018-01-22 14:27:12 -0800197 struct net *net;
Bart Van Assched92c0da2014-10-06 17:14:36 +0200198 u32 ch_count;
David Dillow9af76272010-11-26 15:34:46 -0500199 u32 lkey;
David Dillow9af76272010-11-26 15:34:46 -0500200 enum srp_target_state state;
Honggang Li547ed332019-09-28 01:43:51 +0800201 uint32_t max_it_iu_size;
David Dillow49248642011-01-14 18:23:24 -0500202 unsigned int cmd_sg_cnt;
David Dillowc07d4242011-01-16 13:57:10 -0500203 unsigned int indirect_size;
204 bool allow_ext_sg;
David Dillow9af76272010-11-26 15:34:46 -0500205
Bart Van Assche509c07b2014-10-30 14:48:30 +0100206 /* other member variables */
Bart Van Assche747fe002014-10-30 14:48:05 +0100207 union ib_gid sgid;
Roland Dreieraef9ec32005-11-02 14:07:13 -0800208 __be64 id_ext;
209 __be64 ioc_guid;
Ishai Rabinovitz01cb9bc2006-10-04 15:28:56 +0200210 __be64 initiator_ext;
Ramachandra K0c0450db2006-06-17 20:37:38 -0700211 u16 io_class;
Roland Dreieraef9ec32005-11-02 14:07:13 -0800212 struct srp_host *srp_host;
213 struct Scsi_Host *scsi_host;
Bart Van Assche9dd69a62013-10-26 14:32:30 +0200214 struct srp_rport *rport;
Roland Dreieraef9ec32005-11-02 14:07:13 -0800215 char target_name[32];
216 unsigned int scsi_id;
David Dillowc07d4242011-01-16 13:57:10 -0500217 unsigned int sg_tablesize;
Bart Van Asscheb0780ee2018-01-22 14:27:13 -0800218 unsigned int target_can_queue;
Bart Van Asschefa9863f2016-04-22 14:13:57 -0700219 int mr_pool_size;
Bart Van Assche509c5f32016-05-12 10:50:35 -0700220 int mr_per_cmd;
Bart Van Assche4d73f952013-10-26 14:40:37 +0200221 int queue_size;
Bart Van Assche4b5e5f42013-06-28 14:57:42 +0200222 int comp_vector;
Vu Pham7bb312e2013-10-26 14:31:27 +0200223 int tl_retry_count;
Roland Dreieraef9ec32005-11-02 14:07:13 -0800224
Bart Van Assche19f31342018-01-22 14:27:12 -0800225 bool using_rdma_cm;
226
227 union {
228 struct {
229 __be64 service_id;
230 union ib_gid orig_dgid;
231 __be16 pkey;
232 } ib_cm;
233 struct {
234 union {
235 struct sockaddr_in ip4;
236 struct sockaddr_in6 ip6;
Bart Van Assche14673772019-09-30 16:16:58 -0700237 struct sockaddr sa;
Bart Van Assche19f31342018-01-22 14:27:12 -0800238 struct sockaddr_storage ss;
239 } src;
240 union {
241 struct sockaddr_in ip4;
242 struct sockaddr_in6 ip6;
Bart Van Assche14673772019-09-30 16:16:58 -0700243 struct sockaddr sa;
Bart Van Assche19f31342018-01-22 14:27:12 -0800244 struct sockaddr_storage ss;
245 } dst;
246 bool src_specified;
247 } rdma_cm;
248 };
Roland Dreieraef9ec32005-11-02 14:07:13 -0800249
Bart Van Asschec9b03c12011-09-03 09:34:48 +0200250 u32 rq_tmo_jiffies;
251
Roland Dreier6bfa24f2006-06-17 20:37:33 -0700252 int zero_req_lim;
253
Bart Van Asschec1120f82013-10-26 14:35:08 +0200254 struct work_struct tl_err_work;
Bart Van Asscheef6c49d2011-12-26 16:49:18 +0000255 struct work_struct remove_work;
Roland Dreieraef9ec32005-11-02 14:07:13 -0800256
257 struct list_head list;
Bart Van Assche948d1e82011-09-03 09:25:42 +0200258 bool qp_in_error;
Roland Dreieraef9ec32005-11-02 14:07:13 -0800259};
260
261struct srp_iu {
Bart Van Asschedcb4cb82010-11-26 13:22:48 -0500262 struct list_head list;
Ralph Campbell85507bc2006-12-12 14:30:55 -0800263 u64 dma;
Roland Dreieraef9ec32005-11-02 14:07:13 -0800264 void *buf;
265 size_t size;
266 enum dma_data_direction direction;
Bart Van Assche882981f2018-12-17 13:20:39 -0800267 u32 num_sge;
268 struct ib_sge sge[SRP_MAX_SGE];
Christoph Hellwig1dc7b1f2015-11-13 12:57:13 +0100269 struct ib_cqe cqe;
Roland Dreieraef9ec32005-11-02 14:07:13 -0800270};
271
Bart Van Assche5cfb1782014-05-20 15:08:34 +0200272/**
273 * struct srp_fr_desc - fast registration work request arguments
274 * @entry: Entry in srp_fr_pool.free_list.
275 * @mr: Memory region.
276 * @frpl: Fast registration page list.
277 */
278struct srp_fr_desc {
279 struct list_head entry;
280 struct ib_mr *mr;
Bart Van Assche5cfb1782014-05-20 15:08:34 +0200281};
282
283/**
284 * struct srp_fr_pool - pool of fast registration descriptors
285 *
286 * An entry is available for allocation if and only if it occurs in @free_list.
287 *
288 * @size: Number of descriptors in this pool.
289 * @max_page_list_len: Maximum fast registration work request page list length.
290 * @lock: Protects free_list.
291 * @free_list: List of free descriptors.
292 * @desc: Fast registration descriptor pool.
293 */
294struct srp_fr_pool {
295 int size;
296 int max_page_list_len;
297 spinlock_t lock;
298 struct list_head free_list;
Gustavo A. R. Silva5b361322020-02-12 19:04:25 -0600299 struct srp_fr_desc desc[];
Bart Van Assche5cfb1782014-05-20 15:08:34 +0200300};
301
302/**
303 * struct srp_map_state - per-request DMA memory mapping state
304 * @desc: Pointer to the element of the SRP buffer descriptor array
305 * that is being filled in.
306 * @pages: Array with DMA addresses of pages being considered for
307 * memory registration.
308 * @base_dma_addr: DMA address of the first page that has not yet been mapped.
Max Gurtovoyf273ad42020-05-28 16:45:44 -0300309 * @dma_len: Number of bytes that will be registered with the next FR
310 * memory registration call.
Bart Van Assche5cfb1782014-05-20 15:08:34 +0200311 * @total_len: Total number of bytes in the sg-list being mapped.
312 * @npages: Number of page addresses in the pages[] array.
Max Gurtovoyf273ad42020-05-28 16:45:44 -0300313 * @nmdesc: Number of FR memory descriptors used for mapping.
Bart Van Assche5cfb1782014-05-20 15:08:34 +0200314 * @ndesc: Number of SRP buffer descriptors that have been filled in.
Bart Van Assche5cfb1782014-05-20 15:08:34 +0200315 */
David Dillow8f26c9f2011-01-14 19:45:50 -0500316struct srp_map_state {
Bart Van Assche5cfb1782014-05-20 15:08:34 +0200317 union {
Bart Van Asschef731ed62015-08-10 17:07:27 -0700318 struct {
Bart Van Asschef731ed62015-08-10 17:07:27 -0700319 struct srp_fr_desc **next;
320 struct srp_fr_desc **end;
321 } fr;
Bart Van Assche330179f2015-08-10 17:09:05 -0700322 struct {
323 void **next;
324 void **end;
325 } gen;
Bart Van Assche5cfb1782014-05-20 15:08:34 +0200326 };
David Dillow8f26c9f2011-01-14 19:45:50 -0500327 struct srp_direct_buf *desc;
Sagi Grimbergf7f7aab2015-10-13 19:11:39 +0300328 union {
329 u64 *pages;
330 struct scatterlist *sg;
331 };
David Dillow8f26c9f2011-01-14 19:45:50 -0500332 dma_addr_t base_dma_addr;
Bart Van Assche52ede082014-05-20 15:07:45 +0200333 u32 dma_len;
David Dillow8f26c9f2011-01-14 19:45:50 -0500334 u32 total_len;
Bart Van Assche57b0be92015-12-01 10:19:38 -0800335 unsigned int npages;
Bart Van Assche52ede082014-05-20 15:07:45 +0200336 unsigned int nmdesc;
David Dillow8f26c9f2011-01-14 19:45:50 -0500337 unsigned int ndesc;
David Dillow8f26c9f2011-01-14 19:45:50 -0500338};
339
Roland Dreieraef9ec32005-11-02 14:07:13 -0800340#endif /* IB_SRP_H */