blob: 637fa1df351246ac16895151e333119281d17890 [file] [log] [blame]
Greg Kroah-Hartmanb2441312017-11-01 15:07:57 +01001/* SPDX-License-Identifier: GPL-2.0 */
H. Peter Anvin1965aae2008-10-22 22:26:29 -07002#ifndef _ASM_X86_I8259_H
3#define _ASM_X86_I8259_H
Linus Torvalds1da177e2005-04-16 15:20:36 -07004
David P. Reedbc0a7332008-02-18 13:58:34 -05005#include <linux/delay.h>
Guenter Roeck0a9574672018-08-15 13:22:27 -07006#include <asm/io.h>
David P. Reedbc0a7332008-02-18 13:58:34 -05007
Linus Torvalds1da177e2005-04-16 15:20:36 -07008extern unsigned int cached_irq_mask;
9
Joe Perchesace4fdb2008-03-23 01:02:19 -070010#define __byte(x, y) (((unsigned char *)&(y))[x])
Linus Torvalds1da177e2005-04-16 15:20:36 -070011#define cached_master_mask (__byte(0, cached_irq_mask))
12#define cached_slave_mask (__byte(1, cached_irq_mask))
13
Thomas Gleixnerf20ebee2008-01-30 13:30:29 +010014/* i8259A PIC registers */
15#define PIC_MASTER_CMD 0x20
16#define PIC_MASTER_IMR 0x21
17#define PIC_MASTER_ISR PIC_MASTER_CMD
18#define PIC_MASTER_POLL PIC_MASTER_ISR
19#define PIC_MASTER_OCW3 PIC_MASTER_ISR
20#define PIC_SLAVE_CMD 0xa0
21#define PIC_SLAVE_IMR 0xa1
Maciej W. Rozyckid2531662021-07-20 05:28:09 +020022#define PIC_ELCR1 0x4d0
23#define PIC_ELCR2 0x4d1
Thomas Gleixnerf20ebee2008-01-30 13:30:29 +010024
25/* i8259A PIC related value */
26#define PIC_CASCADE_IR 2
27#define MASTER_ICW4_DEFAULT 0x01
28#define SLAVE_ICW4_DEFAULT 0x01
29#define PIC_ICW4_AEOI 2
30
Thomas Gleixner5619c282009-07-25 18:35:11 +020031extern raw_spinlock_t i8259A_lock;
Linus Torvalds1da177e2005-04-16 15:20:36 -070032
David P. Reedbc0a7332008-02-18 13:58:34 -050033/* the PIC may need a careful delay on some platforms, hence specific calls */
34static inline unsigned char inb_pic(unsigned int port)
35{
36 unsigned char value = inb(port);
37
38 /*
39 * delay for some accesses to PIC on motherboard or in chipset
40 * must be at least one microsecond, so be safe here:
41 */
42 udelay(2);
43
44 return value;
45}
46
47static inline void outb_pic(unsigned char value, unsigned int port)
48{
49 outb(value, port);
50 /*
51 * delay for some accesses to PIC on motherboard or in chipset
52 * must be at least one microsecond, so be safe here:
53 */
54 udelay(2);
55}
Alan Cox466eed22008-01-30 13:33:14 +010056
Pavel Machek40bd2172008-05-21 11:44:02 +020057extern struct irq_chip i8259A_chip;
58
Jacob Panef354862009-11-09 11:24:14 -080059struct legacy_pic {
60 int nr_legacy_irqs;
61 struct irq_chip *chip;
Thomas Gleixner4305df92010-09-28 15:01:33 +020062 void (*mask)(unsigned int irq);
63 void (*unmask)(unsigned int irq);
Jacob Panef354862009-11-09 11:24:14 -080064 void (*mask_all)(void);
65 void (*restore_mask)(void);
66 void (*init)(int auto_eoi);
Vitaly Kuznetsov8c058b02015-11-03 10:40:14 +010067 int (*probe)(void);
Jacob Panef354862009-11-09 11:24:14 -080068 int (*irq_pending)(unsigned int irq);
69 void (*make_irq)(unsigned int irq);
70};
71
72extern struct legacy_pic *legacy_pic;
73extern struct legacy_pic null_legacy_pic;
74
Peter Zijlstra30c7e5b2017-12-22 10:20:11 +010075static inline bool has_legacy_pic(void)
76{
77 return legacy_pic != &null_legacy_pic;
78}
79
Jiang Liu95d76ac2014-06-09 16:19:48 +080080static inline int nr_legacy_irqs(void)
81{
82 return legacy_pic->nr_legacy_irqs;
83}
84
H. Peter Anvin1965aae2008-10-22 22:26:29 -070085#endif /* _ASM_X86_I8259_H */