Andrei Kartashev | 67ac01d | 2021-11-19 15:00:57 +0300 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
| 2 | // Copyright (C) 2021 YADRO |
| 3 | /dts-v1/; |
| 4 | |
| 5 | #include "aspeed-bmc-vegman.dtsi" |
| 6 | |
| 7 | / { |
| 8 | model = "YADRO VEGMAN Rx20 BMC"; |
| 9 | compatible = "yadro,vegman-rx20-bmc", "aspeed,ast2500"; |
| 10 | |
| 11 | leds { |
| 12 | compatible = "gpio-leds"; |
| 13 | |
| 14 | temp_alarm { |
| 15 | label = "temp:red:status"; |
| 16 | default-state = "off"; |
| 17 | gpios = <&gpio ASPEED_GPIO(E, 4) GPIO_ACTIVE_LOW>; |
| 18 | }; |
| 19 | |
| 20 | temp_ok { |
| 21 | label = "temp:green:status"; |
| 22 | default-state = "off"; |
| 23 | gpios = <&gpio ASPEED_GPIO(E, 5) GPIO_ACTIVE_LOW>; |
| 24 | }; |
| 25 | |
| 26 | psu_fault { |
| 27 | label = "psu:red:status"; |
| 28 | default-state = "off"; |
| 29 | gpios = <&gpio ASPEED_GPIO(E, 6) GPIO_ACTIVE_LOW>; |
| 30 | }; |
| 31 | |
| 32 | psu_ok { |
| 33 | label = "psu:green:status"; |
| 34 | default-state = "off"; |
| 35 | gpios = <&gpio ASPEED_GPIO(E, 7) GPIO_ACTIVE_LOW>; |
| 36 | }; |
| 37 | }; |
| 38 | }; |
| 39 | |
| 40 | &gpio { |
| 41 | status = "okay"; |
| 42 | gpio-line-names = |
| 43 | /*A0-A7*/ "CASE_OPEN_DNP","CASE_OPEN_FAULT_RST_DNP","BEZEL_ON_PWR_P3V3","PWM_PWRGD_EXP_EN","SPEAKER_BMC","FM_FORCE_BMC_UPDATE","","", |
| 44 | /*B0-B7*/ "","","","","","","","", |
| 45 | /*C0-C7*/ "","","","","","","","", |
| 46 | /*D0-D7*/ "","","","","","","","", |
| 47 | /*E0-E7*/ "RESET_BUTTON","RESET_OUT","POWER_BUTTON","POWER_OUT","LED_TEMP_STATUS_R","LED_TEMP_STATUS_G","LED_PWR_STATUS_R","LED_PWR_STATUS_G", |
| 48 | /*F0-F7*/ "NMI_OUT","CPU1_DISABLE_COD","","","SKT0_FAULT_LED_DNP","SKT1_FAULT_LED_DNP","RST_RGMII_PHYRST_DNP","", |
| 49 | /*G0-G7*/ "CPU_ERR2","CPU_CATERR","PCH_BMC_THERMTRIP","SPI_BMC_BOOT_HD","IRQ_NMI_EVENT","SPI_BMC_BOOT_WP","SPI_BMC_BOOT_WP1","", |
| 50 | /*H0-H7*/ "PWRGD_P3V3_RISER1","PWRGD_P3V3_RISER2","PWRGD_P3V3_RISER3","","MIO_BIOS_SEL","_SPI_FLASH_HOLD","_SPI_FLASH_WP","FM_240VA_STATUS", |
| 51 | /*I0-I7*/ "","","","","","","","", |
| 52 | /*J0-J7*/ "","","","","","","","", |
| 53 | /*K0-K7*/ "","","","","","","","", |
| 54 | /*L0-L7*/ "","","","","","","","", |
| 55 | /*M0-M7*/ "SEL_FLASH_SOFT","STATUS_SEL_BMC","","","BMC_WDT_P","ID_BUTTON","PS_PWROK","", |
| 56 | /*N0-N7*/ "","","","","","","","", |
| 57 | /*O0-O7*/ "","","","","","","","", |
| 58 | /*P0-P7*/ "","","","","","","SPI_BIOS_ACTIVE_FLASH_SEL","STATUS_SEL_BIOS", |
| 59 | /*Q0-Q7*/ "","","","","","","","", |
| 60 | /*R0-R7*/ "_SPI_BMC_BOOT_CS1","","","","","","","", |
| 61 | /*S0-S7*/ "_SPI2_BMC_CS1","RSR_A_SMBEXP_RST_INT","RSR_B_SMBEXP_RST_INT","IRQ_SML0_ALERT_MUX","FP_LED_STATUS_GREEN","FP_LED_STATUS_AMBER","FP_ID_LED","", |
| 62 | /*T0-T7*/ "","","","","","","","", |
| 63 | /*U0-U7*/ "","","","","","","","", |
| 64 | /*V0-V7*/ "","","","","","","","", |
| 65 | /*W0-W7*/ "","","","","","","","", |
| 66 | /*X0-X7*/ "","","","","","","","", |
| 67 | /*Y0-Y7*/ "SIO_S3","SIO_S5","","SIO_ONCONTROL","","","","", |
| 68 | /*Z0-Z7*/ "FM_BMC_PWR_BTN","SIO_POWER_GOOD","FM_BMC_PWRBTN_OUT","FM_BMC_PCH_SCI_LPC","","","","", |
| 69 | /*AA0-AA7*/ "CPU_CLK_MUX_SEL","IRQ_SML1_PMBUS_ALERT","FM_PVCCIN_CPU0_PWR_IN_ALERT","FM_PVCCIN_CPU1_PWR_IN_ALERT","BMC_SYS_PWR_FAULT","BMC_SYS_PWR_OK","SMI","POST_COMPLETE", |
| 70 | /*AB0-AB7*/ "FM_CPU_BMCINIT","NMI_BUTTON","BMC_WDT_RST1","BMC_WDT_RST2","","","","", |
| 71 | /*AC0-AC7*/ "","","","","","","",""; |
| 72 | }; |
| 73 | |
| 74 | &sgpio { |
| 75 | ngpios = <80>; |
| 76 | bus-frequency = <2000000>; |
| 77 | status = "okay"; |
| 78 | /* SGPIO lines. even: input, odd: output */ |
| 79 | gpio-line-names = |
| 80 | /*A0-A7*/ "CPU1_PRESENCE","","CPU1_THERMTRIP","","CPU1_VRHOT","","CPU1_FIVR_FAULT","","CPU1_MEM_ABCD_VRHOT","","CPU1_MEM_EFGH_VRHOT","","","","","", |
| 81 | /*B0-B7*/ "CPU1_MISMATCH","","CPU1_MEM_THERM_EVENT","","CPU2_PRESENCE","","CPU2_THERMTRIP","","CPU2_VRHOT","","CPU2_FIVR_FAULT","","CPU2_MEM_ABCD_VRHOT","","CPU2_MEM_EFGH_VRHOT","", |
| 82 | /*C0-C7*/ "","","","","CPU2_MISMATCH","","CPU2_MEM_THERM_EVENT","","","","","","","","","", |
| 83 | /*D0-D7*/ "","","","","","","","","","","","","","","","", |
| 84 | /*E0-E7*/ "","","","","","","","","","","","","","","","", |
| 85 | /*F0-F7*/ "SGPIO_PLD_MINOR_REV_BIT0","","SGPIO_PLD_MINOR_REV_BIT1","","SGPIO_PLD_MINOR_REV_BIT2","","SGPIO_PLD_MINOR_REV_BIT3","","SGPIO_PLD_MAJOR_REV_BIT0","","SGPIO_PLD_MAJOR_REV_BIT1","","SGPIO_PLD_MAJOR_REV_BIT2","","SGPIO_PLD_MAJOR_REV_BIT3","", |
| 86 | /*G0-G7*/ "MAIN_PLD_MINOR_REV_BIT0","","MAIN_PLD_MINOR_REV_BIT1","","MAIN_PLD_MINOR_REV_BIT2","","MAIN_PLD_MINOR_REV_BIT3","","MAIN_PLD_MAJOR_REV_BIT0","","MAIN_PLD_MAJOR_REV_BIT1","","MAIN_PLD_MAJOR_REV_BIT2","","MAIN_PLD_MAJOR_REV_BIT3","", |
| 87 | /*H0-H7*/ "","","","","","","","","","","","","","","","", |
| 88 | /*I0-I7*/ "","","","","","","","","","","","","","","","", |
| 89 | /*J0-J7*/ "","","","","","","","","","","","","","","",""; |
| 90 | }; |
| 91 | |
| 92 | &i2c11 { |
| 93 | /* SMB_BMC_MGMT_LVC3 */ |
| 94 | gpio@21 { |
| 95 | compatible = "nxp,pcal9535"; |
| 96 | reg = <0x21>; |
| 97 | gpio-controller; |
| 98 | #gpio-cells = <2>; |
| 99 | gpio-line-names = |
| 100 | /*IO0.0-0.7*/ "ETH3_CLK_REQ", "ETH2_CLK_REQ", "RSR_A_PCIE_X16_2_PRSNT", "RSR_B_PCIE_X16_2_PRSNT", "", "RSR_B_PCIE_X8_3_PRSNT", "RSR_B_PCIE_X8_4_PRSNT", "RSR_B_PCIE_X16_PRSNT_N", |
| 101 | /*IO1.0-1.7*/ "RSR_B_PCIE_X8_2_PRSNT", "RSR_B_PCIE_X8_1_PRSNT", "NIC_1_PE_BUF_PRSNT", "RSR_A_PCIE_X16_PRSNT", "RSR_A_PCIE_X8_3_PRSNT", "RSR_A_PCIE_X8_2_PRSNT", "RSR_A_PCIE_X8_1_PRSNT_N", ""; |
| 102 | }; |
| 103 | gpio@23 { |
| 104 | compatible = "nxp,pcal9535"; |
| 105 | reg = <0x23>; |
| 106 | gpio-controller; |
| 107 | #gpio-cells = <2>; |
| 108 | gpio-line-names = |
| 109 | /*IO0.0-0.7*/ "FM_LINK_WIDTH_ID0", "FM_LINK_WIDTH_ID0", "FM_LINK_WIDTH_ID0", "FM_LINK_WIDTH_ID0", "FM_LINK_WIDTH_ID0", "", "", "", |
| 110 | /*IO1.0-1.7*/ "", "", "", "", "", "", "", ""; |
| 111 | }; |
| 112 | gpio@27 { |
| 113 | compatible = "nxp,pca9698"; |
| 114 | reg = <0x27>; |
| 115 | gpio-controller; |
| 116 | #gpio-cells = <2>; |
| 117 | gpio-line-names = |
| 118 | /*IO0.0-0.7*/ "PWRGD_PS_PWROK", "PWRGD_DSW_PWROK", "PWRGD_P5V_AUX", "PWRGD_P3V3_AUX", "PWRGD_P5V", "PWRGD_P3V3", "PWRGD_P1V8_PCH_AUX", "PWRGD_PCH_PVNN_AUX", |
| 119 | /*IO1.0-1.7*/ "PWRGD_P1V05_PCH_AUX", "PWRGD_PCH_AUX_VRS", "PWRGD_PVCCIN_CPU0", "PWRGD_PVCCSA_CPU0", "PWRGD_PVCCIO_CPU0", "PWRGD_PVMCP_CPU0", "PWRGD_P1V0_CPU0", "PWRGD_PVDDQ_ABC_CPU0", |
| 120 | /*IO2.0-2.7*/ "PWRGD_PVPP_ABC_CPU0", "PWRGD_PVTT_ABC_CPU0", "PWRGD_PVDDQ_DEF_CPU0", "PWRGD_PVPP_DEF_CPU0", "PWRGD_PVTT_DEF_CPU0", "PWRGD_PVCCIN_CPU1", "PWRGD_PVCCSA_CPU1", "PWRGD_PVCCIO_CPU1", |
| 121 | /*IO3.0-3.7*/ "PWRGD_PVMCP_CPU1", "PWRGD_P1V0_CPU1", "PWRGD_PVDDQ_GHJ_CPU1", "PWRGD_PVPP_GHJ_CPU1", "PWRGD_PVTT_GHJ_CPU1", "PWRGD_PVDDQ_KLM_CPU1", "PWRGD_PVPP_KLM_CPU1", "PWRGD_PVTT_KLM_CPU1", |
| 122 | /*IO4.0-4.7*/ "PCH_PWR_RESET_N", "FM_BOARD_SKU_ID0", "FM_BOARD_SKU_ID1", "FM_BOARD_SKU_ID2", "FM_BOARD_SKU_ID3", "FM_BOARD_SKU_ID4", "FM_BOARD_REV_ID0", "FM_BOARD_REV_ID1"; |
| 123 | }; |
| 124 | gpio@39 { |
| 125 | compatible = "nxp,pca9554"; |
| 126 | reg = <0x39>; |
| 127 | gpio-controller; |
| 128 | #gpio-cells = <2>; |
| 129 | gpio-line-names = |
| 130 | /*IO0.0-0.7*/ "FAN_FAULT_0", "FAN_FAULT_1", "FAN_FAULT_2", "FAN_FAULT_3", "FAN_FAULT_4", "FAN_FAULT_5", "FAN_FAULT_6", ""; |
| 131 | }; |
| 132 | }; |
| 133 | |
| 134 | &i2c13 { |
| 135 | /* SMB_PCIE2_STBY_LVC3 */ |
| 136 | mux-expa@70 { |
| 137 | compatible = "nxp,pca9548"; |
| 138 | reg = <0x70>; |
| 139 | #address-cells = <1>; |
| 140 | #size-cells = <0>; |
| 141 | i2c-mux-idle-disconnect; |
| 142 | |
| 143 | i2c@2 { |
| 144 | #address-cells = <1>; |
| 145 | #size-cells = <0>; |
| 146 | reg = <2>; |
| 147 | rsra-mux@72 { |
| 148 | compatible = "nxp,pca9548"; |
| 149 | reg = <0x72>; |
| 150 | #address-cells = <1>; |
| 151 | #size-cells = <0>; |
| 152 | |
| 153 | i2c@7 { |
| 154 | #address-cells = <1>; |
| 155 | #size-cells = <0>; |
| 156 | reg = <7>; |
| 157 | at24@50 { |
| 158 | compatible = "atmel,24c64"; |
| 159 | reg = <0x50>; |
| 160 | pagesize = <32>; |
| 161 | size = <8192>; |
| 162 | address-width = <16>; |
| 163 | }; |
| 164 | }; |
| 165 | }; |
| 166 | }; |
| 167 | }; |
| 168 | mux-sata@71 { |
| 169 | compatible = "nxp,pca9543"; |
| 170 | reg = <0x71>; |
| 171 | #address-cells = <1>; |
| 172 | #size-cells = <0>; |
| 173 | i2c-mux-idle-disconnect; |
| 174 | }; |
| 175 | }; |
| 176 | |
| 177 | &i2c2 { |
| 178 | /* SMB_PCIE_STBY_LVC3 */ |
| 179 | mux-expb@71 { |
| 180 | compatible = "nxp,pca9548"; |
| 181 | reg = <0x71>; |
| 182 | #address-cells = <1>; |
| 183 | #size-cells = <0>; |
| 184 | i2c-mux-idle-disconnect; |
| 185 | |
| 186 | i2c@0 { |
| 187 | #address-cells = <1>; |
| 188 | #size-cells = <0>; |
| 189 | reg = <0>; |
| 190 | rsrb-mux@72 { |
| 191 | compatible = "nxp,pca9548"; |
| 192 | reg = <0x72>; |
| 193 | #address-cells = <1>; |
| 194 | #size-cells = <0>; |
| 195 | i2c@7 { |
| 196 | #address-cells = <1>; |
| 197 | #size-cells = <0>; |
| 198 | reg = <7>; |
| 199 | at24@50 { |
| 200 | compatible = "atmel,24c64"; |
| 201 | reg = <0x50>; |
| 202 | pagesize = <32>; |
| 203 | size = <8192>; |
| 204 | address-width = <16>; |
| 205 | }; |
| 206 | }; |
| 207 | }; |
| 208 | at24@50 { |
| 209 | compatible = "atmel,24c64"; |
| 210 | reg = <0x50>; |
| 211 | pagesize = <32>; |
| 212 | size = <8192>; |
| 213 | address-width = <16>; |
| 214 | }; |
| 215 | }; |
| 216 | }; |
| 217 | }; |
| 218 | |
| 219 | &pwm_tacho { |
| 220 | status = "okay"; |
| 221 | pinctrl-names = "default"; |
| 222 | pinctrl-0 = <&pinctrl_pwm0_default &pinctrl_pwm1_default |
| 223 | &pinctrl_pwm2_default &pinctrl_pwm3_default |
| 224 | &pinctrl_pwm4_default &pinctrl_pwm5_default |
| 225 | &pinctrl_pwm6_default>; |
| 226 | |
| 227 | fan@0 { |
| 228 | reg = <0x00>; |
| 229 | aspeed,fan-tach-ch = /bits/ 8 <0x00 0x07>; |
| 230 | }; |
| 231 | fan@1 { |
| 232 | reg = <0x01>; |
| 233 | aspeed,fan-tach-ch = /bits/ 8 <0x01 0x08>; |
| 234 | }; |
| 235 | fan@2 { |
| 236 | reg = <0x02>; |
| 237 | aspeed,fan-tach-ch = /bits/ 8 <0x02 0x09>; |
| 238 | }; |
| 239 | fan@3 { |
| 240 | reg = <0x03>; |
| 241 | aspeed,fan-tach-ch = /bits/ 8 <0x03 0x0A>; |
| 242 | }; |
| 243 | fan@4 { |
| 244 | reg = <0x04>; |
| 245 | aspeed,fan-tach-ch = /bits/ 8 <0x04 0x0B>; |
| 246 | }; |
| 247 | fan@5 { |
| 248 | reg = <0x05>; |
| 249 | aspeed,fan-tach-ch = /bits/ 8 <0x05 0x0C>; |
| 250 | }; |
| 251 | fan@6 { |
| 252 | reg = <0x06>; |
| 253 | aspeed,fan-tach-ch = /bits/ 8 <0x06 0x0D>; |
| 254 | }; |
| 255 | }; |