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Beniamino Galvani6ac73092015-01-17 19:15:14 +01001/*
2 * Pin controller and GPIO driver for Amlogic Meson SoCs
3 *
4 * Copyright (C) 2014 Beniamino Galvani <b.galvani@gmail.com>
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * version 2 as published by the Free Software Foundation.
9 *
10 * You should have received a copy of the GNU General Public License
11 * along with this program. If not, see <http://www.gnu.org/licenses/>.
12 */
13
Linus Walleij1c5fb662018-09-13 13:58:21 +020014#include <linux/gpio/driver.h>
Beniamino Galvani6ac73092015-01-17 19:15:14 +010015#include <linux/pinctrl/pinctrl.h>
Jerome Brunet277d14e2017-10-12 14:40:25 +020016#include <linux/platform_device.h>
Beniamino Galvani6ac73092015-01-17 19:15:14 +010017#include <linux/regmap.h>
18#include <linux/types.h>
19
20/**
21 * struct meson_pmx_group - a pinmux group
22 *
23 * @name: group name
24 * @pins: pins in the group
25 * @num_pins: number of pins in the group
26 * @is_gpio: whether the group is a single GPIO group
27 * @reg: register offset for the group in the domain mux registers
28 * @bit bit index enabling the group
29 * @domain: index of the domain this group belongs to
30 */
31struct meson_pmx_group {
32 const char *name;
33 const unsigned int *pins;
34 unsigned int num_pins;
Jerome Brunetce385aa2017-10-12 14:40:26 +020035 const void *data;
Beniamino Galvani6ac73092015-01-17 19:15:14 +010036};
37
38/**
39 * struct meson_pmx_func - a pinmux function
40 *
41 * @name: function name
42 * @groups: groups in the function
43 * @num_groups: number of groups in the function
44 */
45struct meson_pmx_func {
46 const char *name;
47 const char * const *groups;
48 unsigned int num_groups;
49};
50
51/**
52 * struct meson_reg_desc - a register descriptor
53 *
54 * @reg: register offset in the regmap
55 * @bit: bit index in register
56 *
57 * The structure describes the information needed to control pull,
58 * pull-enable, direction, etc. for a single pin
59 */
60struct meson_reg_desc {
61 unsigned int reg;
62 unsigned int bit;
63};
64
65/**
66 * enum meson_reg_type - type of registers encoded in @meson_reg_desc
67 */
68enum meson_reg_type {
69 REG_PULLEN,
70 REG_PULL,
71 REG_DIR,
72 REG_OUT,
73 REG_IN,
Guillaume La Roque6ea3e3b2019-05-14 10:26:51 +020074 REG_DS,
Beniamino Galvani6ac73092015-01-17 19:15:14 +010075 NUM_REG,
76};
77
78/**
Guillaume La Roque6ea3e3b2019-05-14 10:26:51 +020079 * enum meson_pinconf_drv - value of drive-strength supported
80 */
81enum meson_pinconf_drv {
82 MESON_PINCONF_DRV_500UA,
83 MESON_PINCONF_DRV_2500UA,
84 MESON_PINCONF_DRV_3000UA,
85 MESON_PINCONF_DRV_4000UA,
86};
87
88/**
Beniamino Galvani6ac73092015-01-17 19:15:14 +010089 * struct meson bank
90 *
91 * @name: bank name
92 * @first: first pin of the bank
93 * @last: last pin of the bank
Jerome Brunet6c9dc842017-06-08 21:37:50 +020094 * @irq: hwirq base number of the bank
Beniamino Galvani6ac73092015-01-17 19:15:14 +010095 * @regs: array of register descriptors
96 *
97 * A bank represents a set of pins controlled by a contiguous set of
98 * bits in the domain registers. The structure specifies which bits in
99 * the regmap control the different functionalities. Each member of
100 * the @regs array refers to the first pin of the bank.
101 */
102struct meson_bank {
103 const char *name;
104 unsigned int first;
105 unsigned int last;
Jerome Brunet6c9dc842017-06-08 21:37:50 +0200106 int irq_first;
107 int irq_last;
Beniamino Galvani6ac73092015-01-17 19:15:14 +0100108 struct meson_reg_desc regs[NUM_REG];
109};
110
Beniamino Galvani6ac73092015-01-17 19:15:14 +0100111struct meson_pinctrl_data {
Beniamino Galvanidb80f0e2016-08-13 19:41:18 +0200112 const char *name;
Beniamino Galvani6ac73092015-01-17 19:15:14 +0100113 const struct pinctrl_pin_desc *pins;
114 struct meson_pmx_group *groups;
115 struct meson_pmx_func *funcs;
Beniamino Galvani6ac73092015-01-17 19:15:14 +0100116 unsigned int num_pins;
117 unsigned int num_groups;
118 unsigned int num_funcs;
Beniamino Galvanidb80f0e2016-08-13 19:41:18 +0200119 struct meson_bank *banks;
120 unsigned int num_banks;
Jerome Brunetce385aa2017-10-12 14:40:26 +0200121 const struct pinmux_ops *pmx_ops;
Xingyu Chen0fabe432017-11-20 18:08:24 +0800122 void *pmx_data;
Beniamino Galvani6ac73092015-01-17 19:15:14 +0100123};
124
125struct meson_pinctrl {
126 struct device *dev;
127 struct pinctrl_dev *pcdev;
128 struct pinctrl_desc desc;
129 struct meson_pinctrl_data *data;
Beniamino Galvanidb80f0e2016-08-13 19:41:18 +0200130 struct regmap *reg_mux;
131 struct regmap *reg_pullen;
132 struct regmap *reg_pull;
133 struct regmap *reg_gpio;
Jerome Brunet64856972019-01-17 11:23:15 +0100134 struct regmap *reg_ds;
Beniamino Galvanidb80f0e2016-08-13 19:41:18 +0200135 struct gpio_chip chip;
136 struct device_node *of_node;
Beniamino Galvani6ac73092015-01-17 19:15:14 +0100137};
138
Beniamino Galvani6ac73092015-01-17 19:15:14 +0100139#define FUNCTION(fn) \
140 { \
141 .name = #fn, \
142 .groups = fn ## _groups, \
143 .num_groups = ARRAY_SIZE(fn ## _groups), \
144 }
145
Guillaume La Roque6ea3e3b2019-05-14 10:26:51 +0200146#define BANK_DS(n, f, l, fi, li, per, peb, pr, pb, dr, db, or, ob, ir, ib, \
147 dsr, dsb) \
Beniamino Galvani6ac73092015-01-17 19:15:14 +0100148 { \
Jerome Brunet6c9dc842017-06-08 21:37:50 +0200149 .name = n, \
150 .first = f, \
151 .last = l, \
152 .irq_first = fi, \
153 .irq_last = li, \
154 .regs = { \
Beniamino Galvani6ac73092015-01-17 19:15:14 +0100155 [REG_PULLEN] = { per, peb }, \
156 [REG_PULL] = { pr, pb }, \
157 [REG_DIR] = { dr, db }, \
158 [REG_OUT] = { or, ob }, \
159 [REG_IN] = { ir, ib }, \
Guillaume La Roque6ea3e3b2019-05-14 10:26:51 +0200160 [REG_DS] = { dsr, dsb }, \
Beniamino Galvani6ac73092015-01-17 19:15:14 +0100161 }, \
162 }
163
Guillaume La Roque6ea3e3b2019-05-14 10:26:51 +0200164#define BANK(n, f, l, fi, li, per, peb, pr, pb, dr, db, or, ob, ir, ib) \
165 BANK_DS(n, f, l, fi, li, per, peb, pr, pb, dr, db, or, ob, ir, ib, 0, 0)
166
Jerome Brunet634e40b2017-09-20 15:39:20 +0200167#define MESON_PIN(x) PINCTRL_PIN(x, #x)
Beniamino Galvani6ac73092015-01-17 19:15:14 +0100168
Jerome Brunetce385aa2017-10-12 14:40:26 +0200169/* Common pmx functions */
170int meson_pmx_get_funcs_count(struct pinctrl_dev *pcdev);
171const char *meson_pmx_get_func_name(struct pinctrl_dev *pcdev,
172 unsigned selector);
173int meson_pmx_get_groups(struct pinctrl_dev *pcdev,
174 unsigned selector,
175 const char * const **groups,
176 unsigned * const num_groups);
177
Jerome Brunet277d14e2017-10-12 14:40:25 +0200178/* Common probe function */
179int meson_pinctrl_probe(struct platform_device *pdev);