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Mauro Carvalho Chehabab42b812019-06-12 14:52:45 -03001================================
Linus Torvalds1da177e2005-04-16 15:20:36 -07002Driver for PXA25x LCD controller
3================================
4
5The driver supports the following options, either via
6options=<OPTIONS> when modular or video=pxafb:<OPTIONS> when built in.
7
Mauro Carvalho Chehabab42b812019-06-12 14:52:45 -03008For example::
9
Eric Miao77e19672008-12-16 11:54:34 +080010 modprobe pxafb options=vmem:2M,mode:640x480-8,passive
Mauro Carvalho Chehabab42b812019-06-12 14:52:45 -030011
12or on the kernel command line::
13
Eric Miao77e19672008-12-16 11:54:34 +080014 video=pxafb:vmem:2M,mode:640x480-8,passive
15
16vmem: VIDEO_MEM_SIZE
Mauro Carvalho Chehabab42b812019-06-12 14:52:45 -030017
Eric Miao77e19672008-12-16 11:54:34 +080018 Amount of video memory to allocate (can be suffixed with K or M
19 for kilobytes or megabytes)
Linus Torvalds1da177e2005-04-16 15:20:36 -070020
21mode:XRESxYRES[-BPP]
Mauro Carvalho Chehabab42b812019-06-12 14:52:45 -030022
Linus Torvalds1da177e2005-04-16 15:20:36 -070023 XRES == LCCR1_PPL + 1
Mauro Carvalho Chehabab42b812019-06-12 14:52:45 -030024
Linus Torvalds1da177e2005-04-16 15:20:36 -070025 YRES == LLCR2_LPP + 1
Mauro Carvalho Chehabab42b812019-06-12 14:52:45 -030026
Linus Torvalds1da177e2005-04-16 15:20:36 -070027 The resolution of the display in pixels
Mauro Carvalho Chehabab42b812019-06-12 14:52:45 -030028
Linus Torvalds1da177e2005-04-16 15:20:36 -070029 BPP == The bit depth. Valid values are 1, 2, 4, 8 and 16.
30
31pixclock:PIXCLOCK
Mauro Carvalho Chehabab42b812019-06-12 14:52:45 -030032
Linus Torvalds1da177e2005-04-16 15:20:36 -070033 Pixel clock in picoseconds
34
35left:LEFT == LCCR1_BLW + 1
Mauro Carvalho Chehabab42b812019-06-12 14:52:45 -030036
Linus Torvalds1da177e2005-04-16 15:20:36 -070037right:RIGHT == LCCR1_ELW + 1
Mauro Carvalho Chehabab42b812019-06-12 14:52:45 -030038
Linus Torvalds1da177e2005-04-16 15:20:36 -070039hsynclen:HSYNC == LCCR1_HSW + 1
Mauro Carvalho Chehabab42b812019-06-12 14:52:45 -030040
Linus Torvalds1da177e2005-04-16 15:20:36 -070041upper:UPPER == LCCR2_BFW
Mauro Carvalho Chehabab42b812019-06-12 14:52:45 -030042
Linus Torvalds1da177e2005-04-16 15:20:36 -070043lower:LOWER == LCCR2_EFR
Mauro Carvalho Chehabab42b812019-06-12 14:52:45 -030044
Linus Torvalds1da177e2005-04-16 15:20:36 -070045vsynclen:VSYNC == LCCR2_VSW + 1
Mauro Carvalho Chehabab42b812019-06-12 14:52:45 -030046
Linus Torvalds1da177e2005-04-16 15:20:36 -070047 Display margins and sync times
48
49color | mono => LCCR0_CMS
Mauro Carvalho Chehabab42b812019-06-12 14:52:45 -030050
Linus Torvalds1da177e2005-04-16 15:20:36 -070051 umm...
52
53active | passive => LCCR0_PAS
Mauro Carvalho Chehabab42b812019-06-12 14:52:45 -030054
Linus Torvalds1da177e2005-04-16 15:20:36 -070055 Active (TFT) or Passive (STN) display
56
57single | dual => LCCR0_SDS
Mauro Carvalho Chehabab42b812019-06-12 14:52:45 -030058
Linus Torvalds1da177e2005-04-16 15:20:36 -070059 Single or dual panel passive display
60
614pix | 8pix => LCCR0_DPD
Mauro Carvalho Chehabab42b812019-06-12 14:52:45 -030062
Linus Torvalds1da177e2005-04-16 15:20:36 -070063 4 or 8 pixel monochrome single panel data
64
Mauro Carvalho Chehabab42b812019-06-12 14:52:45 -030065hsync:HSYNC, vsync:VSYNC
66
Linus Torvalds1da177e2005-04-16 15:20:36 -070067 Horizontal and vertical sync. 0 => active low, 1 => active
68 high.
69
70dpc:DPC
Mauro Carvalho Chehabab42b812019-06-12 14:52:45 -030071
Linus Torvalds1da177e2005-04-16 15:20:36 -070072 Double pixel clock. 1=>true, 0=>false
73
74outputen:POLARITY
Mauro Carvalho Chehabab42b812019-06-12 14:52:45 -030075
Linus Torvalds1da177e2005-04-16 15:20:36 -070076 Output Enable Polarity. 0 => active low, 1 => active high
77
78pixclockpol:POLARITY
Mauro Carvalho Chehabab42b812019-06-12 14:52:45 -030079
Linus Torvalds1da177e2005-04-16 15:20:36 -070080 pixel clock polarity
81 0 => falling edge, 1 => rising edge
Eric Miao198fc102008-12-23 17:49:43 +080082
83
84Overlay Support for PXA27x and later LCD controllers
85====================================================
86
87 PXA27x and later processors support overlay1 and overlay2 on-top of the
88 base framebuffer (although under-neath the base is also possible). They
89 support palette and no-palette RGB formats, as well as YUV formats (only
90 available on overlay2). These overlays have dedicated DMA channels and
91 behave in a similar way as a framebuffer.
92
93 However, there are some differences between these overlay framebuffers
94 and normal framebuffers, as listed below:
95
96 1. overlay can start at a 32-bit word aligned position within the base
97 framebuffer, which means they have a start (x, y). This information
98 is encoded into var->nonstd (no, var->xoffset and var->yoffset are
99 not for such purpose).
100
101 2. overlay framebuffer is allocated dynamically according to specified
Mauro Carvalho Chehabab42b812019-06-12 14:52:45 -0300102 'struct fb_var_screeninfo', the amount is decided by::
Eric Miao198fc102008-12-23 17:49:43 +0800103
Mauro Carvalho Chehabab42b812019-06-12 14:52:45 -0300104 var->xres_virtual * var->yres_virtual * bpp
Eric Miao198fc102008-12-23 17:49:43 +0800105
106 bpp = 16 -- for RGB565 or RGBT555
Mauro Carvalho Chehabab42b812019-06-12 14:52:45 -0300107
108 bpp = 24 -- for YUV444 packed
109
110 bpp = 24 -- for YUV444 planar
111
112 bpp = 16 -- for YUV422 planar (1 pixel = 1 Y + 1/2 Cb + 1/2 Cr)
113
114 bpp = 12 -- for YUV420 planar (1 pixel = 1 Y + 1/4 Cb + 1/4 Cr)
Eric Miao198fc102008-12-23 17:49:43 +0800115
116 NOTE:
117
118 a. overlay does not support panning in x-direction, thus
Mauro Carvalho Chehabab42b812019-06-12 14:52:45 -0300119 var->xres_virtual will always be equal to var->xres
Eric Miao198fc102008-12-23 17:49:43 +0800120
121 b. line length of overlay(s) must be on a 32-bit word boundary,
Mauro Carvalho Chehabab42b812019-06-12 14:52:45 -0300122 for YUV planar modes, it is a requirement for the component
Eric Miao198fc102008-12-23 17:49:43 +0800123 with minimum bits per pixel, e.g. for YUV420, Cr component
124 for one pixel is actually 2-bits, it means the line length
125 should be a multiple of 16-pixels
126
127 c. starting horizontal position (XPOS) should start on a 32-bit
Mauro Carvalho Chehabab42b812019-06-12 14:52:45 -0300128 word boundary, otherwise the fb_check_var() will just fail.
Eric Miao198fc102008-12-23 17:49:43 +0800129
130 d. the rectangle of the overlay should be within the base plane,
Mauro Carvalho Chehabab42b812019-06-12 14:52:45 -0300131 otherwise fail
Eric Miao198fc102008-12-23 17:49:43 +0800132
133 Applications should follow the sequence below to operate an overlay
134 framebuffer:
135
Mauro Carvalho Chehabab42b812019-06-12 14:52:45 -0300136 a. open("/dev/fb[1-2]", ...)
Eric Miao198fc102008-12-23 17:49:43 +0800137 b. ioctl(fd, FBIOGET_VSCREENINFO, ...)
138 c. modify 'var' with desired parameters:
Mauro Carvalho Chehabab42b812019-06-12 14:52:45 -0300139
Eric Miao198fc102008-12-23 17:49:43 +0800140 1) var->xres and var->yres
141 2) larger var->yres_virtual if more memory is required,
142 usually for double-buffering
143 3) var->nonstd for starting (x, y) and color format
144 4) var->{red, green, blue, transp} if RGB mode is to be used
Mauro Carvalho Chehabab42b812019-06-12 14:52:45 -0300145
Eric Miao198fc102008-12-23 17:49:43 +0800146 d. ioctl(fd, FBIOPUT_VSCREENINFO, ...)
147 e. ioctl(fd, FBIOGET_FSCREENINFO, ...)
148 f. mmap
149 g. ...
150
151 3. for YUV planar formats, these are actually not supported within the
152 framebuffer framework, application has to take care of the offsets
153 and lengths of each component within the framebuffer.
154
155 4. var->nonstd is used to pass starting (x, y) position and color format,
Mauro Carvalho Chehabab42b812019-06-12 14:52:45 -0300156 the detailed bit fields are shown below::
Eric Miao198fc102008-12-23 17:49:43 +0800157
Mauro Carvalho Chehabab42b812019-06-12 14:52:45 -0300158 31 23 20 10 0
159 +-----------------+---+----------+----------+
160 | ... unused ... |FOR| XPOS | YPOS |
161 +-----------------+---+----------+----------+
Eric Miao198fc102008-12-23 17:49:43 +0800162
163 FOR - color format, as defined by OVERLAY_FORMAT_* in pxafb.h
Mauro Carvalho Chehabab42b812019-06-12 14:52:45 -0300164
165 - 0 - RGB
166 - 1 - YUV444 PACKED
167 - 2 - YUV444 PLANAR
168 - 3 - YUV422 PLANAR
169 - 4 - YUR420 PLANAR
Eric Miao198fc102008-12-23 17:49:43 +0800170
171 XPOS - starting horizontal position
Mauro Carvalho Chehabab42b812019-06-12 14:52:45 -0300172
Eric Miao198fc102008-12-23 17:49:43 +0800173 YPOS - starting vertical position