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review.shift-gmbh.com / SHIFTPHONES / mainline / linux / 6db507ff9232cc3874306f7b25b399cb2cdc1675 / . / drivers / net / wireless / b43 / phy_n.c
blob: 284b54fde41da58ed39f6166a1bb178ae5bbdfb7 [file] [log] [blame]
Michael Buesch424047e2008-01-09 16:13:56 +0100[diff] [blame]1/*
2
3 Broadcom B43 wireless driver
4 IEEE 802.11n PHY support
5
6 Copyright (c) 2008 Michael Buesch <mb@bu3sch.de>
7
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2 of the License, or
11 (at your option) any later version.
12
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with this program; see the file COPYING. If not, write to
20 the Free Software Foundation, Inc., 51 Franklin Steet, Fifth Floor,
21 Boston, MA 02110-1301, USA.
22
23*/
24
John W. Linville819d7722008-01-17 16:57:10 -0500[diff] [blame]25#include <linux/delay.h>
Tejun Heo5a0e3ad2010-03-24 17:04:11 +0900[diff] [blame]26#include <linux/slab.h>
John W. Linville819d7722008-01-17 16:57:10 -0500[diff] [blame]27#include <linux/types.h>
28
Michael Buesch424047e2008-01-09 16:13:56 +0100[diff] [blame]29#include "b43.h"
Michael Buesch3d0da752008-08-30 02:27:19 +0200[diff] [blame]30#include "phy_n.h"
Michael Buesch53a6e232008-01-13 21:23:44 +0100[diff] [blame]31#include "tables_nphy.h"
Rafał Miłecki6db507f2010-10-14 19:33:36 +0200[diff] [blame^]32#include "radio_2055.h"
Rafał Miłeckibbec3982010-01-15 14:31:39 +0100[diff] [blame]33#include "main.h"
Michael Buesch424047e2008-01-09 16:13:56 +0100[diff] [blame]34
Rafał Miłeckif8187b52010-01-15 12:34:21 +0100[diff] [blame]35struct nphy_txgains {
36 u16 txgm[2];
37 u16 pga[2];
38 u16 pad[2];
39 u16 ipa[2];
40};
41
42struct nphy_iqcal_params {
43 u16 txgm;
44 u16 pga;
45 u16 pad;
46 u16 ipa;
47 u16 cal_gain;
48 u16 ncorr[5];
49};
50
51struct nphy_iq_est {
52 s32 iq0_prod;
53 u32 i0_pwr;
54 u32 q0_pwr;
55 s32 iq1_prod;
56 u32 i1_pwr;
57 u32 q1_pwr;
58};
Michael Buesch424047e2008-01-09 16:13:56 +0100[diff] [blame]59
Rafał Miłecki67c0d6e2010-01-17 13:04:02 +0100[diff] [blame]60enum b43_nphy_rf_sequence {
61 B43_RFSEQ_RX2TX,
62 B43_RFSEQ_TX2RX,
63 B43_RFSEQ_RESET2RX,
64 B43_RFSEQ_UPDATE_GAINH,
65 B43_RFSEQ_UPDATE_GAINL,
66 B43_RFSEQ_UPDATE_GAINU,
67};
68
Rafał Miłecki9501fef2010-01-30 20:18:07 +0100[diff] [blame]69static void b43_nphy_set_rf_sequence(struct b43_wldev *dev, u8 cmd,
70 u8 *events, u8 *delays, u8 length);
Rafał Miłecki67c0d6e2010-01-17 13:04:02 +0100[diff] [blame]71static void b43_nphy_force_rf_sequence(struct b43_wldev *dev,
72 enum b43_nphy_rf_sequence seq);
Rafał Miłecki67cbc3e2010-02-04 12:23:08 +0100[diff] [blame]73static void b43_nphy_rf_control_override(struct b43_wldev *dev, u16 field,
74 u16 value, u8 core, bool off);
75static void b43_nphy_rf_control_intc_override(struct b43_wldev *dev, u8 field,
76 u16 value, u8 core);
Rafał Miłecki67c0d6e2010-01-17 13:04:02 +0100[diff] [blame]77
Rafał Miłeckie5c407f2010-10-11 03:11:02 +0200[diff] [blame]78static inline bool b43_channel_type_is_40mhz(
79 enum nl80211_channel_type channel_type)
80{
81 return (channel_type == NL80211_CHAN_HT40MINUS ||
82 channel_type == NL80211_CHAN_HT40PLUS);
83}
84
Michael Buesch53a6e232008-01-13 21:23:44 +0100[diff] [blame]85void b43_nphy_set_rxantenna(struct b43_wldev *dev, int antenna)
86{//TODO
87}
88
Michael Buesch18c8ade2008-08-28 19:33:40 +0200[diff] [blame]89static void b43_nphy_op_adjust_txpower(struct b43_wldev *dev)
Michael Buesch53a6e232008-01-13 21:23:44 +0100[diff] [blame]90{//TODO
91}
92
Michael Buesch18c8ade2008-08-28 19:33:40 +0200[diff] [blame]93static enum b43_txpwr_result b43_nphy_op_recalc_txpower(struct b43_wldev *dev,
94 bool ignore_tssi)
95{//TODO
96 return B43_TXPWR_RES_DONE;
97}
98
Michael Bueschd1591312008-01-14 00:05:57 +0100[diff] [blame]99static void b43_chantab_radio_upload(struct b43_wldev *dev,
Rafał Miłeckif19ebe72010-03-29 00:53:15 +0200[diff] [blame]100 const struct b43_nphy_channeltab_entry_rev2 *e)
Michael Bueschd1591312008-01-14 00:05:57 +0100[diff] [blame]101{
Rafał Miłeckie5255ccc2010-02-27 13:03:35 +0100[diff] [blame]102 b43_radio_write(dev, B2055_PLL_REF, e->radio_pll_ref);
103 b43_radio_write(dev, B2055_RF_PLLMOD0, e->radio_rf_pllmod0);
104 b43_radio_write(dev, B2055_RF_PLLMOD1, e->radio_rf_pllmod1);
105 b43_radio_write(dev, B2055_VCO_CAPTAIL, e->radio_vco_captail);
106 b43_read32(dev, B43_MMIO_MACCTL); /* flush writes */
107
108 b43_radio_write(dev, B2055_VCO_CAL1, e->radio_vco_cal1);
109 b43_radio_write(dev, B2055_VCO_CAL2, e->radio_vco_cal2);
110 b43_radio_write(dev, B2055_PLL_LFC1, e->radio_pll_lfc1);
111 b43_radio_write(dev, B2055_PLL_LFR1, e->radio_pll_lfr1);
112 b43_read32(dev, B43_MMIO_MACCTL); /* flush writes */
113
114 b43_radio_write(dev, B2055_PLL_LFC2, e->radio_pll_lfc2);
115 b43_radio_write(dev, B2055_LGBUF_CENBUF, e->radio_lgbuf_cenbuf);
116 b43_radio_write(dev, B2055_LGEN_TUNE1, e->radio_lgen_tune1);
117 b43_radio_write(dev, B2055_LGEN_TUNE2, e->radio_lgen_tune2);
118 b43_read32(dev, B43_MMIO_MACCTL); /* flush writes */
119
120 b43_radio_write(dev, B2055_C1_LGBUF_ATUNE, e->radio_c1_lgbuf_atune);
121 b43_radio_write(dev, B2055_C1_LGBUF_GTUNE, e->radio_c1_lgbuf_gtune);
122 b43_radio_write(dev, B2055_C1_RX_RFR1, e->radio_c1_rx_rfr1);
123 b43_radio_write(dev, B2055_C1_TX_PGAPADTN, e->radio_c1_tx_pgapadtn);
124 b43_read32(dev, B43_MMIO_MACCTL); /* flush writes */
125
126 b43_radio_write(dev, B2055_C1_TX_MXBGTRIM, e->radio_c1_tx_mxbgtrim);
127 b43_radio_write(dev, B2055_C2_LGBUF_ATUNE, e->radio_c2_lgbuf_atune);
128 b43_radio_write(dev, B2055_C2_LGBUF_GTUNE, e->radio_c2_lgbuf_gtune);
129 b43_radio_write(dev, B2055_C2_RX_RFR1, e->radio_c2_rx_rfr1);
130 b43_read32(dev, B43_MMIO_MACCTL); /* flush writes */
131
132 b43_radio_write(dev, B2055_C2_TX_PGAPADTN, e->radio_c2_tx_pgapadtn);
133 b43_radio_write(dev, B2055_C2_TX_MXBGTRIM, e->radio_c2_tx_mxbgtrim);
Michael Bueschd1591312008-01-14 00:05:57 +0100[diff] [blame]134}
135
136static void b43_chantab_phy_upload(struct b43_wldev *dev,
Rafał Miłeckib15b3032010-03-29 00:53:13 +0200[diff] [blame]137 const struct b43_phy_n_sfo_cfg *e)
Michael Bueschd1591312008-01-14 00:05:57 +0100[diff] [blame]138{
139 b43_phy_write(dev, B43_NPHY_BW1A, e->phy_bw1a);
140 b43_phy_write(dev, B43_NPHY_BW2, e->phy_bw2);
141 b43_phy_write(dev, B43_NPHY_BW3, e->phy_bw3);
142 b43_phy_write(dev, B43_NPHY_BW4, e->phy_bw4);
143 b43_phy_write(dev, B43_NPHY_BW5, e->phy_bw5);
144 b43_phy_write(dev, B43_NPHY_BW6, e->phy_bw6);
145}
146
147static void b43_nphy_tx_power_fix(struct b43_wldev *dev)
148{
149 //TODO
150}
151
Rafał Miłecki7955de02010-02-27 13:03:39 +0100[diff] [blame]152
153/* http://bcm-v4.sipsolutions.net/802.11/PHY/Radio/2055Setup */
154static void b43_radio_2055_setup(struct b43_wldev *dev,
Rafał Miłeckif19ebe72010-03-29 00:53:15 +0200[diff] [blame]155 const struct b43_nphy_channeltab_entry_rev2 *e)
Rafał Miłecki7955de02010-02-27 13:03:39 +0100[diff] [blame]156{
157 B43_WARN_ON(dev->phy.rev >= 3);
158
159 b43_chantab_radio_upload(dev, e);
160 udelay(50);
Rafał Miłeckie58b1252010-03-29 00:53:16 +0200[diff] [blame]161 b43_radio_write(dev, B2055_VCO_CAL10, 0x05);
162 b43_radio_write(dev, B2055_VCO_CAL10, 0x45);
Rafał Miłecki7955de02010-02-27 13:03:39 +0100[diff] [blame]163 b43_read32(dev, B43_MMIO_MACCTL); /* flush writes */
Rafał Miłeckie58b1252010-03-29 00:53:16 +0200[diff] [blame]164 b43_radio_write(dev, B2055_VCO_CAL10, 0x65);
Rafał Miłecki7955de02010-02-27 13:03:39 +0100[diff] [blame]165 udelay(300);
166}
167
Michael Buesch53a6e232008-01-13 21:23:44 +0100[diff] [blame]168static void b43_radio_init2055_pre(struct b43_wldev *dev)
169{
170 b43_phy_mask(dev, B43_NPHY_RFCTL_CMD,
171 ~B43_NPHY_RFCTL_CMD_PORFORCE);
172 b43_phy_set(dev, B43_NPHY_RFCTL_CMD,
173 B43_NPHY_RFCTL_CMD_CHIP0PU |
174 B43_NPHY_RFCTL_CMD_OEPORFORCE);
175 b43_phy_set(dev, B43_NPHY_RFCTL_CMD,
176 B43_NPHY_RFCTL_CMD_PORFORCE);
177}
178
179static void b43_radio_init2055_post(struct b43_wldev *dev)
180{
Rafał Miłecki036cafe2010-02-27 13:03:36 +0100[diff] [blame]181 struct b43_phy_n *nphy = dev->phy.n;
Michael Buesch53a6e232008-01-13 21:23:44 +0100[diff] [blame]182 struct ssb_sprom *sprom = &(dev->dev->bus->sprom);
183 struct ssb_boardinfo *binfo = &(dev->dev->bus->boardinfo);
184 int i;
185 u16 val;
Rafał Miłecki036cafe2010-02-27 13:03:36 +0100[diff] [blame]186 bool workaround = false;
187
188 if (sprom->revision < 4)
189 workaround = (binfo->vendor != PCI_VENDOR_ID_BROADCOM ||
190 binfo->type != 0x46D ||
191 binfo->rev < 0x41);
192 else
193 workaround = ((sprom->boardflags_hi & B43_BFH_NOPA) == 0);
Michael Buesch53a6e232008-01-13 21:23:44 +0100[diff] [blame]194
195 b43_radio_mask(dev, B2055_MASTER1, 0xFFF3);
Rafał Miłecki036cafe2010-02-27 13:03:36 +0100[diff] [blame]196 if (workaround) {
197 b43_radio_mask(dev, B2055_C1_RX_BB_REG, 0x7F);
198 b43_radio_mask(dev, B2055_C2_RX_BB_REG, 0x7F);
Michael Buesch53a6e232008-01-13 21:23:44 +0100[diff] [blame]199 }
Rafał Miłecki036cafe2010-02-27 13:03:36 +0100[diff] [blame]200 b43_radio_maskset(dev, B2055_RRCCAL_NOPTSEL, 0xFFC0, 0x2C);
201 b43_radio_write(dev, B2055_CAL_MISC, 0x3C);
Michael Buesch53a6e232008-01-13 21:23:44 +0100[diff] [blame]202 b43_radio_mask(dev, B2055_CAL_MISC, 0xFFBE);
Michael Buesch53a6e232008-01-13 21:23:44 +0100[diff] [blame]203 b43_radio_set(dev, B2055_CAL_LPOCTL, 0x80);
Michael Buesch53a6e232008-01-13 21:23:44 +0100[diff] [blame]204 b43_radio_set(dev, B2055_CAL_MISC, 0x1);
205 msleep(1);
206 b43_radio_set(dev, B2055_CAL_MISC, 0x40);
Rafał Miłecki036cafe2010-02-27 13:03:36 +0100[diff] [blame]207 for (i = 0; i < 200; i++) {
208 val = b43_radio_read(dev, B2055_CAL_COUT2);
209 if (val & 0x80) {
210 i = 0;
Michael Buesch53a6e232008-01-13 21:23:44 +0100[diff] [blame]211 break;
Rafał Miłecki036cafe2010-02-27 13:03:36 +0100[diff] [blame]212 }
Michael Buesch53a6e232008-01-13 21:23:44 +0100[diff] [blame]213 udelay(10);
214 }
Rafał Miłecki036cafe2010-02-27 13:03:36 +0100[diff] [blame]215 if (i)
216 b43err(dev->wl, "radio post init timeout\n");
Michael Buesch53a6e232008-01-13 21:23:44 +0100[diff] [blame]217 b43_radio_mask(dev, B2055_CAL_LPOCTL, 0xFF7F);
Rafał Miłecki78159782010-10-06 07:50:08 +0200[diff] [blame]218 b43_switch_channel(dev, dev->phy.channel);
Rafał Miłecki036cafe2010-02-27 13:03:36 +0100[diff] [blame]219 b43_radio_write(dev, B2055_C1_RX_BB_LPF, 0x9);
220 b43_radio_write(dev, B2055_C2_RX_BB_LPF, 0x9);
221 b43_radio_write(dev, B2055_C1_RX_BB_MIDACHP, 0x83);
222 b43_radio_write(dev, B2055_C2_RX_BB_MIDACHP, 0x83);
223 b43_radio_maskset(dev, B2055_C1_LNA_GAINBST, 0xFFF8, 0x6);
224 b43_radio_maskset(dev, B2055_C2_LNA_GAINBST, 0xFFF8, 0x6);
225 if (!nphy->gain_boost) {
226 b43_radio_set(dev, B2055_C1_RX_RFSPC1, 0x2);
227 b43_radio_set(dev, B2055_C2_RX_RFSPC1, 0x2);
228 } else {
229 b43_radio_mask(dev, B2055_C1_RX_RFSPC1, 0xFFFD);
230 b43_radio_mask(dev, B2055_C2_RX_RFSPC1, 0xFFFD);
231 }
232 udelay(2);
Michael Buesch53a6e232008-01-13 21:23:44 +0100[diff] [blame]233}
234
Rafał Miłeckic2b7aef2010-02-27 13:03:34 +0100[diff] [blame]235/*
236 * Initialize a Broadcom 2055 N-radio
237 * http://bcm-v4.sipsolutions.net/802.11/Radio/2055/Init
238 */
Michael Buesch53a6e232008-01-13 21:23:44 +0100[diff] [blame]239static void b43_radio_init2055(struct b43_wldev *dev)
240{
241 b43_radio_init2055_pre(dev);
242 if (b43_status(dev) < B43_STAT_INITIALIZED)
243 b2055_upload_inittab(dev, 0, 1);
244 else
245 b2055_upload_inittab(dev, 0/*FIXME on 5ghz band*/, 0);
246 b43_radio_init2055_post(dev);
247}
248
Rafał Miłecki4772ae12010-01-15 12:18:21 +0100[diff] [blame]249/*
Rafał Miłeckid817f4e2010-03-29 00:53:12 +0200[diff] [blame]250 * Initialize a Broadcom 2056 N-radio
251 * http://bcm-v4.sipsolutions.net/802.11/Radio/2056/Init
252 */
253static void b43_radio_init2056(struct b43_wldev *dev)
254{
255 /* TODO */
256}
257
258
259/*
Rafał Miłecki4772ae12010-01-15 12:18:21 +0100[diff] [blame]260 * Upload the N-PHY tables.
261 * http://bcm-v4.sipsolutions.net/802.11/PHY/N/InitTables
262 */
Michael Buesch95b66ba2008-01-18 01:09:25 +0100[diff] [blame]263static void b43_nphy_tables_init(struct b43_wldev *dev)
264{
Rafał Miłecki4772ae12010-01-15 12:18:21 +0100[diff] [blame]265 if (dev->phy.rev < 3)
266 b43_nphy_rev0_1_2_tables_init(dev);
267 else
268 b43_nphy_rev3plus_tables_init(dev);
Michael Buesch95b66ba2008-01-18 01:09:25 +0100[diff] [blame]269}
270
Rafał Miłeckie50cbcf2010-01-15 15:02:38 +0100[diff] [blame]271/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/PA%20override */
272static void b43_nphy_pa_override(struct b43_wldev *dev, bool enable)
273{
274 struct b43_phy_n *nphy = dev->phy.n;
275 enum ieee80211_band band;
276 u16 tmp;
277
278 if (!enable) {
279 nphy->rfctrl_intc1_save = b43_phy_read(dev,
280 B43_NPHY_RFCTL_INTC1);
281 nphy->rfctrl_intc2_save = b43_phy_read(dev,
282 B43_NPHY_RFCTL_INTC2);
283 band = b43_current_band(dev->wl);
284 if (dev->phy.rev >= 3) {
285 if (band == IEEE80211_BAND_5GHZ)
286 tmp = 0x600;
287 else
288 tmp = 0x480;
289 } else {
290 if (band == IEEE80211_BAND_5GHZ)
291 tmp = 0x180;
292 else
293 tmp = 0x120;
294 }
295 b43_phy_write(dev, B43_NPHY_RFCTL_INTC1, tmp);
296 b43_phy_write(dev, B43_NPHY_RFCTL_INTC2, tmp);
297 } else {
298 b43_phy_write(dev, B43_NPHY_RFCTL_INTC1,
299 nphy->rfctrl_intc1_save);
300 b43_phy_write(dev, B43_NPHY_RFCTL_INTC2,
301 nphy->rfctrl_intc2_save);
302 }
303}
304
Rafał Miłeckife3e46e2010-01-15 15:51:55 +0100[diff] [blame]305/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/TxLpFbw */
306static void b43_nphy_tx_lp_fbw(struct b43_wldev *dev)
307{
308 struct b43_phy_n *nphy = dev->phy.n;
309 u16 tmp;
310 enum ieee80211_band band = b43_current_band(dev->wl);
311 bool ipa = (nphy->ipa2g_on && band == IEEE80211_BAND_2GHZ) ||
312 (nphy->ipa5g_on && band == IEEE80211_BAND_5GHZ);
313
314 if (dev->phy.rev >= 3) {
315 if (ipa) {
316 tmp = 4;
317 b43_phy_write(dev, B43_NPHY_TXF_40CO_B32S2,
318 (((((tmp << 3) | tmp) << 3) | tmp) << 3) | tmp);
319 }
320
321 tmp = 1;
322 b43_phy_write(dev, B43_NPHY_TXF_40CO_B1S2,
323 (((((tmp << 3) | tmp) << 3) | tmp) << 3) | tmp);
324 }
325}
326
Rafał Miłecki4a933c82010-01-15 13:36:43 +0100[diff] [blame]327/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/BmacPhyClkFgc */
328static void b43_nphy_bmac_clock_fgc(struct b43_wldev *dev, bool force)
329{
330 u32 tmslow;
331
332 if (dev->phy.type != B43_PHYTYPE_N)
333 return;
334
335 tmslow = ssb_read32(dev->dev, SSB_TMSLOW);
336 if (force)
337 tmslow |= SSB_TMSLOW_FGC;
338 else
339 tmslow &= ~SSB_TMSLOW_FGC;
340 ssb_write32(dev->dev, SSB_TMSLOW, tmslow);
341}
342
343/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/CCA */
Michael Buesch95b66ba2008-01-18 01:09:25 +0100[diff] [blame]344static void b43_nphy_reset_cca(struct b43_wldev *dev)
345{
346 u16 bbcfg;
347
Rafał Miłecki4a933c82010-01-15 13:36:43 +0100[diff] [blame]348 b43_nphy_bmac_clock_fgc(dev, 1);
Michael Buesch95b66ba2008-01-18 01:09:25 +0100[diff] [blame]349 bbcfg = b43_phy_read(dev, B43_NPHY_BBCFG);
Rafał Miłecki4a933c82010-01-15 13:36:43 +0100[diff] [blame]350 b43_phy_write(dev, B43_NPHY_BBCFG, bbcfg | B43_NPHY_BBCFG_RSTCCA);
351 udelay(1);
352 b43_phy_write(dev, B43_NPHY_BBCFG, bbcfg & ~B43_NPHY_BBCFG_RSTCCA);
353 b43_nphy_bmac_clock_fgc(dev, 0);
Rafał Miłecki67c0d6e2010-01-17 13:04:02 +0100[diff] [blame]354 b43_nphy_force_rf_sequence(dev, B43_RFSEQ_RESET2RX);
Michael Buesch95b66ba2008-01-18 01:09:25 +0100[diff] [blame]355}
356
Rafał Miłeckiad9716e2010-01-17 13:03:40 +0100[diff] [blame]357/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/MIMOConfig */
358static void b43_nphy_update_mimo_config(struct b43_wldev *dev, s32 preamble)
359{
360 u16 mimocfg = b43_phy_read(dev, B43_NPHY_MIMOCFG);
361
362 mimocfg |= B43_NPHY_MIMOCFG_AUTO;
363 if (preamble == 1)
364 mimocfg |= B43_NPHY_MIMOCFG_GFMIX;
365 else
366 mimocfg &= ~B43_NPHY_MIMOCFG_GFMIX;
367
368 b43_phy_write(dev, B43_NPHY_MIMOCFG, mimocfg);
369}
370
Rafał Miłecki4f4ab6c2010-01-17 13:03:55 +0100[diff] [blame]371/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/Chains */
372static void b43_nphy_update_txrx_chain(struct b43_wldev *dev)
373{
374 struct b43_phy_n *nphy = dev->phy.n;
375
376 bool override = false;
377 u16 chain = 0x33;
378
379 if (nphy->txrx_chain == 0) {
380 chain = 0x11;
381 override = true;
382 } else if (nphy->txrx_chain == 1) {
383 chain = 0x22;
384 override = true;
385 }
386
387 b43_phy_maskset(dev, B43_NPHY_RFSEQCA,
388 ~(B43_NPHY_RFSEQCA_TXEN | B43_NPHY_RFSEQCA_RXEN),
389 chain);
390
391 if (override)
392 b43_phy_set(dev, B43_NPHY_RFSEQMODE,
393 B43_NPHY_RFSEQMODE_CAOVER);
394 else
395 b43_phy_mask(dev, B43_NPHY_RFSEQMODE,
396 ~B43_NPHY_RFSEQMODE_CAOVER);
397}
398
Rafał Miłecki2faa6b82010-01-15 15:26:12 +0100[diff] [blame]399/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/RxIqEst */
400static void b43_nphy_rx_iq_est(struct b43_wldev *dev, struct nphy_iq_est *est,
401 u16 samps, u8 time, bool wait)
402{
403 int i;
404 u16 tmp;
405
406 b43_phy_write(dev, B43_NPHY_IQEST_SAMCNT, samps);
407 b43_phy_maskset(dev, B43_NPHY_IQEST_WT, ~B43_NPHY_IQEST_WT_VAL, time);
408 if (wait)
409 b43_phy_set(dev, B43_NPHY_IQEST_CMD, B43_NPHY_IQEST_CMD_MODE);
410 else
411 b43_phy_mask(dev, B43_NPHY_IQEST_CMD, ~B43_NPHY_IQEST_CMD_MODE);
412
413 b43_phy_set(dev, B43_NPHY_IQEST_CMD, B43_NPHY_IQEST_CMD_START);
414
415 for (i = 1000; i; i--) {
416 tmp = b43_phy_read(dev, B43_NPHY_IQEST_CMD);
417 if (!(tmp & B43_NPHY_IQEST_CMD_START)) {
418 est->i0_pwr = (b43_phy_read(dev, B43_NPHY_IQEST_IPACC_HI0) << 16) |
419 b43_phy_read(dev, B43_NPHY_IQEST_IPACC_LO0);
420 est->q0_pwr = (b43_phy_read(dev, B43_NPHY_IQEST_QPACC_HI0) << 16) |
421 b43_phy_read(dev, B43_NPHY_IQEST_QPACC_LO0);
422 est->iq0_prod = (b43_phy_read(dev, B43_NPHY_IQEST_IQACC_HI0) << 16) |
423 b43_phy_read(dev, B43_NPHY_IQEST_IQACC_LO0);
424
425 est->i1_pwr = (b43_phy_read(dev, B43_NPHY_IQEST_IPACC_HI1) << 16) |
426 b43_phy_read(dev, B43_NPHY_IQEST_IPACC_LO1);
427 est->q1_pwr = (b43_phy_read(dev, B43_NPHY_IQEST_QPACC_HI1) << 16) |
428 b43_phy_read(dev, B43_NPHY_IQEST_QPACC_LO1);
429 est->iq1_prod = (b43_phy_read(dev, B43_NPHY_IQEST_IQACC_HI1) << 16) |
430 b43_phy_read(dev, B43_NPHY_IQEST_IQACC_LO1);
431 return;
432 }
433 udelay(10);
434 }
435 memset(est, 0, sizeof(*est));
436}
437
Rafał Miłeckia67162a2010-01-15 15:16:25 +0100[diff] [blame]438/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/RxIqCoeffs */
439static void b43_nphy_rx_iq_coeffs(struct b43_wldev *dev, bool write,
440 struct b43_phy_n_iq_comp *pcomp)
441{
442 if (write) {
443 b43_phy_write(dev, B43_NPHY_C1_RXIQ_COMPA0, pcomp->a0);
444 b43_phy_write(dev, B43_NPHY_C1_RXIQ_COMPB0, pcomp->b0);
445 b43_phy_write(dev, B43_NPHY_C2_RXIQ_COMPA1, pcomp->a1);
446 b43_phy_write(dev, B43_NPHY_C2_RXIQ_COMPB1, pcomp->b1);
447 } else {
448 pcomp->a0 = b43_phy_read(dev, B43_NPHY_C1_RXIQ_COMPA0);
449 pcomp->b0 = b43_phy_read(dev, B43_NPHY_C1_RXIQ_COMPB0);
450 pcomp->a1 = b43_phy_read(dev, B43_NPHY_C2_RXIQ_COMPA1);
451 pcomp->b1 = b43_phy_read(dev, B43_NPHY_C2_RXIQ_COMPB1);
452 }
453}
454
Rafał Miłecki026816f2010-01-17 13:03:28 +0100[diff] [blame]455/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/RxCalPhyCleanup */
456static void b43_nphy_rx_cal_phy_cleanup(struct b43_wldev *dev, u8 core)
457{
458 u16 *regs = dev->phy.n->tx_rx_cal_phy_saveregs;
459
460 b43_phy_write(dev, B43_NPHY_RFSEQCA, regs[0]);
461 if (core == 0) {
462 b43_phy_write(dev, B43_NPHY_AFECTL_C1, regs[1]);
463 b43_phy_write(dev, B43_NPHY_AFECTL_OVER1, regs[2]);
464 } else {
465 b43_phy_write(dev, B43_NPHY_AFECTL_C2, regs[1]);
466 b43_phy_write(dev, B43_NPHY_AFECTL_OVER, regs[2]);
467 }
468 b43_phy_write(dev, B43_NPHY_RFCTL_INTC1, regs[3]);
469 b43_phy_write(dev, B43_NPHY_RFCTL_INTC2, regs[4]);
470 b43_phy_write(dev, B43_NPHY_RFCTL_RSSIO1, regs[5]);
471 b43_phy_write(dev, B43_NPHY_RFCTL_RSSIO2, regs[6]);
472 b43_phy_write(dev, B43_NPHY_TXF_40CO_B1S1, regs[7]);
473 b43_phy_write(dev, B43_NPHY_RFCTL_OVER, regs[8]);
474 b43_phy_write(dev, B43_NPHY_PAPD_EN0, regs[9]);
475 b43_phy_write(dev, B43_NPHY_PAPD_EN1, regs[10]);
476}
477
478/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/RxCalPhySetup */
479static void b43_nphy_rx_cal_phy_setup(struct b43_wldev *dev, u8 core)
480{
481 u8 rxval, txval;
482 u16 *regs = dev->phy.n->tx_rx_cal_phy_saveregs;
483
484 regs[0] = b43_phy_read(dev, B43_NPHY_RFSEQCA);
485 if (core == 0) {
486 regs[1] = b43_phy_read(dev, B43_NPHY_AFECTL_C1);
487 regs[2] = b43_phy_read(dev, B43_NPHY_AFECTL_OVER1);
488 } else {
489 regs[1] = b43_phy_read(dev, B43_NPHY_AFECTL_C2);
490 regs[2] = b43_phy_read(dev, B43_NPHY_AFECTL_OVER);
491 }
492 regs[3] = b43_phy_read(dev, B43_NPHY_RFCTL_INTC1);
493 regs[4] = b43_phy_read(dev, B43_NPHY_RFCTL_INTC2);
494 regs[5] = b43_phy_read(dev, B43_NPHY_RFCTL_RSSIO1);
495 regs[6] = b43_phy_read(dev, B43_NPHY_RFCTL_RSSIO2);
496 regs[7] = b43_phy_read(dev, B43_NPHY_TXF_40CO_B1S1);
497 regs[8] = b43_phy_read(dev, B43_NPHY_RFCTL_OVER);
498 regs[9] = b43_phy_read(dev, B43_NPHY_PAPD_EN0);
499 regs[10] = b43_phy_read(dev, B43_NPHY_PAPD_EN1);
500
501 b43_phy_mask(dev, B43_NPHY_PAPD_EN0, ~0x0001);
502 b43_phy_mask(dev, B43_NPHY_PAPD_EN1, ~0x0001);
503
Larry Fingeracd82aa2010-07-21 11:48:05 -0500[diff] [blame]504 b43_phy_maskset(dev, B43_NPHY_RFSEQCA,
505 ~B43_NPHY_RFSEQCA_RXDIS & 0xFFFF,
Rafał Miłecki026816f2010-01-17 13:03:28 +0100[diff] [blame]506 ((1 - core) << B43_NPHY_RFSEQCA_RXDIS_SHIFT));
507 b43_phy_maskset(dev, B43_NPHY_RFSEQCA, ~B43_NPHY_RFSEQCA_TXEN,
508 ((1 - core) << B43_NPHY_RFSEQCA_TXEN_SHIFT));
509 b43_phy_maskset(dev, B43_NPHY_RFSEQCA, ~B43_NPHY_RFSEQCA_RXEN,
510 (core << B43_NPHY_RFSEQCA_RXEN_SHIFT));
511 b43_phy_maskset(dev, B43_NPHY_RFSEQCA, ~B43_NPHY_RFSEQCA_TXDIS,
512 (core << B43_NPHY_RFSEQCA_TXDIS_SHIFT));
513
514 if (core == 0) {
515 b43_phy_mask(dev, B43_NPHY_AFECTL_C1, ~0x0007);
516 b43_phy_set(dev, B43_NPHY_AFECTL_OVER1, 0x0007);
517 } else {
518 b43_phy_mask(dev, B43_NPHY_AFECTL_C2, ~0x0007);
519 b43_phy_set(dev, B43_NPHY_AFECTL_OVER, 0x0007);
520 }
521
Rafał Miłecki67cbc3e2010-02-04 12:23:08 +0100[diff] [blame]522 b43_nphy_rf_control_intc_override(dev, 2, 0, 3);
523 b43_nphy_rf_control_override(dev, 8, 0, 3, false);
Rafał Miłecki67c0d6e2010-01-17 13:04:02 +0100[diff] [blame]524 b43_nphy_force_rf_sequence(dev, B43_RFSEQ_RX2TX);
Rafał Miłecki026816f2010-01-17 13:03:28 +0100[diff] [blame]525
526 if (core == 0) {
527 rxval = 1;
528 txval = 8;
529 } else {
530 rxval = 4;
531 txval = 2;
532 }
Rafał Miłecki67cbc3e2010-02-04 12:23:08 +0100[diff] [blame]533 b43_nphy_rf_control_intc_override(dev, 1, rxval, (core + 1));
534 b43_nphy_rf_control_intc_override(dev, 1, txval, (2 - core));
Rafał Miłecki026816f2010-01-17 13:03:28 +0100[diff] [blame]535}
536
Rafał Miłecki34a56f22010-01-15 15:29:05 +0100[diff] [blame]537/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/CalcRxIqComp */
538static void b43_nphy_calc_rx_iq_comp(struct b43_wldev *dev, u8 mask)
539{
540 int i;
541 s32 iq;
542 u32 ii;
543 u32 qq;
544 int iq_nbits, qq_nbits;
545 int arsh, brsh;
546 u16 tmp, a, b;
547
548 struct nphy_iq_est est;
549 struct b43_phy_n_iq_comp old;
550 struct b43_phy_n_iq_comp new = { };
551 bool error = false;
552
553 if (mask == 0)
554 return;
555
556 b43_nphy_rx_iq_coeffs(dev, false, &old);
557 b43_nphy_rx_iq_coeffs(dev, true, &new);
558 b43_nphy_rx_iq_est(dev, &est, 0x4000, 32, false);
559 new = old;
560
561 for (i = 0; i < 2; i++) {
562 if (i == 0 && (mask & 1)) {
563 iq = est.iq0_prod;
564 ii = est.i0_pwr;
565 qq = est.q0_pwr;
566 } else if (i == 1 && (mask & 2)) {
567 iq = est.iq1_prod;
568 ii = est.i1_pwr;
569 qq = est.q1_pwr;
570 } else {
571 B43_WARN_ON(1);
572 continue;
573 }
574
575 if (ii + qq < 2) {
576 error = true;
577 break;
578 }
579
580 iq_nbits = fls(abs(iq));
581 qq_nbits = fls(qq);
582
583 arsh = iq_nbits - 20;
584 if (arsh >= 0) {
585 a = -((iq << (30 - iq_nbits)) + (ii >> (1 + arsh)));
586 tmp = ii >> arsh;
587 } else {
588 a = -((iq << (30 - iq_nbits)) + (ii << (-1 - arsh)));
589 tmp = ii << -arsh;
590 }
591 if (tmp == 0) {
592 error = true;
593 break;
594 }
595 a /= tmp;
596
597 brsh = qq_nbits - 11;
598 if (brsh >= 0) {
599 b = (qq << (31 - qq_nbits));
600 tmp = ii >> brsh;
601 } else {
602 b = (qq << (31 - qq_nbits));
603 tmp = ii << -brsh;
604 }
605 if (tmp == 0) {
606 error = true;
607 break;
608 }
609 b = int_sqrt(b / tmp - a * a) - (1 << 10);
610
611 if (i == 0 && (mask & 0x1)) {
612 if (dev->phy.rev >= 3) {
613 new.a0 = a & 0x3FF;
614 new.b0 = b & 0x3FF;
615 } else {
616 new.a0 = b & 0x3FF;
617 new.b0 = a & 0x3FF;
618 }
619 } else if (i == 1 && (mask & 0x2)) {
620 if (dev->phy.rev >= 3) {
621 new.a1 = a & 0x3FF;
622 new.b1 = b & 0x3FF;
623 } else {
624 new.a1 = b & 0x3FF;
625 new.b1 = a & 0x3FF;
626 }
627 }
628 }
629
630 if (error)
631 new = old;
632
633 b43_nphy_rx_iq_coeffs(dev, true, &new);
634}
635
Rafał Miłecki09146402010-01-15 15:17:10 +0100[diff] [blame]636/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/TxIqWar */
637static void b43_nphy_tx_iq_workaround(struct b43_wldev *dev)
638{
639 u16 array[4];
640 int i;
641
642 b43_phy_write(dev, B43_NPHY_TABLE_ADDR, 0x3C50);
643 for (i = 0; i < 4; i++)
644 array[i] = b43_phy_read(dev, B43_NPHY_TABLE_DATALO);
645
646 b43_shm_write16(dev, B43_SHM_SHARED, B43_SHM_SH_NPHY_TXIQW0, array[0]);
647 b43_shm_write16(dev, B43_SHM_SHARED, B43_SHM_SH_NPHY_TXIQW1, array[1]);
648 b43_shm_write16(dev, B43_SHM_SHARED, B43_SHM_SH_NPHY_TXIQW2, array[2]);
649 b43_shm_write16(dev, B43_SHM_SHARED, B43_SHM_SH_NPHY_TXIQW3, array[3]);
650}
651
Rafał Miłeckibbec3982010-01-15 14:31:39 +0100[diff] [blame]652/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/clip-detection */
653static void b43_nphy_write_clip_detection(struct b43_wldev *dev, u16 *clip_st)
654{
655 b43_phy_write(dev, B43_NPHY_C1_CLIP1THRES, clip_st[0]);
656 b43_phy_write(dev, B43_NPHY_C2_CLIP1THRES, clip_st[1]);
657}
658
659/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/clip-detection */
660static void b43_nphy_read_clip_detection(struct b43_wldev *dev, u16 *clip_st)
661{
662 clip_st[0] = b43_phy_read(dev, B43_NPHY_C1_CLIP1THRES);
663 clip_st[1] = b43_phy_read(dev, B43_NPHY_C2_CLIP1THRES);
664}
665
Rafał Miłecki8987a9e2010-02-27 13:03:33 +0100[diff] [blame]666/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/SuperSwitchInit */
667static void b43_nphy_superswitch_init(struct b43_wldev *dev, bool init)
668{
669 if (dev->phy.rev >= 3) {
670 if (!init)
671 return;
672 if (0 /* FIXME */) {
673 b43_ntab_write(dev, B43_NTAB16(9, 2), 0x211);
674 b43_ntab_write(dev, B43_NTAB16(9, 3), 0x222);
675 b43_ntab_write(dev, B43_NTAB16(9, 8), 0x144);
676 b43_ntab_write(dev, B43_NTAB16(9, 12), 0x188);
677 }
678 } else {
679 b43_phy_write(dev, B43_NPHY_GPIO_LOOEN, 0);
680 b43_phy_write(dev, B43_NPHY_GPIO_HIOEN, 0);
681
682 ssb_chipco_gpio_control(&dev->dev->bus->chipco, 0xFC00,
683 0xFC00);
684 b43_write32(dev, B43_MMIO_MACCTL,
685 b43_read32(dev, B43_MMIO_MACCTL) &
686 ~B43_MACCTL_GPOUTSMSK);
687 b43_write16(dev, B43_MMIO_GPIO_MASK,
688 b43_read16(dev, B43_MMIO_GPIO_MASK) | 0xFC00);
689 b43_write16(dev, B43_MMIO_GPIO_CONTROL,
690 b43_read16(dev, B43_MMIO_GPIO_CONTROL) & ~0xFC00);
691
692 if (init) {
693 b43_phy_write(dev, B43_NPHY_RFCTL_LUT_TRSW_LO1, 0x2D8);
694 b43_phy_write(dev, B43_NPHY_RFCTL_LUT_TRSW_UP1, 0x301);
695 b43_phy_write(dev, B43_NPHY_RFCTL_LUT_TRSW_LO2, 0x2D8);
696 b43_phy_write(dev, B43_NPHY_RFCTL_LUT_TRSW_UP2, 0x301);
697 }
698 }
699}
700
Rafał Miłeckibbec3982010-01-15 14:31:39 +0100[diff] [blame]701/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/classifier */
702static u16 b43_nphy_classifier(struct b43_wldev *dev, u16 mask, u16 val)
703{
704 u16 tmp;
705
706 if (dev->dev->id.revision == 16)
707 b43_mac_suspend(dev);
708
709 tmp = b43_phy_read(dev, B43_NPHY_CLASSCTL);
710 tmp &= (B43_NPHY_CLASSCTL_CCKEN | B43_NPHY_CLASSCTL_OFDMEN |
711 B43_NPHY_CLASSCTL_WAITEDEN);
712 tmp &= ~mask;
713 tmp |= (val & mask);
714 b43_phy_maskset(dev, B43_NPHY_CLASSCTL, 0xFFF8, tmp);
715
716 if (dev->dev->id.revision == 16)
717 b43_mac_enable(dev);
718
719 return tmp;
720}
721
Rafał Miłecki5c1a1402010-01-15 15:10:54 +0100[diff] [blame]722/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/carriersearch */
723static void b43_nphy_stay_in_carrier_search(struct b43_wldev *dev, bool enable)
724{
725 struct b43_phy *phy = &dev->phy;
726 struct b43_phy_n *nphy = phy->n;
727
728 if (enable) {
729 u16 clip[] = { 0xFFFF, 0xFFFF };
730 if (nphy->deaf_count++ == 0) {
731 nphy->classifier_state = b43_nphy_classifier(dev, 0, 0);
732 b43_nphy_classifier(dev, 0x7, 0);
733 b43_nphy_read_clip_detection(dev, nphy->clip_state);
734 b43_nphy_write_clip_detection(dev, clip);
735 }
736 b43_nphy_reset_cca(dev);
737 } else {
738 if (--nphy->deaf_count == 0) {
739 b43_nphy_classifier(dev, 0x7, nphy->classifier_state);
740 b43_nphy_write_clip_detection(dev, nphy->clip_state);
741 }
742 }
743}
744
Rafał Miłecki53ae8e82010-01-17 13:03:48 +0100[diff] [blame]745/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/stop-playback */
746static void b43_nphy_stop_playback(struct b43_wldev *dev)
747{
748 struct b43_phy_n *nphy = dev->phy.n;
749 u16 tmp;
750
751 if (nphy->hang_avoid)
752 b43_nphy_stay_in_carrier_search(dev, 1);
753
754 tmp = b43_phy_read(dev, B43_NPHY_SAMP_STAT);
755 if (tmp & 0x1)
756 b43_phy_set(dev, B43_NPHY_SAMP_CMD, B43_NPHY_SAMP_CMD_STOP);
757 else if (tmp & 0x2)
Larry Fingeracd82aa2010-07-21 11:48:05 -0500[diff] [blame]758 b43_phy_mask(dev, B43_NPHY_IQLOCAL_CMDGCTL, 0x7FFF);
Rafał Miłecki53ae8e82010-01-17 13:03:48 +0100[diff] [blame]759
760 b43_phy_mask(dev, B43_NPHY_SAMP_CMD, ~0x0004);
761
762 if (nphy->bb_mult_save & 0x80000000) {
763 tmp = nphy->bb_mult_save & 0xFFFF;
Rafał Miłeckid41a3552010-01-18 00:21:17 +0100[diff] [blame]764 b43_ntab_write(dev, B43_NTAB16(15, 87), tmp);
Rafał Miłecki53ae8e82010-01-17 13:03:48 +0100[diff] [blame]765 nphy->bb_mult_save = 0;
766 }
767
768 if (nphy->hang_avoid)
769 b43_nphy_stay_in_carrier_search(dev, 0);
770}
771
Rafał Miłecki9442e5b2010-02-04 12:23:12 +0100[diff] [blame]772/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/SpurWar */
773static void b43_nphy_spur_workaround(struct b43_wldev *dev)
774{
775 struct b43_phy_n *nphy = dev->phy.n;
776
Rafał Miłecki204a6652010-10-14 19:33:34 +0200[diff] [blame]777 u8 channel = dev->phy.channel;
Rafał Miłecki9442e5b2010-02-04 12:23:12 +0100[diff] [blame]778 int tone[2] = { 57, 58 };
779 u32 noise[2] = { 0x3FF, 0x3FF };
780
781 B43_WARN_ON(dev->phy.rev < 3);
782
783 if (nphy->hang_avoid)
784 b43_nphy_stay_in_carrier_search(dev, 1);
785
Rafał Miłecki9442e5b2010-02-04 12:23:12 +0100[diff] [blame]786 if (nphy->gband_spurwar_en) {
787 /* TODO: N PHY Adjust Analog Pfbw (7) */
788 if (channel == 11 && dev->phy.is_40mhz)
789 ; /* TODO: N PHY Adjust Min Noise Var(2, tone, noise)*/
790 else
791 ; /* TODO: N PHY Adjust Min Noise Var(0, NULL, NULL)*/
792 /* TODO: N PHY Adjust CRS Min Power (0x1E) */
793 }
794
795 if (nphy->aband_spurwar_en) {
796 if (channel == 54) {
797 tone[0] = 0x20;
798 noise[0] = 0x25F;
799 } else if (channel == 38 || channel == 102 || channel == 118) {
800 if (0 /* FIXME */) {
801 tone[0] = 0x20;
802 noise[0] = 0x21F;
803 } else {
804 tone[0] = 0;
805 noise[0] = 0;
806 }
807 } else if (channel == 134) {
808 tone[0] = 0x20;
809 noise[0] = 0x21F;
810 } else if (channel == 151) {
811 tone[0] = 0x10;
812 noise[0] = 0x23F;
813 } else if (channel == 153 || channel == 161) {
814 tone[0] = 0x30;
815 noise[0] = 0x23F;
816 } else {
817 tone[0] = 0;
818 noise[0] = 0;
819 }
820
821 if (!tone[0] && !noise[0])
822 ; /* TODO: N PHY Adjust Min Noise Var(1, tone, noise)*/
823 else
824 ; /* TODO: N PHY Adjust Min Noise Var(0, NULL, NULL)*/
825 }
826
827 if (nphy->hang_avoid)
828 b43_nphy_stay_in_carrier_search(dev, 0);
829}
830
Rafał Miłeckid24019a2010-02-27 13:03:38 +0100[diff] [blame]831/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/AdjustLnaGainTbl */
832static void b43_nphy_adjust_lna_gain_table(struct b43_wldev *dev)
833{
834 struct b43_phy_n *nphy = dev->phy.n;
835
836 u8 i;
837 s16 tmp;
838 u16 data[4];
839 s16 gain[2];
840 u16 minmax[2];
841 u16 lna_gain[4] = { -2, 10, 19, 25 };
842
843 if (nphy->hang_avoid)
844 b43_nphy_stay_in_carrier_search(dev, 1);
845
846 if (nphy->gain_boost) {
847 if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ) {
848 gain[0] = 6;
849 gain[1] = 6;
850 } else {
Rafał Miłecki204a6652010-10-14 19:33:34 +0200[diff] [blame]851 tmp = 40370 - 315 * dev->phy.channel;
Rafał Miłeckid24019a2010-02-27 13:03:38 +0100[diff] [blame]852 gain[0] = ((tmp >> 13) + ((tmp >> 12) & 1));
Rafał Miłecki204a6652010-10-14 19:33:34 +0200[diff] [blame]853 tmp = 23242 - 224 * dev->phy.channel;
Rafał Miłeckid24019a2010-02-27 13:03:38 +0100[diff] [blame]854 gain[1] = ((tmp >> 13) + ((tmp >> 12) & 1));
855 }
856 } else {
857 gain[0] = 0;
858 gain[1] = 0;
859 }
860
861 for (i = 0; i < 2; i++) {
862 if (nphy->elna_gain_config) {
863 data[0] = 19 + gain[i];
864 data[1] = 25 + gain[i];
865 data[2] = 25 + gain[i];
866 data[3] = 25 + gain[i];
867 } else {
868 data[0] = lna_gain[0] + gain[i];
869 data[1] = lna_gain[1] + gain[i];
870 data[2] = lna_gain[2] + gain[i];
871 data[3] = lna_gain[3] + gain[i];
872 }
873 b43_ntab_write_bulk(dev, B43_NTAB16(10, 8), 4, data);
874
875 minmax[i] = 23 + gain[i];
876 }
877
878 b43_phy_maskset(dev, B43_NPHY_C1_MINMAX_GAIN, ~B43_NPHY_C1_MINGAIN,
879 minmax[0] << B43_NPHY_C1_MINGAIN_SHIFT);
880 b43_phy_maskset(dev, B43_NPHY_C2_MINMAX_GAIN, ~B43_NPHY_C2_MINGAIN,
881 minmax[1] << B43_NPHY_C2_MINGAIN_SHIFT);
882
883 if (nphy->hang_avoid)
884 b43_nphy_stay_in_carrier_search(dev, 0);
885}
886
Rafał Miłeckief5127a2010-01-30 00:12:20 +0100[diff] [blame]887/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/WorkaroundsGainCtrl */
Gábor Stefanike723ef32010-08-16 22:39:15 +0200[diff] [blame]888static void b43_nphy_gain_ctrl_workarounds(struct b43_wldev *dev)
Rafał Miłeckief5127a2010-01-30 00:12:20 +0100[diff] [blame]889{
890 struct b43_phy_n *nphy = dev->phy.n;
891 u8 i, j;
892 u8 code;
893
894 /* TODO: for PHY >= 3
895 s8 *lna1_gain, *lna2_gain;
896 u8 *gain_db, *gain_bits;
897 u16 *rfseq_init;
898 u8 lpf_gain[6] = { 0x00, 0x06, 0x0C, 0x12, 0x12, 0x12 };
899 u8 lpf_bits[6] = { 0, 1, 2, 3, 3, 3 };
900 */
901
902 u8 rfseq_events[3] = { 6, 8, 7 };
903 u8 rfseq_delays[3] = { 10, 30, 1 };
904
905 if (dev->phy.rev >= 3) {
906 /* TODO */
907 } else {
908 /* Set Clip 2 detect */
909 b43_phy_set(dev, B43_NPHY_C1_CGAINI,
910 B43_NPHY_C1_CGAINI_CL2DETECT);
911 b43_phy_set(dev, B43_NPHY_C2_CGAINI,
912 B43_NPHY_C2_CGAINI_CL2DETECT);
913
914 /* Set narrowband clip threshold */
915 b43_phy_set(dev, B43_NPHY_C1_NBCLIPTHRES, 0x84);
916 b43_phy_set(dev, B43_NPHY_C2_NBCLIPTHRES, 0x84);
917
918 if (!dev->phy.is_40mhz) {
919 /* Set dwell lengths */
920 b43_phy_set(dev, B43_NPHY_CLIP1_NBDWELL_LEN, 0x002B);
921 b43_phy_set(dev, B43_NPHY_CLIP2_NBDWELL_LEN, 0x002B);
922 b43_phy_set(dev, B43_NPHY_W1CLIP1_DWELL_LEN, 0x0009);
923 b43_phy_set(dev, B43_NPHY_W1CLIP2_DWELL_LEN, 0x0009);
924 }
925
926 /* Set wideband clip 2 threshold */
927 b43_phy_maskset(dev, B43_NPHY_C1_CLIPWBTHRES,
928 ~B43_NPHY_C1_CLIPWBTHRES_CLIP2,
929 21);
930 b43_phy_maskset(dev, B43_NPHY_C2_CLIPWBTHRES,
931 ~B43_NPHY_C2_CLIPWBTHRES_CLIP2,
932 21);
933
934 if (!dev->phy.is_40mhz) {
935 b43_phy_maskset(dev, B43_NPHY_C1_CGAINI,
936 ~B43_NPHY_C1_CGAINI_GAINBKOFF, 0x1);
937 b43_phy_maskset(dev, B43_NPHY_C2_CGAINI,
938 ~B43_NPHY_C2_CGAINI_GAINBKOFF, 0x1);
939 b43_phy_maskset(dev, B43_NPHY_C1_CCK_CGAINI,
940 ~B43_NPHY_C1_CCK_CGAINI_GAINBKOFF, 0x1);
941 b43_phy_maskset(dev, B43_NPHY_C2_CCK_CGAINI,
942 ~B43_NPHY_C2_CCK_CGAINI_GAINBKOFF, 0x1);
943 }
944
945 b43_phy_set(dev, B43_NPHY_CCK_SHIFTB_REF, 0x809C);
946
947 if (nphy->gain_boost) {
948 if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ &&
949 dev->phy.is_40mhz)
950 code = 4;
951 else
952 code = 5;
953 } else {
954 code = dev->phy.is_40mhz ? 6 : 7;
955 }
956
957 /* Set HPVGA2 index */
958 b43_phy_maskset(dev, B43_NPHY_C1_INITGAIN,
959 ~B43_NPHY_C1_INITGAIN_HPVGA2,
960 code << B43_NPHY_C1_INITGAIN_HPVGA2_SHIFT);
961 b43_phy_maskset(dev, B43_NPHY_C2_INITGAIN,
962 ~B43_NPHY_C2_INITGAIN_HPVGA2,
963 code << B43_NPHY_C2_INITGAIN_HPVGA2_SHIFT);
964
965 b43_phy_write(dev, B43_NPHY_TABLE_ADDR, 0x1D06);
966 b43_phy_write(dev, B43_NPHY_TABLE_DATALO,
967 (code << 8 | 0x7C));
968 b43_phy_write(dev, B43_NPHY_TABLE_DATALO,
969 (code << 8 | 0x7C));
970
Rafał Miłeckid24019a2010-02-27 13:03:38 +0100[diff] [blame]971 b43_nphy_adjust_lna_gain_table(dev);
Rafał Miłeckief5127a2010-01-30 00:12:20 +0100[diff] [blame]972
973 if (nphy->elna_gain_config) {
974 b43_phy_write(dev, B43_NPHY_TABLE_ADDR, 0x0808);
975 b43_phy_write(dev, B43_NPHY_TABLE_DATALO, 0x0);
976 b43_phy_write(dev, B43_NPHY_TABLE_DATALO, 0x1);
977 b43_phy_write(dev, B43_NPHY_TABLE_DATALO, 0x1);
978 b43_phy_write(dev, B43_NPHY_TABLE_DATALO, 0x1);
979
980 b43_phy_write(dev, B43_NPHY_TABLE_ADDR, 0x0C08);
981 b43_phy_write(dev, B43_NPHY_TABLE_DATALO, 0x0);
982 b43_phy_write(dev, B43_NPHY_TABLE_DATALO, 0x1);
983 b43_phy_write(dev, B43_NPHY_TABLE_DATALO, 0x1);
984 b43_phy_write(dev, B43_NPHY_TABLE_DATALO, 0x1);
985
986 b43_phy_write(dev, B43_NPHY_TABLE_ADDR, 0x1D06);
987 b43_phy_write(dev, B43_NPHY_TABLE_DATALO,
988 (code << 8 | 0x74));
989 b43_phy_write(dev, B43_NPHY_TABLE_DATALO,
990 (code << 8 | 0x74));
991 }
992
993 if (dev->phy.rev == 2) {
994 for (i = 0; i < 4; i++) {
995 b43_phy_write(dev, B43_NPHY_TABLE_ADDR,
996 (0x0400 * i) + 0x0020);
997 for (j = 0; j < 21; j++)
998 b43_phy_write(dev,
999 B43_NPHY_TABLE_DATALO, 3 * j);
1000 }
1001
Rafał Miłecki9501fef2010-01-30 20:18:07 +0100[diff] [blame]1002 b43_nphy_set_rf_sequence(dev, 5,
1003 rfseq_events, rfseq_delays, 3);
Rafał Miłeckief5127a2010-01-30 00:12:20 +0100[diff] [blame]1004 b43_phy_maskset(dev, B43_NPHY_OVER_DGAIN1,
Larry Fingeracd82aa2010-07-21 11:48:05 -0500[diff] [blame]1005 ~B43_NPHY_OVER_DGAIN_CCKDGECV & 0xFFFF,
Rafał Miłeckief5127a2010-01-30 00:12:20 +0100[diff] [blame]1006 0x5A << B43_NPHY_OVER_DGAIN_CCKDGECV_SHIFT);
1007
1008 if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ)
1009 b43_phy_maskset(dev, B43_PHY_N(0xC5D),
1010 0xFF80, 4);
1011 }
1012 }
1013}
1014
Rafał Miłecki28fd7da2010-01-30 00:12:19 +0100[diff] [blame]1015/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/Workarounds */
1016static void b43_nphy_workarounds(struct b43_wldev *dev)
1017{
1018 struct ssb_bus *bus = dev->dev->bus;
1019 struct b43_phy *phy = &dev->phy;
1020 struct b43_phy_n *nphy = phy->n;
1021
1022 u8 events1[7] = { 0x0, 0x1, 0x2, 0x8, 0x4, 0x5, 0x3 };
1023 u8 delays1[7] = { 0x8, 0x6, 0x6, 0x2, 0x4, 0x3C, 0x1 };
1024
1025 u8 events2[7] = { 0x0, 0x3, 0x5, 0x4, 0x2, 0x1, 0x8 };
1026 u8 delays2[7] = { 0x8, 0x6, 0x2, 0x4, 0x4, 0x6, 0x1 };
1027
1028 if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ)
1029 b43_nphy_classifier(dev, 1, 0);
1030 else
1031 b43_nphy_classifier(dev, 1, 1);
1032
1033 if (nphy->hang_avoid)
1034 b43_nphy_stay_in_carrier_search(dev, 1);
1035
1036 b43_phy_set(dev, B43_NPHY_IQFLIP,
1037 B43_NPHY_IQFLIP_ADC1 | B43_NPHY_IQFLIP_ADC2);
1038
1039 if (dev->phy.rev >= 3) {
1040 /* TODO */
1041 } else {
1042 if (b43_current_band(dev->wl) == IEEE80211_BAND_5GHZ &&
1043 nphy->band5g_pwrgain) {
1044 b43_radio_mask(dev, B2055_C1_TX_RF_SPARE, ~0x8);
1045 b43_radio_mask(dev, B2055_C2_TX_RF_SPARE, ~0x8);
1046 } else {
1047 b43_radio_set(dev, B2055_C1_TX_RF_SPARE, 0x8);
1048 b43_radio_set(dev, B2055_C2_TX_RF_SPARE, 0x8);
1049 }
1050
1051 /* TODO: convert to b43_ntab_write? */
1052 b43_phy_write(dev, B43_NPHY_TABLE_ADDR, 0x2000);
1053 b43_phy_write(dev, B43_NPHY_TABLE_DATALO, 0x000A);
1054 b43_phy_write(dev, B43_NPHY_TABLE_ADDR, 0x2010);
1055 b43_phy_write(dev, B43_NPHY_TABLE_DATALO, 0x000A);
1056 b43_phy_write(dev, B43_NPHY_TABLE_ADDR, 0x2002);
1057 b43_phy_write(dev, B43_NPHY_TABLE_DATALO, 0xCDAA);
1058 b43_phy_write(dev, B43_NPHY_TABLE_ADDR, 0x2012);
1059 b43_phy_write(dev, B43_NPHY_TABLE_DATALO, 0xCDAA);
1060
1061 if (dev->phy.rev < 2) {
1062 b43_phy_write(dev, B43_NPHY_TABLE_ADDR, 0x2008);
1063 b43_phy_write(dev, B43_NPHY_TABLE_DATALO, 0x0000);
1064 b43_phy_write(dev, B43_NPHY_TABLE_ADDR, 0x2018);
1065 b43_phy_write(dev, B43_NPHY_TABLE_DATALO, 0x0000);
1066 b43_phy_write(dev, B43_NPHY_TABLE_ADDR, 0x2007);
1067 b43_phy_write(dev, B43_NPHY_TABLE_DATALO, 0x7AAB);
1068 b43_phy_write(dev, B43_NPHY_TABLE_ADDR, 0x2017);
1069 b43_phy_write(dev, B43_NPHY_TABLE_DATALO, 0x7AAB);
1070 b43_phy_write(dev, B43_NPHY_TABLE_ADDR, 0x2006);
1071 b43_phy_write(dev, B43_NPHY_TABLE_DATALO, 0x0800);
1072 b43_phy_write(dev, B43_NPHY_TABLE_ADDR, 0x2016);
1073 b43_phy_write(dev, B43_NPHY_TABLE_DATALO, 0x0800);
1074 }
1075
1076 b43_phy_write(dev, B43_NPHY_RFCTL_LUT_TRSW_LO1, 0x2D8);
1077 b43_phy_write(dev, B43_NPHY_RFCTL_LUT_TRSW_UP1, 0x301);
1078 b43_phy_write(dev, B43_NPHY_RFCTL_LUT_TRSW_LO2, 0x2D8);
1079 b43_phy_write(dev, B43_NPHY_RFCTL_LUT_TRSW_UP2, 0x301);
1080
1081 if (bus->sprom.boardflags2_lo & 0x100 &&
1082 bus->boardinfo.type == 0x8B) {
1083 delays1[0] = 0x1;
1084 delays1[5] = 0x14;
1085 }
Rafał Miłecki9501fef2010-01-30 20:18:07 +0100[diff] [blame]1086 b43_nphy_set_rf_sequence(dev, 0, events1, delays1, 7);
1087 b43_nphy_set_rf_sequence(dev, 1, events2, delays2, 7);
Rafał Miłecki28fd7da2010-01-30 00:12:19 +0100[diff] [blame]1088
Gábor Stefanike723ef32010-08-16 22:39:15 +0200[diff] [blame]1089 b43_nphy_gain_ctrl_workarounds(dev);
Rafał Miłecki28fd7da2010-01-30 00:12:19 +0100[diff] [blame]1090
1091 if (dev->phy.rev < 2) {
1092 if (b43_phy_read(dev, B43_NPHY_RXCTL) & 0x2)
Gábor Stefanike7f45d32010-08-16 22:39:14 +0200[diff] [blame]1093 b43_hf_write(dev, b43_hf_read(dev) |
1094 B43_HF_MLADVW);
Rafał Miłecki28fd7da2010-01-30 00:12:19 +0100[diff] [blame]1095 } else if (dev->phy.rev == 2) {
1096 b43_phy_write(dev, B43_NPHY_CRSCHECK2, 0);
1097 b43_phy_write(dev, B43_NPHY_CRSCHECK3, 0);
1098 }
1099
1100 if (dev->phy.rev < 2)
1101 b43_phy_mask(dev, B43_NPHY_SCRAM_SIGCTL,
1102 ~B43_NPHY_SCRAM_SIGCTL_SCM);
1103
1104 /* Set phase track alpha and beta */
1105 b43_phy_write(dev, B43_NPHY_PHASETR_A0, 0x125);
1106 b43_phy_write(dev, B43_NPHY_PHASETR_A1, 0x1B3);
1107 b43_phy_write(dev, B43_NPHY_PHASETR_A2, 0x105);
1108 b43_phy_write(dev, B43_NPHY_PHASETR_B0, 0x16E);
1109 b43_phy_write(dev, B43_NPHY_PHASETR_B1, 0xCD);
1110 b43_phy_write(dev, B43_NPHY_PHASETR_B2, 0x20);
1111
1112 b43_phy_mask(dev, B43_NPHY_PIL_DW1,
Larry Fingeracd82aa2010-07-21 11:48:05 -0500[diff] [blame]1113 ~B43_NPHY_PIL_DW_64QAM & 0xFFFF);
Rafał Miłecki28fd7da2010-01-30 00:12:19 +0100[diff] [blame]1114 b43_phy_write(dev, B43_NPHY_TXF_20CO_S2B1, 0xB5);
1115 b43_phy_write(dev, B43_NPHY_TXF_20CO_S2B2, 0xA4);
1116 b43_phy_write(dev, B43_NPHY_TXF_20CO_S2B3, 0x00);
1117
1118 if (dev->phy.rev == 2)
1119 b43_phy_set(dev, B43_NPHY_FINERX2_CGC,
1120 B43_NPHY_FINERX2_CGC_DECGC);
1121 }
1122
1123 if (nphy->hang_avoid)
1124 b43_nphy_stay_in_carrier_search(dev, 0);
1125}
1126
Rafał Miłecki5f6393e2010-02-04 13:08:08 +0100[diff] [blame]1127/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/LoadSampleTable */
1128static int b43_nphy_load_samples(struct b43_wldev *dev,
1129 struct b43_c32 *samples, u16 len) {
1130 struct b43_phy_n *nphy = dev->phy.n;
1131 u16 i;
1132 u32 *data;
1133
1134 data = kzalloc(len * sizeof(u32), GFP_KERNEL);
1135 if (!data) {
1136 b43err(dev->wl, "allocation for samples loading failed\n");
1137 return -ENOMEM;
1138 }
1139 if (nphy->hang_avoid)
1140 b43_nphy_stay_in_carrier_search(dev, 1);
1141
1142 for (i = 0; i < len; i++) {
1143 data[i] = (samples[i].i & 0x3FF << 10);
1144 data[i] |= samples[i].q & 0x3FF;
1145 }
1146 b43_ntab_write_bulk(dev, B43_NTAB32(17, 0), len, data);
1147
1148 kfree(data);
1149 if (nphy->hang_avoid)
1150 b43_nphy_stay_in_carrier_search(dev, 0);
1151 return 0;
1152}
1153
Rafał Miłecki59af0992010-01-22 01:53:16 +0100[diff] [blame]1154/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/GenLoadSamples */
1155static u16 b43_nphy_gen_load_samples(struct b43_wldev *dev, u32 freq, u16 max,
1156 bool test)
1157{
1158 int i;
Rafał Miłeckif2982182010-01-25 19:00:01 +0100[diff] [blame]1159 u16 bw, len, rot, angle;
Larry Fingerda860472010-01-26 16:42:02 -0600[diff] [blame]1160 struct b43_c32 *samples;
Rafał Miłeckif2982182010-01-25 19:00:01 +0100[diff] [blame]1161
Rafał Miłecki59af0992010-01-22 01:53:16 +0100[diff] [blame]1162
1163 bw = (dev->phy.is_40mhz) ? 40 : 20;
1164 len = bw << 3;
1165
1166 if (test) {
1167 if (b43_phy_read(dev, B43_NPHY_BBCFG) & B43_NPHY_BBCFG_RSTRX)
1168 bw = 82;
1169 else
1170 bw = 80;
1171
1172 if (dev->phy.is_40mhz)
1173 bw <<= 1;
1174
1175 len = bw << 1;
1176 }
1177
Larry Fingerda860472010-01-26 16:42:02 -0600[diff] [blame]1178 samples = kzalloc(len * sizeof(struct b43_c32), GFP_KERNEL);
Rafał Miłecki40bd5202010-02-04 13:11:54 +0100[diff] [blame]1179 if (!samples) {
1180 b43err(dev->wl, "allocation for samples generation failed\n");
1181 return 0;
1182 }
Rafał Miłecki59af0992010-01-22 01:53:16 +0100[diff] [blame]1183 rot = (((freq * 36) / bw) << 16) / 100;
1184 angle = 0;
1185
Rafał Miłeckif2982182010-01-25 19:00:01 +0100[diff] [blame]1186 for (i = 0; i < len; i++) {
1187 samples[i] = b43_cordic(angle);
1188 angle += rot;
1189 samples[i].q = CORDIC_CONVERT(samples[i].q * max);
1190 samples[i].i = CORDIC_CONVERT(samples[i].i * max);
Rafał Miłecki59af0992010-01-22 01:53:16 +0100[diff] [blame]1191 }
1192
Rafał Miłecki5f6393e2010-02-04 13:08:08 +0100[diff] [blame]1193 i = b43_nphy_load_samples(dev, samples, len);
Rafał Miłeckif2982182010-01-25 19:00:01 +0100[diff] [blame]1194 kfree(samples);
Rafał Miłecki5f6393e2010-02-04 13:08:08 +0100[diff] [blame]1195 return (i < 0) ? 0 : len;
Rafał Miłecki59af0992010-01-22 01:53:16 +0100[diff] [blame]1196}
1197
Rafał Miłecki10a79872010-01-22 01:53:14 +0100[diff] [blame]1198/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/RunSamples */
1199static void b43_nphy_run_samples(struct b43_wldev *dev, u16 samps, u16 loops,
1200 u16 wait, bool iqmode, bool dac_test)
1201{
1202 struct b43_phy_n *nphy = dev->phy.n;
1203 int i;
1204 u16 seq_mode;
1205 u32 tmp;
1206
1207 if (nphy->hang_avoid)
1208 b43_nphy_stay_in_carrier_search(dev, true);
1209
1210 if ((nphy->bb_mult_save & 0x80000000) == 0) {
1211 tmp = b43_ntab_read(dev, B43_NTAB16(15, 87));
1212 nphy->bb_mult_save = (tmp & 0xFFFF) | 0x80000000;
1213 }
1214
1215 if (!dev->phy.is_40mhz)
1216 tmp = 0x6464;
1217 else
1218 tmp = 0x4747;
1219 b43_ntab_write(dev, B43_NTAB16(15, 87), tmp);
1220
1221 if (nphy->hang_avoid)
1222 b43_nphy_stay_in_carrier_search(dev, false);
1223
1224 b43_phy_write(dev, B43_NPHY_SAMP_DEPCNT, (samps - 1));
1225
1226 if (loops != 0xFFFF)
1227 b43_phy_write(dev, B43_NPHY_SAMP_LOOPCNT, (loops - 1));
1228 else
1229 b43_phy_write(dev, B43_NPHY_SAMP_LOOPCNT, loops);
1230
1231 b43_phy_write(dev, B43_NPHY_SAMP_WAITCNT, wait);
1232
1233 seq_mode = b43_phy_read(dev, B43_NPHY_RFSEQMODE);
1234
1235 b43_phy_set(dev, B43_NPHY_RFSEQMODE, B43_NPHY_RFSEQMODE_CAOVER);
1236 if (iqmode) {
1237 b43_phy_mask(dev, B43_NPHY_IQLOCAL_CMDGCTL, 0x7FFF);
1238 b43_phy_set(dev, B43_NPHY_IQLOCAL_CMDGCTL, 0x8000);
1239 } else {
1240 if (dac_test)
1241 b43_phy_write(dev, B43_NPHY_SAMP_CMD, 5);
1242 else
1243 b43_phy_write(dev, B43_NPHY_SAMP_CMD, 1);
1244 }
1245 for (i = 0; i < 100; i++) {
1246 if (b43_phy_read(dev, B43_NPHY_RFSEQST) & 1) {
1247 i = 0;
1248 break;
1249 }
1250 udelay(10);
1251 }
1252 if (i)
1253 b43err(dev->wl, "run samples timeout\n");
1254
1255 b43_phy_write(dev, B43_NPHY_RFSEQMODE, seq_mode);
1256}
1257
Rafał Miłecki59af0992010-01-22 01:53:16 +0100[diff] [blame]1258/*
1259 * Transmits a known value for LO calibration
1260 * http://bcm-v4.sipsolutions.net/802.11/PHY/N/TXTone
1261 */
1262static int b43_nphy_tx_tone(struct b43_wldev *dev, u32 freq, u16 max_val,
1263 bool iqmode, bool dac_test)
1264{
1265 u16 samp = b43_nphy_gen_load_samples(dev, freq, max_val, dac_test);
1266 if (samp == 0)
1267 return -1;
1268 b43_nphy_run_samples(dev, samp, 0xFFFF, 0, iqmode, dac_test);
1269 return 0;
1270}
1271
Rafał Miłecki6dcd9d92010-01-15 16:24:57 +0100[diff] [blame]1272/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/TxPwrCtrlCoefSetup */
1273static void b43_nphy_tx_pwr_ctrl_coef_setup(struct b43_wldev *dev)
1274{
1275 struct b43_phy_n *nphy = dev->phy.n;
1276 int i, j;
1277 u32 tmp;
1278 u32 cur_real, cur_imag, real_part, imag_part;
1279
1280 u16 buffer[7];
1281
1282 if (nphy->hang_avoid)
1283 b43_nphy_stay_in_carrier_search(dev, true);
1284
Rafał Miłecki91458342010-01-18 00:21:35 +0100[diff] [blame]1285 b43_ntab_read_bulk(dev, B43_NTAB16(15, 80), 7, buffer);
Rafał Miłecki6dcd9d92010-01-15 16:24:57 +0100[diff] [blame]1286
1287 for (i = 0; i < 2; i++) {
1288 tmp = ((buffer[i * 2] & 0x3FF) << 10) |
1289 (buffer[i * 2 + 1] & 0x3FF);
1290 b43_phy_write(dev, B43_NPHY_TABLE_ADDR,
1291 (((i + 26) << 10) | 320));
1292 for (j = 0; j < 128; j++) {
1293 b43_phy_write(dev, B43_NPHY_TABLE_DATAHI,
1294 ((tmp >> 16) & 0xFFFF));
1295 b43_phy_write(dev, B43_NPHY_TABLE_DATALO,
1296 (tmp & 0xFFFF));
1297 }
1298 }
1299
1300 for (i = 0; i < 2; i++) {
1301 tmp = buffer[5 + i];
1302 real_part = (tmp >> 8) & 0xFF;
1303 imag_part = (tmp & 0xFF);
1304 b43_phy_write(dev, B43_NPHY_TABLE_ADDR,
1305 (((i + 26) << 10) | 448));
1306
1307 if (dev->phy.rev >= 3) {
1308 cur_real = real_part;
1309 cur_imag = imag_part;
1310 tmp = ((cur_real & 0xFF) << 8) | (cur_imag & 0xFF);
1311 }
1312
1313 for (j = 0; j < 128; j++) {
1314 if (dev->phy.rev < 3) {
1315 cur_real = (real_part * loscale[j] + 128) >> 8;
1316 cur_imag = (imag_part * loscale[j] + 128) >> 8;
1317 tmp = ((cur_real & 0xFF) << 8) |
1318 (cur_imag & 0xFF);
1319 }
1320 b43_phy_write(dev, B43_NPHY_TABLE_DATAHI,
1321 ((tmp >> 16) & 0xFFFF));
1322 b43_phy_write(dev, B43_NPHY_TABLE_DATALO,
1323 (tmp & 0xFFFF));
1324 }
1325 }
1326
1327 if (dev->phy.rev >= 3) {
1328 b43_shm_write16(dev, B43_SHM_SHARED,
1329 B43_SHM_SH_NPHY_TXPWR_INDX0, 0xFFFF);
1330 b43_shm_write16(dev, B43_SHM_SHARED,
1331 B43_SHM_SH_NPHY_TXPWR_INDX1, 0xFFFF);
1332 }
1333
1334 if (nphy->hang_avoid)
1335 b43_nphy_stay_in_carrier_search(dev, false);
1336}
1337
Rafał Miłecki9501fef2010-01-30 20:18:07 +0100[diff] [blame]1338/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/SetRfSeq */
1339static void b43_nphy_set_rf_sequence(struct b43_wldev *dev, u8 cmd,
1340 u8 *events, u8 *delays, u8 length)
1341{
1342 struct b43_phy_n *nphy = dev->phy.n;
1343 u8 i;
1344 u8 end = (dev->phy.rev >= 3) ? 0x1F : 0x0F;
1345 u16 offset1 = cmd << 4;
1346 u16 offset2 = offset1 + 0x80;
1347
1348 if (nphy->hang_avoid)
1349 b43_nphy_stay_in_carrier_search(dev, true);
1350
1351 b43_ntab_write_bulk(dev, B43_NTAB8(7, offset1), length, events);
1352 b43_ntab_write_bulk(dev, B43_NTAB8(7, offset2), length, delays);
1353
1354 for (i = length; i < 16; i++) {
1355 b43_ntab_write(dev, B43_NTAB8(7, offset1 + i), end);
1356 b43_ntab_write(dev, B43_NTAB8(7, offset2 + i), 1);
1357 }
1358
1359 if (nphy->hang_avoid)
1360 b43_nphy_stay_in_carrier_search(dev, false);
1361}
1362
Rafał Miłecki67c0d6e2010-01-17 13:04:02 +0100[diff] [blame]1363/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/ForceRFSeq */
Michael Buesch95b66ba2008-01-18 01:09:25 +0100[diff] [blame]1364static void b43_nphy_force_rf_sequence(struct b43_wldev *dev,
1365 enum b43_nphy_rf_sequence seq)
1366{
1367 static const u16 trigger[] = {
1368 [B43_RFSEQ_RX2TX] = B43_NPHY_RFSEQTR_RX2TX,
1369 [B43_RFSEQ_TX2RX] = B43_NPHY_RFSEQTR_TX2RX,
1370 [B43_RFSEQ_RESET2RX] = B43_NPHY_RFSEQTR_RST2RX,
1371 [B43_RFSEQ_UPDATE_GAINH] = B43_NPHY_RFSEQTR_UPGH,
1372 [B43_RFSEQ_UPDATE_GAINL] = B43_NPHY_RFSEQTR_UPGL,
1373 [B43_RFSEQ_UPDATE_GAINU] = B43_NPHY_RFSEQTR_UPGU,
1374 };
1375 int i;
Rafał Miłeckic57199b2010-01-17 13:04:08 +0100[diff] [blame]1376 u16 seq_mode = b43_phy_read(dev, B43_NPHY_RFSEQMODE);
Michael Buesch95b66ba2008-01-18 01:09:25 +0100[diff] [blame]1377
1378 B43_WARN_ON(seq >= ARRAY_SIZE(trigger));
1379
1380 b43_phy_set(dev, B43_NPHY_RFSEQMODE,
1381 B43_NPHY_RFSEQMODE_CAOVER | B43_NPHY_RFSEQMODE_TROVER);
1382 b43_phy_set(dev, B43_NPHY_RFSEQTR, trigger[seq]);
1383 for (i = 0; i < 200; i++) {
1384 if (!(b43_phy_read(dev, B43_NPHY_RFSEQST) & trigger[seq]))
1385 goto ok;
1386 msleep(1);
1387 }
1388 b43err(dev->wl, "RF sequence status timeout\n");
1389ok:
Rafał Miłeckic57199b2010-01-17 13:04:08 +0100[diff] [blame]1390 b43_phy_write(dev, B43_NPHY_RFSEQMODE, seq_mode);
Michael Buesch95b66ba2008-01-18 01:09:25 +0100[diff] [blame]1391}
1392
Rafał Miłecki75377b22010-01-22 01:53:13 +0100[diff] [blame]1393/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/RFCtrlOverride */
1394static void b43_nphy_rf_control_override(struct b43_wldev *dev, u16 field,
1395 u16 value, u8 core, bool off)
1396{
1397 int i;
1398 u8 index = fls(field);
1399 u8 addr, en_addr, val_addr;
1400 /* we expect only one bit set */
Rafał Miłecki3ed0fac2010-01-25 18:59:58 +0100[diff] [blame]1401 B43_WARN_ON(field & (~(1 << (index - 1))));
Rafał Miłecki75377b22010-01-22 01:53:13 +0100[diff] [blame]1402
1403 if (dev->phy.rev >= 3) {
1404 const struct nphy_rf_control_override_rev3 *rf_ctrl;
1405 for (i = 0; i < 2; i++) {
1406 if (index == 0 || index == 16) {
1407 b43err(dev->wl,
1408 "Unsupported RF Ctrl Override call\n");
1409 return;
1410 }
1411
1412 rf_ctrl = &tbl_rf_control_override_rev3[index - 1];
1413 en_addr = B43_PHY_N((i == 0) ?
1414 rf_ctrl->en_addr0 : rf_ctrl->en_addr1);
1415 val_addr = B43_PHY_N((i == 0) ?
1416 rf_ctrl->val_addr0 : rf_ctrl->val_addr1);
1417
1418 if (off) {
1419 b43_phy_mask(dev, en_addr, ~(field));
1420 b43_phy_mask(dev, val_addr,
1421 ~(rf_ctrl->val_mask));
1422 } else {
1423 if (core == 0 || ((1 << core) & i) != 0) {
1424 b43_phy_set(dev, en_addr, field);
1425 b43_phy_maskset(dev, val_addr,
1426 ~(rf_ctrl->val_mask),
1427 (value << rf_ctrl->val_shift));
1428 }
1429 }
1430 }
1431 } else {
1432 const struct nphy_rf_control_override_rev2 *rf_ctrl;
1433 if (off) {
1434 b43_phy_mask(dev, B43_NPHY_RFCTL_OVER, ~(field));
1435 value = 0;
1436 } else {
1437 b43_phy_set(dev, B43_NPHY_RFCTL_OVER, field);
1438 }
1439
1440 for (i = 0; i < 2; i++) {
1441 if (index <= 1 || index == 16) {
1442 b43err(dev->wl,
1443 "Unsupported RF Ctrl Override call\n");
1444 return;
1445 }
1446
1447 if (index == 2 || index == 10 ||
1448 (index >= 13 && index <= 15)) {
1449 core = 1;
1450 }
1451
1452 rf_ctrl = &tbl_rf_control_override_rev2[index - 2];
1453 addr = B43_PHY_N((i == 0) ?
1454 rf_ctrl->addr0 : rf_ctrl->addr1);
1455
1456 if ((core & (1 << i)) != 0)
1457 b43_phy_maskset(dev, addr, ~(rf_ctrl->bmask),
1458 (value << rf_ctrl->shift));
1459
1460 b43_phy_set(dev, B43_NPHY_RFCTL_OVER, 0x1);
1461 b43_phy_set(dev, B43_NPHY_RFCTL_CMD,
1462 B43_NPHY_RFCTL_CMD_START);
1463 udelay(1);
1464 b43_phy_mask(dev, B43_NPHY_RFCTL_OVER, 0xFFFE);
1465 }
1466 }
1467}
1468
Rafał Miłecki67cbc3e2010-02-04 12:23:08 +0100[diff] [blame]1469/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/RFCtrlIntcOverride */
1470static void b43_nphy_rf_control_intc_override(struct b43_wldev *dev, u8 field,
1471 u16 value, u8 core)
1472{
1473 u8 i, j;
1474 u16 reg, tmp, val;
1475
1476 B43_WARN_ON(dev->phy.rev < 3);
1477 B43_WARN_ON(field > 4);
1478
1479 for (i = 0; i < 2; i++) {
1480 if ((core == 1 && i == 1) || (core == 2 && !i))
1481 continue;
1482
1483 reg = (i == 0) ?
1484 B43_NPHY_RFCTL_INTC1 : B43_NPHY_RFCTL_INTC2;
1485 b43_phy_mask(dev, reg, 0xFBFF);
1486
1487 switch (field) {
1488 case 0:
1489 b43_phy_write(dev, reg, 0);
1490 b43_nphy_force_rf_sequence(dev, B43_RFSEQ_RESET2RX);
1491 break;
1492 case 1:
1493 if (!i) {
1494 b43_phy_maskset(dev, B43_NPHY_RFCTL_INTC1,
1495 0xFC3F, (value << 6));
1496 b43_phy_maskset(dev, B43_NPHY_TXF_40CO_B1S1,
1497 0xFFFE, 1);
1498 b43_phy_set(dev, B43_NPHY_RFCTL_CMD,
1499 B43_NPHY_RFCTL_CMD_START);
1500 for (j = 0; j < 100; j++) {
1501 if (b43_phy_read(dev, B43_NPHY_RFCTL_CMD) & B43_NPHY_RFCTL_CMD_START) {
1502 j = 0;
1503 break;
1504 }
1505 udelay(10);
1506 }
1507 if (j)
1508 b43err(dev->wl,
1509 "intc override timeout\n");
1510 b43_phy_mask(dev, B43_NPHY_TXF_40CO_B1S1,
1511 0xFFFE);
1512 } else {
1513 b43_phy_maskset(dev, B43_NPHY_RFCTL_INTC2,
1514 0xFC3F, (value << 6));
1515 b43_phy_maskset(dev, B43_NPHY_RFCTL_OVER,
1516 0xFFFE, 1);
1517 b43_phy_set(dev, B43_NPHY_RFCTL_CMD,
1518 B43_NPHY_RFCTL_CMD_RXTX);
1519 for (j = 0; j < 100; j++) {
1520 if (b43_phy_read(dev, B43_NPHY_RFCTL_CMD) & B43_NPHY_RFCTL_CMD_RXTX) {
1521 j = 0;
1522 break;
1523 }
1524 udelay(10);
1525 }
1526 if (j)
1527 b43err(dev->wl,
1528 "intc override timeout\n");
1529 b43_phy_mask(dev, B43_NPHY_RFCTL_OVER,
1530 0xFFFE);
1531 }
1532 break;
1533 case 2:
1534 if (b43_current_band(dev->wl) == IEEE80211_BAND_5GHZ) {
1535 tmp = 0x0020;
1536 val = value << 5;
1537 } else {
1538 tmp = 0x0010;
1539 val = value << 4;
1540 }
1541 b43_phy_maskset(dev, reg, ~tmp, val);
1542 break;
1543 case 3:
1544 if (b43_current_band(dev->wl) == IEEE80211_BAND_5GHZ) {
1545 tmp = 0x0001;
1546 val = value;
1547 } else {
1548 tmp = 0x0004;
1549 val = value << 2;
1550 }
1551 b43_phy_maskset(dev, reg, ~tmp, val);
1552 break;
1553 case 4:
1554 if (b43_current_band(dev->wl) == IEEE80211_BAND_5GHZ) {
1555 tmp = 0x0002;
1556 val = value << 1;
1557 } else {
1558 tmp = 0x0008;
1559 val = value << 3;
1560 }
1561 b43_phy_maskset(dev, reg, ~tmp, val);
1562 break;
1563 }
1564 }
1565}
1566
Michael Buesch95b66ba2008-01-18 01:09:25 +0100[diff] [blame]1567static void b43_nphy_bphy_init(struct b43_wldev *dev)
1568{
1569 unsigned int i;
1570 u16 val;
1571
1572 val = 0x1E1F;
1573 for (i = 0; i < 14; i++) {
1574 b43_phy_write(dev, B43_PHY_N_BMODE(0x88 + i), val);
1575 val -= 0x202;
1576 }
1577 val = 0x3E3F;
1578 for (i = 0; i < 16; i++) {
1579 b43_phy_write(dev, B43_PHY_N_BMODE(0x97 + i), val);
1580 val -= 0x202;
1581 }
1582 b43_phy_write(dev, B43_PHY_N_BMODE(0x38), 0x668);
1583}
1584
Rafał Miłecki3c956272010-01-15 14:38:32 +0100[diff] [blame]1585/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/ScaleOffsetRssi */
1586static void b43_nphy_scale_offset_rssi(struct b43_wldev *dev, u16 scale,
1587 s8 offset, u8 core, u8 rail, u8 type)
1588{
1589 u16 tmp;
1590 bool core1or5 = (core == 1) || (core == 5);
1591 bool core2or5 = (core == 2) || (core == 5);
1592
1593 offset = clamp_val(offset, -32, 31);
1594 tmp = ((scale & 0x3F) << 8) | (offset & 0x3F);
1595
1596 if (core1or5 && (rail == 0) && (type == 2))
1597 b43_phy_write(dev, B43_NPHY_RSSIMC_0I_RSSI_Z, tmp);
1598 if (core1or5 && (rail == 1) && (type == 2))
1599 b43_phy_write(dev, B43_NPHY_RSSIMC_0Q_RSSI_Z, tmp);
1600 if (core2or5 && (rail == 0) && (type == 2))
1601 b43_phy_write(dev, B43_NPHY_RSSIMC_1I_RSSI_Z, tmp);
1602 if (core2or5 && (rail == 1) && (type == 2))
1603 b43_phy_write(dev, B43_NPHY_RSSIMC_1Q_RSSI_Z, tmp);
1604 if (core1or5 && (rail == 0) && (type == 0))
1605 b43_phy_write(dev, B43_NPHY_RSSIMC_0I_RSSI_X, tmp);
1606 if (core1or5 && (rail == 1) && (type == 0))
1607 b43_phy_write(dev, B43_NPHY_RSSIMC_0Q_RSSI_X, tmp);
1608 if (core2or5 && (rail == 0) && (type == 0))
1609 b43_phy_write(dev, B43_NPHY_RSSIMC_1I_RSSI_X, tmp);
1610 if (core2or5 && (rail == 1) && (type == 0))
1611 b43_phy_write(dev, B43_NPHY_RSSIMC_1Q_RSSI_X, tmp);
1612 if (core1or5 && (rail == 0) && (type == 1))
1613 b43_phy_write(dev, B43_NPHY_RSSIMC_0I_RSSI_Y, tmp);
1614 if (core1or5 && (rail == 1) && (type == 1))
1615 b43_phy_write(dev, B43_NPHY_RSSIMC_0Q_RSSI_Y, tmp);
1616 if (core2or5 && (rail == 0) && (type == 1))
1617 b43_phy_write(dev, B43_NPHY_RSSIMC_1I_RSSI_Y, tmp);
1618 if (core2or5 && (rail == 1) && (type == 1))
1619 b43_phy_write(dev, B43_NPHY_RSSIMC_1Q_RSSI_Y, tmp);
1620 if (core1or5 && (rail == 0) && (type == 6))
1621 b43_phy_write(dev, B43_NPHY_RSSIMC_0I_TBD, tmp);
1622 if (core1or5 && (rail == 1) && (type == 6))
1623 b43_phy_write(dev, B43_NPHY_RSSIMC_0Q_TBD, tmp);
1624 if (core2or5 && (rail == 0) && (type == 6))
1625 b43_phy_write(dev, B43_NPHY_RSSIMC_1I_TBD, tmp);
1626 if (core2or5 && (rail == 1) && (type == 6))
1627 b43_phy_write(dev, B43_NPHY_RSSIMC_1Q_TBD, tmp);
1628 if (core1or5 && (rail == 0) && (type == 3))
1629 b43_phy_write(dev, B43_NPHY_RSSIMC_0I_PWRDET, tmp);
1630 if (core1or5 && (rail == 1) && (type == 3))
1631 b43_phy_write(dev, B43_NPHY_RSSIMC_0Q_PWRDET, tmp);
1632 if (core2or5 && (rail == 0) && (type == 3))
1633 b43_phy_write(dev, B43_NPHY_RSSIMC_1I_PWRDET, tmp);
1634 if (core2or5 && (rail == 1) && (type == 3))
1635 b43_phy_write(dev, B43_NPHY_RSSIMC_1Q_PWRDET, tmp);
1636 if (core1or5 && (type == 4))
1637 b43_phy_write(dev, B43_NPHY_RSSIMC_0I_TSSI, tmp);
1638 if (core2or5 && (type == 4))
1639 b43_phy_write(dev, B43_NPHY_RSSIMC_1I_TSSI, tmp);
1640 if (core1or5 && (type == 5))
1641 b43_phy_write(dev, B43_NPHY_RSSIMC_0Q_TSSI, tmp);
1642 if (core2or5 && (type == 5))
1643 b43_phy_write(dev, B43_NPHY_RSSIMC_1Q_TSSI, tmp);
1644}
1645
Rafał Miłecki99b82c42010-01-30 20:18:03 +0100[diff] [blame]1646static void b43_nphy_rev2_rssi_select(struct b43_wldev *dev, u8 code, u8 type)
Rafał Miłecki3c956272010-01-15 14:38:32 +0100[diff] [blame]1647{
1648 u16 val;
1649
Rafał Miłecki99b82c42010-01-30 20:18:03 +0100[diff] [blame]1650 if (type < 3)
1651 val = 0;
1652 else if (type == 6)
1653 val = 1;
1654 else if (type == 3)
1655 val = 2;
1656 else
1657 val = 3;
Rafał Miłecki3c956272010-01-15 14:38:32 +0100[diff] [blame]1658
Rafał Miłecki99b82c42010-01-30 20:18:03 +0100[diff] [blame]1659 val = (val << 12) | (val << 14);
1660 b43_phy_maskset(dev, B43_NPHY_AFECTL_C1, 0x0FFF, val);
1661 b43_phy_maskset(dev, B43_NPHY_AFECTL_C2, 0x0FFF, val);
Rafał Miłecki3c956272010-01-15 14:38:32 +0100[diff] [blame]1662
Rafał Miłecki99b82c42010-01-30 20:18:03 +0100[diff] [blame]1663 if (type < 3) {
1664 b43_phy_maskset(dev, B43_NPHY_RFCTL_RSSIO1, 0xFFCF,
1665 (type + 1) << 4);
1666 b43_phy_maskset(dev, B43_NPHY_RFCTL_RSSIO2, 0xFFCF,
1667 (type + 1) << 4);
1668 }
1669
1670 /* TODO use some definitions */
1671 if (code == 0) {
1672 b43_phy_maskset(dev, B43_NPHY_AFECTL_OVER, 0xCFFF, 0);
Rafał Miłecki3c956272010-01-15 14:38:32 +0100[diff] [blame]1673 if (type < 3) {
Rafał Miłecki99b82c42010-01-30 20:18:03 +0100[diff] [blame]1674 b43_phy_maskset(dev, B43_NPHY_RFCTL_CMD, 0xFEC7, 0);
1675 b43_phy_maskset(dev, B43_NPHY_RFCTL_OVER, 0xEFDC, 0);
1676 b43_phy_maskset(dev, B43_NPHY_RFCTL_CMD, 0xFFFE, 0);
1677 udelay(20);
1678 b43_phy_maskset(dev, B43_NPHY_RFCTL_OVER, 0xFFFE, 0);
Rafał Miłecki3c956272010-01-15 14:38:32 +0100[diff] [blame]1679 }
Rafał Miłecki99b82c42010-01-30 20:18:03 +0100[diff] [blame]1680 } else {
1681 b43_phy_maskset(dev, B43_NPHY_AFECTL_OVER, 0xCFFF,
1682 0x3000);
1683 if (type < 3) {
1684 b43_phy_maskset(dev, B43_NPHY_RFCTL_CMD,
1685 0xFEC7, 0x0180);
1686 b43_phy_maskset(dev, B43_NPHY_RFCTL_OVER,
1687 0xEFDC, (code << 1 | 0x1021));
1688 b43_phy_maskset(dev, B43_NPHY_RFCTL_CMD, 0xFFFE, 0x1);
1689 udelay(20);
1690 b43_phy_maskset(dev, B43_NPHY_RFCTL_OVER, 0xFFFE, 0);
Rafał Miłecki3c956272010-01-15 14:38:32 +0100[diff] [blame]1691 }
1692 }
1693}
1694
Rafał Miłecki99b82c42010-01-30 20:18:03 +0100[diff] [blame]1695static void b43_nphy_rev3_rssi_select(struct b43_wldev *dev, u8 code, u8 type)
1696{
Rafał Miłecki6e3b15a2010-01-30 20:18:04 +0100[diff] [blame]1697 struct b43_phy_n *nphy = dev->phy.n;
1698 u8 i;
1699 u16 reg, val;
1700
1701 if (code == 0) {
1702 b43_phy_mask(dev, B43_NPHY_AFECTL_OVER1, 0xFDFF);
1703 b43_phy_mask(dev, B43_NPHY_AFECTL_OVER, 0xFDFF);
1704 b43_phy_mask(dev, B43_NPHY_AFECTL_C1, 0xFCFF);
1705 b43_phy_mask(dev, B43_NPHY_AFECTL_C2, 0xFCFF);
1706 b43_phy_mask(dev, B43_NPHY_TXF_40CO_B1S0, 0xFFDF);
1707 b43_phy_mask(dev, B43_NPHY_TXF_40CO_B32S1, 0xFFDF);
1708 b43_phy_mask(dev, B43_NPHY_RFCTL_LUT_TRSW_UP1, 0xFFC3);
1709 b43_phy_mask(dev, B43_NPHY_RFCTL_LUT_TRSW_UP2, 0xFFC3);
1710 } else {
1711 for (i = 0; i < 2; i++) {
1712 if ((code == 1 && i == 1) || (code == 2 && !i))
1713 continue;
1714
1715 reg = (i == 0) ?
1716 B43_NPHY_AFECTL_OVER1 : B43_NPHY_AFECTL_OVER;
1717 b43_phy_maskset(dev, reg, 0xFDFF, 0x0200);
1718
1719 if (type < 3) {
1720 reg = (i == 0) ?
1721 B43_NPHY_AFECTL_C1 :
1722 B43_NPHY_AFECTL_C2;
1723 b43_phy_maskset(dev, reg, 0xFCFF, 0);
1724
1725 reg = (i == 0) ?
1726 B43_NPHY_RFCTL_LUT_TRSW_UP1 :
1727 B43_NPHY_RFCTL_LUT_TRSW_UP2;
1728 b43_phy_maskset(dev, reg, 0xFFC3, 0);
1729
1730 if (type == 0)
1731 val = (b43_current_band(dev->wl) == IEEE80211_BAND_5GHZ) ? 4 : 8;
1732 else if (type == 1)
1733 val = 16;
1734 else
1735 val = 32;
1736 b43_phy_set(dev, reg, val);
1737
1738 reg = (i == 0) ?
1739 B43_NPHY_TXF_40CO_B1S0 :
1740 B43_NPHY_TXF_40CO_B32S1;
1741 b43_phy_set(dev, reg, 0x0020);
1742 } else {
1743 if (type == 6)
1744 val = 0x0100;
1745 else if (type == 3)
1746 val = 0x0200;
1747 else
1748 val = 0x0300;
1749
1750 reg = (i == 0) ?
1751 B43_NPHY_AFECTL_C1 :
1752 B43_NPHY_AFECTL_C2;
1753
1754 b43_phy_maskset(dev, reg, 0xFCFF, val);
1755 b43_phy_maskset(dev, reg, 0xF3FF, val << 2);
1756
1757 if (type != 3 && type != 6) {
1758 enum ieee80211_band band =
1759 b43_current_band(dev->wl);
1760
1761 if ((nphy->ipa2g_on &&
1762 band == IEEE80211_BAND_2GHZ) ||
1763 (nphy->ipa5g_on &&
1764 band == IEEE80211_BAND_5GHZ))
1765 val = (band == IEEE80211_BAND_5GHZ) ? 0xC : 0xE;
1766 else
1767 val = 0x11;
1768 reg = (i == 0) ? 0x2000 : 0x3000;
1769 reg |= B2055_PADDRV;
1770 b43_radio_write16(dev, reg, val);
1771
1772 reg = (i == 0) ?
1773 B43_NPHY_AFECTL_OVER1 :
1774 B43_NPHY_AFECTL_OVER;
1775 b43_phy_set(dev, reg, 0x0200);
1776 }
1777 }
1778 }
1779 }
Rafał Miłecki99b82c42010-01-30 20:18:03 +0100[diff] [blame]1780}
1781
1782/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/RSSISel */
1783static void b43_nphy_rssi_select(struct b43_wldev *dev, u8 code, u8 type)
1784{
1785 if (dev->phy.rev >= 3)
1786 b43_nphy_rev3_rssi_select(dev, code, type);
1787 else
1788 b43_nphy_rev2_rssi_select(dev, code, type);
1789}
1790
Rafał Miłeckidfb4aa52010-01-15 14:45:13 +0100[diff] [blame]1791/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/SetRssi2055Vcm */
1792static void b43_nphy_set_rssi_2055_vcm(struct b43_wldev *dev, u8 type, u8 *buf)
1793{
1794 int i;
1795 for (i = 0; i < 2; i++) {
1796 if (type == 2) {
1797 if (i == 0) {
1798 b43_radio_maskset(dev, B2055_C1_B0NB_RSSIVCM,
1799 0xFC, buf[0]);
1800 b43_radio_maskset(dev, B2055_C1_RX_BB_RSSICTL5,
1801 0xFC, buf[1]);
1802 } else {
1803 b43_radio_maskset(dev, B2055_C2_B0NB_RSSIVCM,
1804 0xFC, buf[2 * i]);
1805 b43_radio_maskset(dev, B2055_C2_RX_BB_RSSICTL5,
1806 0xFC, buf[2 * i + 1]);
1807 }
1808 } else {
1809 if (i == 0)
1810 b43_radio_maskset(dev, B2055_C1_RX_BB_RSSICTL5,
1811 0xF3, buf[0] << 2);
1812 else
1813 b43_radio_maskset(dev, B2055_C2_RX_BB_RSSICTL5,
1814 0xF3, buf[2 * i + 1] << 2);
1815 }
1816 }
1817}
1818
1819/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/PollRssi */
1820static int b43_nphy_poll_rssi(struct b43_wldev *dev, u8 type, s32 *buf,
1821 u8 nsamp)
1822{
1823 int i;
1824 int out;
1825 u16 save_regs_phy[9];
1826 u16 s[2];
1827
1828 if (dev->phy.rev >= 3) {
1829 save_regs_phy[0] = b43_phy_read(dev,
1830 B43_NPHY_RFCTL_LUT_TRSW_UP1);
1831 save_regs_phy[1] = b43_phy_read(dev,
1832 B43_NPHY_RFCTL_LUT_TRSW_UP2);
1833 save_regs_phy[2] = b43_phy_read(dev, B43_NPHY_AFECTL_C1);
1834 save_regs_phy[3] = b43_phy_read(dev, B43_NPHY_AFECTL_C2);
1835 save_regs_phy[4] = b43_phy_read(dev, B43_NPHY_AFECTL_OVER1);
1836 save_regs_phy[5] = b43_phy_read(dev, B43_NPHY_AFECTL_OVER);
1837 save_regs_phy[6] = b43_phy_read(dev, B43_NPHY_TXF_40CO_B1S0);
1838 save_regs_phy[7] = b43_phy_read(dev, B43_NPHY_TXF_40CO_B32S1);
1839 }
1840
1841 b43_nphy_rssi_select(dev, 5, type);
1842
1843 if (dev->phy.rev < 2) {
1844 save_regs_phy[8] = b43_phy_read(dev, B43_NPHY_GPIO_SEL);
1845 b43_phy_write(dev, B43_NPHY_GPIO_SEL, 5);
1846 }
1847
1848 for (i = 0; i < 4; i++)
1849 buf[i] = 0;
1850
1851 for (i = 0; i < nsamp; i++) {
1852 if (dev->phy.rev < 2) {
1853 s[0] = b43_phy_read(dev, B43_NPHY_GPIO_LOOUT);
1854 s[1] = b43_phy_read(dev, B43_NPHY_GPIO_HIOUT);
1855 } else {
1856 s[0] = b43_phy_read(dev, B43_NPHY_RSSI1);
1857 s[1] = b43_phy_read(dev, B43_NPHY_RSSI2);
1858 }
1859
1860 buf[0] += ((s8)((s[0] & 0x3F) << 2)) >> 2;
1861 buf[1] += ((s8)(((s[0] >> 8) & 0x3F) << 2)) >> 2;
1862 buf[2] += ((s8)((s[1] & 0x3F) << 2)) >> 2;
1863 buf[3] += ((s8)(((s[1] >> 8) & 0x3F) << 2)) >> 2;
1864 }
1865 out = (buf[0] & 0xFF) << 24 | (buf[1] & 0xFF) << 16 |
1866 (buf[2] & 0xFF) << 8 | (buf[3] & 0xFF);
1867
1868 if (dev->phy.rev < 2)
1869 b43_phy_write(dev, B43_NPHY_GPIO_SEL, save_regs_phy[8]);
1870
1871 if (dev->phy.rev >= 3) {
1872 b43_phy_write(dev, B43_NPHY_RFCTL_LUT_TRSW_UP1,
1873 save_regs_phy[0]);
1874 b43_phy_write(dev, B43_NPHY_RFCTL_LUT_TRSW_UP2,
1875 save_regs_phy[1]);
1876 b43_phy_write(dev, B43_NPHY_AFECTL_C1, save_regs_phy[2]);
1877 b43_phy_write(dev, B43_NPHY_AFECTL_C2, save_regs_phy[3]);
1878 b43_phy_write(dev, B43_NPHY_AFECTL_OVER1, save_regs_phy[4]);
1879 b43_phy_write(dev, B43_NPHY_AFECTL_OVER, save_regs_phy[5]);
1880 b43_phy_write(dev, B43_NPHY_TXF_40CO_B1S0, save_regs_phy[6]);
1881 b43_phy_write(dev, B43_NPHY_TXF_40CO_B32S1, save_regs_phy[7]);
1882 }
1883
1884 return out;
1885}
1886
Rafał Miłecki4cb99772010-01-15 13:40:58 +0100[diff] [blame]1887/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/RSSICal */
1888static void b43_nphy_rev2_rssi_cal(struct b43_wldev *dev, u8 type)
Michael Buesch95b66ba2008-01-18 01:09:25 +0100[diff] [blame]1889{
Rafał Miłecki90b97382010-01-15 14:48:21 +0100[diff] [blame]1890 int i, j;
1891 u8 state[4];
1892 u8 code, val;
1893 u16 class, override;
1894 u8 regs_save_radio[2];
1895 u16 regs_save_phy[2];
1896 s8 offset[4];
1897
1898 u16 clip_state[2];
1899 u16 clip_off[2] = { 0xFFFF, 0xFFFF };
1900 s32 results_min[4] = { };
1901 u8 vcm_final[4] = { };
1902 s32 results[4][4] = { };
1903 s32 miniq[4][2] = { };
1904
1905 if (type == 2) {
1906 code = 0;
1907 val = 6;
1908 } else if (type < 2) {
1909 code = 25;
1910 val = 4;
1911 } else {
1912 B43_WARN_ON(1);
1913 return;
1914 }
1915
1916 class = b43_nphy_classifier(dev, 0, 0);
1917 b43_nphy_classifier(dev, 7, 4);
1918 b43_nphy_read_clip_detection(dev, clip_state);
1919 b43_nphy_write_clip_detection(dev, clip_off);
1920
1921 if (b43_current_band(dev->wl) == IEEE80211_BAND_5GHZ)
1922 override = 0x140;
1923 else
1924 override = 0x110;
1925
1926 regs_save_phy[0] = b43_phy_read(dev, B43_NPHY_RFCTL_INTC1);
1927 regs_save_radio[0] = b43_radio_read16(dev, B2055_C1_PD_RXTX);
1928 b43_phy_write(dev, B43_NPHY_RFCTL_INTC1, override);
1929 b43_radio_write16(dev, B2055_C1_PD_RXTX, val);
1930
1931 regs_save_phy[1] = b43_phy_read(dev, B43_NPHY_RFCTL_INTC2);
1932 regs_save_radio[1] = b43_radio_read16(dev, B2055_C2_PD_RXTX);
1933 b43_phy_write(dev, B43_NPHY_RFCTL_INTC2, override);
1934 b43_radio_write16(dev, B2055_C2_PD_RXTX, val);
1935
1936 state[0] = b43_radio_read16(dev, B2055_C1_PD_RSSIMISC) & 0x07;
1937 state[1] = b43_radio_read16(dev, B2055_C2_PD_RSSIMISC) & 0x07;
1938 b43_radio_mask(dev, B2055_C1_PD_RSSIMISC, 0xF8);
1939 b43_radio_mask(dev, B2055_C2_PD_RSSIMISC, 0xF8);
1940 state[2] = b43_radio_read16(dev, B2055_C1_SP_RSSI) & 0x07;
1941 state[3] = b43_radio_read16(dev, B2055_C2_SP_RSSI) & 0x07;
1942
1943 b43_nphy_rssi_select(dev, 5, type);
1944 b43_nphy_scale_offset_rssi(dev, 0, 0, 5, 0, type);
1945 b43_nphy_scale_offset_rssi(dev, 0, 0, 5, 1, type);
1946
1947 for (i = 0; i < 4; i++) {
1948 u8 tmp[4];
1949 for (j = 0; j < 4; j++)
1950 tmp[j] = i;
1951 if (type != 1)
1952 b43_nphy_set_rssi_2055_vcm(dev, type, tmp);
1953 b43_nphy_poll_rssi(dev, type, results[i], 8);
1954 if (type < 2)
1955 for (j = 0; j < 2; j++)
1956 miniq[i][j] = min(results[i][2 * j],
1957 results[i][2 * j + 1]);
1958 }
1959
1960 for (i = 0; i < 4; i++) {
1961 s32 mind = 40;
1962 u8 minvcm = 0;
1963 s32 minpoll = 249;
1964 s32 curr;
1965 for (j = 0; j < 4; j++) {
1966 if (type == 2)
1967 curr = abs(results[j][i]);
1968 else
1969 curr = abs(miniq[j][i / 2] - code * 8);
1970
1971 if (curr < mind) {
1972 mind = curr;
1973 minvcm = j;
1974 }
1975
1976 if (results[j][i] < minpoll)
1977 minpoll = results[j][i];
1978 }
1979 results_min[i] = minpoll;
1980 vcm_final[i] = minvcm;
1981 }
1982
1983 if (type != 1)
1984 b43_nphy_set_rssi_2055_vcm(dev, type, vcm_final);
1985
1986 for (i = 0; i < 4; i++) {
1987 offset[i] = (code * 8) - results[vcm_final[i]][i];
1988
1989 if (offset[i] < 0)
1990 offset[i] = -((abs(offset[i]) + 4) / 8);
1991 else
1992 offset[i] = (offset[i] + 4) / 8;
1993
1994 if (results_min[i] == 248)
1995 offset[i] = code - 32;
1996
1997 if (i % 2 == 0)
1998 b43_nphy_scale_offset_rssi(dev, 0, offset[i], 1, 0,
1999 type);
2000 else
2001 b43_nphy_scale_offset_rssi(dev, 0, offset[i], 2, 1,
2002 type);
2003 }
2004
2005 b43_radio_maskset(dev, B2055_C1_PD_RSSIMISC, 0xF8, state[0]);
2006 b43_radio_maskset(dev, B2055_C1_PD_RSSIMISC, 0xF8, state[1]);
2007
2008 switch (state[2]) {
2009 case 1:
2010 b43_nphy_rssi_select(dev, 1, 2);
2011 break;
2012 case 4:
2013 b43_nphy_rssi_select(dev, 1, 0);
2014 break;
2015 case 2:
2016 b43_nphy_rssi_select(dev, 1, 1);
2017 break;
2018 default:
2019 b43_nphy_rssi_select(dev, 1, 1);
2020 break;
2021 }
2022
2023 switch (state[3]) {
2024 case 1:
2025 b43_nphy_rssi_select(dev, 2, 2);
2026 break;
2027 case 4:
2028 b43_nphy_rssi_select(dev, 2, 0);
2029 break;
2030 default:
2031 b43_nphy_rssi_select(dev, 2, 1);
2032 break;
2033 }
2034
2035 b43_nphy_rssi_select(dev, 0, type);
2036
2037 b43_phy_write(dev, B43_NPHY_RFCTL_INTC1, regs_save_phy[0]);
2038 b43_radio_write16(dev, B2055_C1_PD_RXTX, regs_save_radio[0]);
2039 b43_phy_write(dev, B43_NPHY_RFCTL_INTC2, regs_save_phy[1]);
2040 b43_radio_write16(dev, B2055_C2_PD_RXTX, regs_save_radio[1]);
2041
2042 b43_nphy_classifier(dev, 7, class);
2043 b43_nphy_write_clip_detection(dev, clip_state);
Rafał Miłecki4cb99772010-01-15 13:40:58 +0100[diff] [blame]2044}
2045
2046/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/RSSICalRev3 */
2047static void b43_nphy_rev3_rssi_cal(struct b43_wldev *dev)
2048{
2049 /* TODO */
2050}
2051
2052/*
2053 * RSSI Calibration
2054 * http://bcm-v4.sipsolutions.net/802.11/PHY/N/RSSICal
2055 */
2056static void b43_nphy_rssi_cal(struct b43_wldev *dev)
2057{
2058 if (dev->phy.rev >= 3) {
2059 b43_nphy_rev3_rssi_cal(dev);
2060 } else {
2061 b43_nphy_rev2_rssi_cal(dev, 2);
2062 b43_nphy_rev2_rssi_cal(dev, 0);
2063 b43_nphy_rev2_rssi_cal(dev, 1);
2064 }
Michael Buesch95b66ba2008-01-18 01:09:25 +0100[diff] [blame]2065}
2066
Rafał Miłecki0988a7a2010-01-15 13:27:29 +0100[diff] [blame]2067/*
Rafał Miłecki42e15472010-01-15 15:06:47 +0100[diff] [blame]2068 * Restore RSSI Calibration
2069 * http://bcm-v4.sipsolutions.net/802.11/PHY/N/RestoreRssiCal
2070 */
2071static void b43_nphy_restore_rssi_cal(struct b43_wldev *dev)
2072{
2073 struct b43_phy_n *nphy = dev->phy.n;
2074
2075 u16 *rssical_radio_regs = NULL;
2076 u16 *rssical_phy_regs = NULL;
2077
2078 if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ) {
Rafał Miłecki204a6652010-10-14 19:33:34 +0200[diff] [blame]2079 if (!nphy->rssical_chanspec_2G.center_freq)
Rafał Miłecki42e15472010-01-15 15:06:47 +0100[diff] [blame]2080 return;
2081 rssical_radio_regs = nphy->rssical_cache.rssical_radio_regs_2G;
2082 rssical_phy_regs = nphy->rssical_cache.rssical_phy_regs_2G;
2083 } else {
Rafał Miłecki204a6652010-10-14 19:33:34 +0200[diff] [blame]2084 if (!nphy->rssical_chanspec_5G.center_freq)
Rafał Miłecki42e15472010-01-15 15:06:47 +0100[diff] [blame]2085 return;
2086 rssical_radio_regs = nphy->rssical_cache.rssical_radio_regs_5G;
2087 rssical_phy_regs = nphy->rssical_cache.rssical_phy_regs_5G;
2088 }
2089
2090 /* TODO use some definitions */
2091 b43_radio_maskset(dev, 0x602B, 0xE3, rssical_radio_regs[0]);
2092 b43_radio_maskset(dev, 0x702B, 0xE3, rssical_radio_regs[1]);
2093
2094 b43_phy_write(dev, B43_NPHY_RSSIMC_0I_RSSI_Z, rssical_phy_regs[0]);
2095 b43_phy_write(dev, B43_NPHY_RSSIMC_0Q_RSSI_Z, rssical_phy_regs[1]);
2096 b43_phy_write(dev, B43_NPHY_RSSIMC_1I_RSSI_Z, rssical_phy_regs[2]);
2097 b43_phy_write(dev, B43_NPHY_RSSIMC_1Q_RSSI_Z, rssical_phy_regs[3]);
2098
2099 b43_phy_write(dev, B43_NPHY_RSSIMC_0I_RSSI_X, rssical_phy_regs[4]);
2100 b43_phy_write(dev, B43_NPHY_RSSIMC_0Q_RSSI_X, rssical_phy_regs[5]);
2101 b43_phy_write(dev, B43_NPHY_RSSIMC_1I_RSSI_X, rssical_phy_regs[6]);
2102 b43_phy_write(dev, B43_NPHY_RSSIMC_1Q_RSSI_X, rssical_phy_regs[7]);
2103
2104 b43_phy_write(dev, B43_NPHY_RSSIMC_0I_RSSI_Y, rssical_phy_regs[8]);
2105 b43_phy_write(dev, B43_NPHY_RSSIMC_0Q_RSSI_Y, rssical_phy_regs[9]);
2106 b43_phy_write(dev, B43_NPHY_RSSIMC_1I_RSSI_Y, rssical_phy_regs[10]);
2107 b43_phy_write(dev, B43_NPHY_RSSIMC_1Q_RSSI_Y, rssical_phy_regs[11]);
2108}
2109
Rafał Miłecki2f258b72010-01-15 15:18:35 +0100[diff] [blame]2110/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/GetIpaGainTbl */
2111static const u32 *b43_nphy_get_ipa_gain_table(struct b43_wldev *dev)
2112{
2113 if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ) {
2114 if (dev->phy.rev >= 6) {
2115 /* TODO If the chip is 47162
2116 return txpwrctrl_tx_gain_ipa_rev5 */
2117 return txpwrctrl_tx_gain_ipa_rev6;
2118 } else if (dev->phy.rev >= 5) {
2119 return txpwrctrl_tx_gain_ipa_rev5;
2120 } else {
2121 return txpwrctrl_tx_gain_ipa;
2122 }
2123 } else {
2124 return txpwrctrl_tx_gain_ipa_5g;
2125 }
2126}
2127
Rafał Miłeckic4a92002010-01-15 15:55:18 +0100[diff] [blame]2128/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/TxCalRadioSetup */
2129static void b43_nphy_tx_cal_radio_setup(struct b43_wldev *dev)
2130{
2131 struct b43_phy_n *nphy = dev->phy.n;
2132 u16 *save = nphy->tx_rx_cal_radio_saveregs;
Rafał Miłecki52cb5e92010-01-30 20:18:06 +0100[diff] [blame]2133 u16 tmp;
2134 u8 offset, i;
Rafał Miłeckic4a92002010-01-15 15:55:18 +0100[diff] [blame]2135
2136 if (dev->phy.rev >= 3) {
Rafał Miłecki52cb5e92010-01-30 20:18:06 +0100[diff] [blame]2137 for (i = 0; i < 2; i++) {
2138 tmp = (i == 0) ? 0x2000 : 0x3000;
2139 offset = i * 11;
2140
2141 save[offset + 0] = b43_radio_read16(dev, B2055_CAL_RVARCTL);
2142 save[offset + 1] = b43_radio_read16(dev, B2055_CAL_LPOCTL);
2143 save[offset + 2] = b43_radio_read16(dev, B2055_CAL_TS);
2144 save[offset + 3] = b43_radio_read16(dev, B2055_CAL_RCCALRTS);
2145 save[offset + 4] = b43_radio_read16(dev, B2055_CAL_RCALRTS);
2146 save[offset + 5] = b43_radio_read16(dev, B2055_PADDRV);
2147 save[offset + 6] = b43_radio_read16(dev, B2055_XOCTL1);
2148 save[offset + 7] = b43_radio_read16(dev, B2055_XOCTL2);
2149 save[offset + 8] = b43_radio_read16(dev, B2055_XOREGUL);
2150 save[offset + 9] = b43_radio_read16(dev, B2055_XOMISC);
2151 save[offset + 10] = b43_radio_read16(dev, B2055_PLL_LFC1);
2152
2153 if (b43_current_band(dev->wl) == IEEE80211_BAND_5GHZ) {
2154 b43_radio_write16(dev, tmp | B2055_CAL_RVARCTL, 0x0A);
2155 b43_radio_write16(dev, tmp | B2055_CAL_LPOCTL, 0x40);
2156 b43_radio_write16(dev, tmp | B2055_CAL_TS, 0x55);
2157 b43_radio_write16(dev, tmp | B2055_CAL_RCCALRTS, 0);
2158 b43_radio_write16(dev, tmp | B2055_CAL_RCALRTS, 0);
2159 if (nphy->ipa5g_on) {
2160 b43_radio_write16(dev, tmp | B2055_PADDRV, 4);
2161 b43_radio_write16(dev, tmp | B2055_XOCTL1, 1);
2162 } else {
2163 b43_radio_write16(dev, tmp | B2055_PADDRV, 0);
2164 b43_radio_write16(dev, tmp | B2055_XOCTL1, 0x2F);
2165 }
2166 b43_radio_write16(dev, tmp | B2055_XOCTL2, 0);
2167 } else {
2168 b43_radio_write16(dev, tmp | B2055_CAL_RVARCTL, 0x06);
2169 b43_radio_write16(dev, tmp | B2055_CAL_LPOCTL, 0x40);
2170 b43_radio_write16(dev, tmp | B2055_CAL_TS, 0x55);
2171 b43_radio_write16(dev, tmp | B2055_CAL_RCCALRTS, 0);
2172 b43_radio_write16(dev, tmp | B2055_CAL_RCALRTS, 0);
2173 b43_radio_write16(dev, tmp | B2055_XOCTL1, 0);
2174 if (nphy->ipa2g_on) {
2175 b43_radio_write16(dev, tmp | B2055_PADDRV, 6);
2176 b43_radio_write16(dev, tmp | B2055_XOCTL2,
2177 (dev->phy.rev < 5) ? 0x11 : 0x01);
2178 } else {
2179 b43_radio_write16(dev, tmp | B2055_PADDRV, 0);
2180 b43_radio_write16(dev, tmp | B2055_XOCTL2, 0);
2181 }
2182 }
2183 b43_radio_write16(dev, tmp | B2055_XOREGUL, 0);
2184 b43_radio_write16(dev, tmp | B2055_XOMISC, 0);
2185 b43_radio_write16(dev, tmp | B2055_PLL_LFC1, 0);
2186 }
Rafał Miłeckic4a92002010-01-15 15:55:18 +0100[diff] [blame]2187 } else {
2188 save[0] = b43_radio_read16(dev, B2055_C1_TX_RF_IQCAL1);
2189 b43_radio_write16(dev, B2055_C1_TX_RF_IQCAL1, 0x29);
2190
2191 save[1] = b43_radio_read16(dev, B2055_C1_TX_RF_IQCAL2);
2192 b43_radio_write16(dev, B2055_C1_TX_RF_IQCAL2, 0x54);
2193
2194 save[2] = b43_radio_read16(dev, B2055_C2_TX_RF_IQCAL1);
2195 b43_radio_write16(dev, B2055_C2_TX_RF_IQCAL1, 0x29);
2196
2197 save[3] = b43_radio_read16(dev, B2055_C2_TX_RF_IQCAL2);
2198 b43_radio_write16(dev, B2055_C2_TX_RF_IQCAL2, 0x54);
2199
2200 save[3] = b43_radio_read16(dev, B2055_C1_PWRDET_RXTX);
2201 save[4] = b43_radio_read16(dev, B2055_C2_PWRDET_RXTX);
2202
2203 if (!(b43_phy_read(dev, B43_NPHY_BANDCTL) &
2204 B43_NPHY_BANDCTL_5GHZ)) {
2205 b43_radio_write16(dev, B2055_C1_PWRDET_RXTX, 0x04);
2206 b43_radio_write16(dev, B2055_C2_PWRDET_RXTX, 0x04);
2207 } else {
2208 b43_radio_write16(dev, B2055_C1_PWRDET_RXTX, 0x20);
2209 b43_radio_write16(dev, B2055_C2_PWRDET_RXTX, 0x20);
2210 }
2211
2212 if (dev->phy.rev < 2) {
2213 b43_radio_set(dev, B2055_C1_TX_BB_MXGM, 0x20);
2214 b43_radio_set(dev, B2055_C2_TX_BB_MXGM, 0x20);
2215 } else {
2216 b43_radio_mask(dev, B2055_C1_TX_BB_MXGM, ~0x20);
2217 b43_radio_mask(dev, B2055_C2_TX_BB_MXGM, ~0x20);
2218 }
2219 }
2220}
2221
Rafał Miłeckie9762492010-01-15 16:08:25 +0100[diff] [blame]2222/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/IqCalGainParams */
2223static void b43_nphy_iq_cal_gain_params(struct b43_wldev *dev, u16 core,
2224 struct nphy_txgains target,
2225 struct nphy_iqcal_params *params)
2226{
2227 int i, j, indx;
2228 u16 gain;
2229
2230 if (dev->phy.rev >= 3) {
2231 params->txgm = target.txgm[core];
2232 params->pga = target.pga[core];
2233 params->pad = target.pad[core];
2234 params->ipa = target.ipa[core];
2235 params->cal_gain = (params->txgm << 12) | (params->pga << 8) |
2236 (params->pad << 4) | (params->ipa);
2237 for (j = 0; j < 5; j++)
2238 params->ncorr[j] = 0x79;
2239 } else {
2240 gain = (target.pad[core]) | (target.pga[core] << 4) |
2241 (target.txgm[core] << 8);
2242
2243 indx = (b43_current_band(dev->wl) == IEEE80211_BAND_5GHZ) ?
2244 1 : 0;
2245 for (i = 0; i < 9; i++)
2246 if (tbl_iqcal_gainparams[indx][i][0] == gain)
2247 break;
2248 i = min(i, 8);
2249
2250 params->txgm = tbl_iqcal_gainparams[indx][i][1];
2251 params->pga = tbl_iqcal_gainparams[indx][i][2];
2252 params->pad = tbl_iqcal_gainparams[indx][i][3];
2253 params->cal_gain = (params->txgm << 7) | (params->pga << 4) |
2254 (params->pad << 2);
2255 for (j = 0; j < 4; j++)
2256 params->ncorr[j] = tbl_iqcal_gainparams[indx][i][4 + j];
2257 }
2258}
2259
Rafał Miłeckide7ed0c2010-01-15 16:06:35 +0100[diff] [blame]2260/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/UpdateTxCalLadder */
2261static void b43_nphy_update_tx_cal_ladder(struct b43_wldev *dev, u16 core)
2262{
2263 struct b43_phy_n *nphy = dev->phy.n;
2264 int i;
2265 u16 scale, entry;
2266
2267 u16 tmp = nphy->txcal_bbmult;
2268 if (core == 0)
2269 tmp >>= 8;
2270 tmp &= 0xff;
2271
2272 for (i = 0; i < 18; i++) {
2273 scale = (ladder_lo[i].percent * tmp) / 100;
2274 entry = ((scale & 0xFF) << 8) | ladder_lo[i].g_env;
Rafał Miłeckid41a3552010-01-18 00:21:17 +0100[diff] [blame]2275 b43_ntab_write(dev, B43_NTAB16(15, i), entry);
Rafał Miłeckide7ed0c2010-01-15 16:06:35 +0100[diff] [blame]2276
2277 scale = (ladder_iq[i].percent * tmp) / 100;
2278 entry = ((scale & 0xFF) << 8) | ladder_iq[i].g_env;
Rafał Miłeckid41a3552010-01-18 00:21:17 +0100[diff] [blame]2279 b43_ntab_write(dev, B43_NTAB16(15, i + 32), entry);
Rafał Miłeckide7ed0c2010-01-15 16:06:35 +0100[diff] [blame]2280 }
2281}
2282
Rafał Miłecki45ca6972010-01-22 01:53:15 +0100[diff] [blame]2283/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/ExtPaSetTxDigiFilts */
2284static void b43_nphy_ext_pa_set_tx_dig_filters(struct b43_wldev *dev)
2285{
2286 int i;
2287 for (i = 0; i < 15; i++)
2288 b43_phy_write(dev, B43_PHY_N(0x2C5 + i),
2289 tbl_tx_filter_coef_rev4[2][i]);
2290}
2291
2292/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/IpaSetTxDigiFilts */
2293static void b43_nphy_int_pa_set_tx_dig_filters(struct b43_wldev *dev)
2294{
2295 int i, j;
2296 /* B43_NPHY_TXF_20CO_S0A1, B43_NPHY_TXF_40CO_S0A1, unknown */
2297 u16 offset[] = { 0x186, 0x195, 0x2C5 };
2298
2299 for (i = 0; i < 3; i++)
2300 for (j = 0; j < 15; j++)
2301 b43_phy_write(dev, B43_PHY_N(offset[i] + j),
2302 tbl_tx_filter_coef_rev4[i][j]);
2303
2304 if (dev->phy.is_40mhz) {
2305 for (j = 0; j < 15; j++)
2306 b43_phy_write(dev, B43_PHY_N(offset[0] + j),
2307 tbl_tx_filter_coef_rev4[3][j]);
2308 } else if (b43_current_band(dev->wl) == IEEE80211_BAND_5GHZ) {
2309 for (j = 0; j < 15; j++)
2310 b43_phy_write(dev, B43_PHY_N(offset[0] + j),
2311 tbl_tx_filter_coef_rev4[5][j]);
2312 }
2313
2314 if (dev->phy.channel == 14)
2315 for (j = 0; j < 15; j++)
2316 b43_phy_write(dev, B43_PHY_N(offset[0] + j),
2317 tbl_tx_filter_coef_rev4[6][j]);
2318}
2319
Rafał Miłeckib0022e12010-01-15 15:40:50 +0100[diff] [blame]2320/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/GetTxGain */
2321static struct nphy_txgains b43_nphy_get_tx_gains(struct b43_wldev *dev)
2322{
2323 struct b43_phy_n *nphy = dev->phy.n;
2324
2325 u16 curr_gain[2];
2326 struct nphy_txgains target;
2327 const u32 *table = NULL;
2328
2329 if (nphy->txpwrctrl == 0) {
2330 int i;
2331
2332 if (nphy->hang_avoid)
2333 b43_nphy_stay_in_carrier_search(dev, true);
Rafał Miłecki91458342010-01-18 00:21:35 +0100[diff] [blame]2334 b43_ntab_read_bulk(dev, B43_NTAB16(7, 0x110), 2, curr_gain);
Rafał Miłeckib0022e12010-01-15 15:40:50 +0100[diff] [blame]2335 if (nphy->hang_avoid)
2336 b43_nphy_stay_in_carrier_search(dev, false);
2337
2338 for (i = 0; i < 2; ++i) {
2339 if (dev->phy.rev >= 3) {
2340 target.ipa[i] = curr_gain[i] & 0x000F;
2341 target.pad[i] = (curr_gain[i] & 0x00F0) >> 4;
2342 target.pga[i] = (curr_gain[i] & 0x0F00) >> 8;
2343 target.txgm[i] = (curr_gain[i] & 0x7000) >> 12;
2344 } else {
2345 target.ipa[i] = curr_gain[i] & 0x0003;
2346 target.pad[i] = (curr_gain[i] & 0x000C) >> 2;
2347 target.pga[i] = (curr_gain[i] & 0x0070) >> 4;
2348 target.txgm[i] = (curr_gain[i] & 0x0380) >> 7;
2349 }
2350 }
2351 } else {
2352 int i;
2353 u16 index[2];
2354 index[0] = (b43_phy_read(dev, B43_NPHY_C1_TXPCTL_STAT) &
2355 B43_NPHY_TXPCTL_STAT_BIDX) >>
2356 B43_NPHY_TXPCTL_STAT_BIDX_SHIFT;
2357 index[1] = (b43_phy_read(dev, B43_NPHY_C2_TXPCTL_STAT) &
2358 B43_NPHY_TXPCTL_STAT_BIDX) >>
2359 B43_NPHY_TXPCTL_STAT_BIDX_SHIFT;
2360
2361 for (i = 0; i < 2; ++i) {
2362 if (dev->phy.rev >= 3) {
2363 enum ieee80211_band band =
2364 b43_current_band(dev->wl);
2365
2366 if ((nphy->ipa2g_on &&
2367 band == IEEE80211_BAND_2GHZ) ||
2368 (nphy->ipa5g_on &&
2369 band == IEEE80211_BAND_5GHZ)) {
2370 table = b43_nphy_get_ipa_gain_table(dev);
2371 } else {
2372 if (band == IEEE80211_BAND_5GHZ) {
2373 if (dev->phy.rev == 3)
2374 table = b43_ntab_tx_gain_rev3_5ghz;
2375 else if (dev->phy.rev == 4)
2376 table = b43_ntab_tx_gain_rev4_5ghz;
2377 else
2378 table = b43_ntab_tx_gain_rev5plus_5ghz;
2379 } else {
2380 table = b43_ntab_tx_gain_rev3plus_2ghz;
2381 }
2382 }
2383
2384 target.ipa[i] = (table[index[i]] >> 16) & 0xF;
2385 target.pad[i] = (table[index[i]] >> 20) & 0xF;
2386 target.pga[i] = (table[index[i]] >> 24) & 0xF;
2387 target.txgm[i] = (table[index[i]] >> 28) & 0xF;
2388 } else {
2389 table = b43_ntab_tx_gain_rev0_1_2;
2390
2391 target.ipa[i] = (table[index[i]] >> 16) & 0x3;
2392 target.pad[i] = (table[index[i]] >> 18) & 0x3;
2393 target.pga[i] = (table[index[i]] >> 20) & 0x7;
2394 target.txgm[i] = (table[index[i]] >> 23) & 0x7;
2395 }
2396 }
2397 }
2398
2399 return target;
2400}
2401
Rafał Miłeckie53de672010-01-17 13:03:32 +0100[diff] [blame]2402/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/TxCalPhyCleanup */
2403static void b43_nphy_tx_cal_phy_cleanup(struct b43_wldev *dev)
2404{
2405 u16 *regs = dev->phy.n->tx_rx_cal_phy_saveregs;
2406
2407 if (dev->phy.rev >= 3) {
2408 b43_phy_write(dev, B43_NPHY_AFECTL_C1, regs[0]);
2409 b43_phy_write(dev, B43_NPHY_AFECTL_C2, regs[1]);
2410 b43_phy_write(dev, B43_NPHY_AFECTL_OVER1, regs[2]);
2411 b43_phy_write(dev, B43_NPHY_AFECTL_OVER, regs[3]);
2412 b43_phy_write(dev, B43_NPHY_BBCFG, regs[4]);
Rafał Miłeckid41a3552010-01-18 00:21:17 +0100[diff] [blame]2413 b43_ntab_write(dev, B43_NTAB16(8, 3), regs[5]);
2414 b43_ntab_write(dev, B43_NTAB16(8, 19), regs[6]);
Rafał Miłeckie53de672010-01-17 13:03:32 +0100[diff] [blame]2415 b43_phy_write(dev, B43_NPHY_RFCTL_INTC1, regs[7]);
2416 b43_phy_write(dev, B43_NPHY_RFCTL_INTC2, regs[8]);
2417 b43_phy_write(dev, B43_NPHY_PAPD_EN0, regs[9]);
2418 b43_phy_write(dev, B43_NPHY_PAPD_EN1, regs[10]);
2419 b43_nphy_reset_cca(dev);
2420 } else {
2421 b43_phy_maskset(dev, B43_NPHY_AFECTL_C1, 0x0FFF, regs[0]);
2422 b43_phy_maskset(dev, B43_NPHY_AFECTL_C2, 0x0FFF, regs[1]);
2423 b43_phy_write(dev, B43_NPHY_AFECTL_OVER, regs[2]);
Rafał Miłeckid41a3552010-01-18 00:21:17 +0100[diff] [blame]2424 b43_ntab_write(dev, B43_NTAB16(8, 2), regs[3]);
2425 b43_ntab_write(dev, B43_NTAB16(8, 18), regs[4]);
Rafał Miłeckie53de672010-01-17 13:03:32 +0100[diff] [blame]2426 b43_phy_write(dev, B43_NPHY_RFCTL_INTC1, regs[5]);
2427 b43_phy_write(dev, B43_NPHY_RFCTL_INTC2, regs[6]);
2428 }
2429}
2430
2431/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/TxCalPhySetup */
2432static void b43_nphy_tx_cal_phy_setup(struct b43_wldev *dev)
2433{
2434 u16 *regs = dev->phy.n->tx_rx_cal_phy_saveregs;
2435 u16 tmp;
2436
2437 regs[0] = b43_phy_read(dev, B43_NPHY_AFECTL_C1);
2438 regs[1] = b43_phy_read(dev, B43_NPHY_AFECTL_C2);
2439 if (dev->phy.rev >= 3) {
2440 b43_phy_maskset(dev, B43_NPHY_AFECTL_C1, 0xF0FF, 0x0A00);
2441 b43_phy_maskset(dev, B43_NPHY_AFECTL_C2, 0xF0FF, 0x0A00);
2442
2443 tmp = b43_phy_read(dev, B43_NPHY_AFECTL_OVER1);
2444 regs[2] = tmp;
2445 b43_phy_write(dev, B43_NPHY_AFECTL_OVER1, tmp | 0x0600);
2446
2447 tmp = b43_phy_read(dev, B43_NPHY_AFECTL_OVER);
2448 regs[3] = tmp;
2449 b43_phy_write(dev, B43_NPHY_AFECTL_OVER, tmp | 0x0600);
2450
2451 regs[4] = b43_phy_read(dev, B43_NPHY_BBCFG);
Larry Fingeracd82aa2010-07-21 11:48:05 -0500[diff] [blame]2452 b43_phy_mask(dev, B43_NPHY_BBCFG,
2453 ~B43_NPHY_BBCFG_RSTRX & 0xFFFF);
Rafał Miłeckie53de672010-01-17 13:03:32 +0100[diff] [blame]2454
Rafał Miłeckic643a662010-01-18 00:21:27 +0100[diff] [blame]2455 tmp = b43_ntab_read(dev, B43_NTAB16(8, 3));
Rafał Miłeckie53de672010-01-17 13:03:32 +0100[diff] [blame]2456 regs[5] = tmp;
Rafał Miłeckid41a3552010-01-18 00:21:17 +0100[diff] [blame]2457 b43_ntab_write(dev, B43_NTAB16(8, 3), 0);
Rafał Miłeckic643a662010-01-18 00:21:27 +0100[diff] [blame]2458
2459 tmp = b43_ntab_read(dev, B43_NTAB16(8, 19));
Rafał Miłeckie53de672010-01-17 13:03:32 +0100[diff] [blame]2460 regs[6] = tmp;
Rafał Miłeckid41a3552010-01-18 00:21:17 +0100[diff] [blame]2461 b43_ntab_write(dev, B43_NTAB16(8, 19), 0);
Rafał Miłeckie53de672010-01-17 13:03:32 +0100[diff] [blame]2462 regs[7] = b43_phy_read(dev, B43_NPHY_RFCTL_INTC1);
2463 regs[8] = b43_phy_read(dev, B43_NPHY_RFCTL_INTC2);
2464
Rafał Miłecki67cbc3e2010-02-04 12:23:08 +0100[diff] [blame]2465 b43_nphy_rf_control_intc_override(dev, 2, 1, 3);
2466 b43_nphy_rf_control_intc_override(dev, 1, 2, 1);
2467 b43_nphy_rf_control_intc_override(dev, 1, 8, 2);
Rafał Miłeckie53de672010-01-17 13:03:32 +0100[diff] [blame]2468
2469 regs[9] = b43_phy_read(dev, B43_NPHY_PAPD_EN0);
2470 regs[10] = b43_phy_read(dev, B43_NPHY_PAPD_EN1);
2471 b43_phy_mask(dev, B43_NPHY_PAPD_EN0, ~0x0001);
2472 b43_phy_mask(dev, B43_NPHY_PAPD_EN1, ~0x0001);
2473 } else {
2474 b43_phy_maskset(dev, B43_NPHY_AFECTL_C1, 0x0FFF, 0xA000);
2475 b43_phy_maskset(dev, B43_NPHY_AFECTL_C2, 0x0FFF, 0xA000);
2476 tmp = b43_phy_read(dev, B43_NPHY_AFECTL_OVER);
2477 regs[2] = tmp;
2478 b43_phy_write(dev, B43_NPHY_AFECTL_OVER, tmp | 0x3000);
Rafał Miłeckic643a662010-01-18 00:21:27 +0100[diff] [blame]2479 tmp = b43_ntab_read(dev, B43_NTAB16(8, 2));
Rafał Miłeckie53de672010-01-17 13:03:32 +0100[diff] [blame]2480 regs[3] = tmp;
2481 tmp |= 0x2000;
Rafał Miłeckid41a3552010-01-18 00:21:17 +0100[diff] [blame]2482 b43_ntab_write(dev, B43_NTAB16(8, 2), tmp);
Rafał Miłeckic643a662010-01-18 00:21:27 +0100[diff] [blame]2483 tmp = b43_ntab_read(dev, B43_NTAB16(8, 18));
Rafał Miłeckie53de672010-01-17 13:03:32 +0100[diff] [blame]2484 regs[4] = tmp;
2485 tmp |= 0x2000;
Rafał Miłeckid41a3552010-01-18 00:21:17 +0100[diff] [blame]2486 b43_ntab_write(dev, B43_NTAB16(8, 18), tmp);
Rafał Miłeckie53de672010-01-17 13:03:32 +0100[diff] [blame]2487 regs[5] = b43_phy_read(dev, B43_NPHY_RFCTL_INTC1);
2488 regs[6] = b43_phy_read(dev, B43_NPHY_RFCTL_INTC2);
2489 if (b43_current_band(dev->wl) == IEEE80211_BAND_5GHZ)
2490 tmp = 0x0180;
2491 else
2492 tmp = 0x0120;
2493 b43_phy_write(dev, B43_NPHY_RFCTL_INTC1, tmp);
2494 b43_phy_write(dev, B43_NPHY_RFCTL_INTC2, tmp);
2495 }
2496}
2497
Rafał Miłeckibbc6dc12010-02-04 12:23:11 +0100[diff] [blame]2498/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/SaveCal */
2499static void b43_nphy_save_cal(struct b43_wldev *dev)
2500{
2501 struct b43_phy_n *nphy = dev->phy.n;
2502
2503 struct b43_phy_n_iq_comp *rxcal_coeffs = NULL;
2504 u16 *txcal_radio_regs = NULL;
Rafał Miłecki902db912010-02-27 13:03:37 +0100[diff] [blame]2505 struct b43_chanspec *iqcal_chanspec;
Rafał Miłeckibbc6dc12010-02-04 12:23:11 +0100[diff] [blame]2506 u16 *table = NULL;
2507
2508 if (nphy->hang_avoid)
2509 b43_nphy_stay_in_carrier_search(dev, 1);
2510
2511 if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ) {
2512 rxcal_coeffs = &nphy->cal_cache.rxcal_coeffs_2G;
2513 txcal_radio_regs = nphy->cal_cache.txcal_radio_regs_2G;
2514 iqcal_chanspec = &nphy->iqcal_chanspec_2G;
2515 table = nphy->cal_cache.txcal_coeffs_2G;
2516 } else {
2517 rxcal_coeffs = &nphy->cal_cache.rxcal_coeffs_5G;
2518 txcal_radio_regs = nphy->cal_cache.txcal_radio_regs_5G;
2519 iqcal_chanspec = &nphy->iqcal_chanspec_5G;
2520 table = nphy->cal_cache.txcal_coeffs_5G;
2521 }
2522
2523 b43_nphy_rx_iq_coeffs(dev, false, rxcal_coeffs);
2524 /* TODO use some definitions */
2525 if (dev->phy.rev >= 3) {
2526 txcal_radio_regs[0] = b43_radio_read(dev, 0x2021);
2527 txcal_radio_regs[1] = b43_radio_read(dev, 0x2022);
2528 txcal_radio_regs[2] = b43_radio_read(dev, 0x3021);
2529 txcal_radio_regs[3] = b43_radio_read(dev, 0x3022);
2530 txcal_radio_regs[4] = b43_radio_read(dev, 0x2023);
2531 txcal_radio_regs[5] = b43_radio_read(dev, 0x2024);
2532 txcal_radio_regs[6] = b43_radio_read(dev, 0x3023);
2533 txcal_radio_regs[7] = b43_radio_read(dev, 0x3024);
2534 } else {
2535 txcal_radio_regs[0] = b43_radio_read(dev, 0x8B);
2536 txcal_radio_regs[1] = b43_radio_read(dev, 0xBA);
2537 txcal_radio_regs[2] = b43_radio_read(dev, 0x8D);
2538 txcal_radio_regs[3] = b43_radio_read(dev, 0xBC);
2539 }
Rafał Miłecki204a6652010-10-14 19:33:34 +0200[diff] [blame]2540 iqcal_chanspec->center_freq = dev->phy.channel_freq;
2541 iqcal_chanspec->channel_type = dev->phy.channel_type;
Rafał Miłecki5818e982010-10-14 19:33:35 +0200[diff] [blame]2542 b43_ntab_read_bulk(dev, B43_NTAB16(15, 80), 8, table);
Rafał Miłeckibbc6dc12010-02-04 12:23:11 +0100[diff] [blame]2543
2544 if (nphy->hang_avoid)
2545 b43_nphy_stay_in_carrier_search(dev, 0);
2546}
2547
Rafał Miłecki2f258b72010-01-15 15:18:35 +0100[diff] [blame]2548/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/RestoreCal */
2549static void b43_nphy_restore_cal(struct b43_wldev *dev)
2550{
2551 struct b43_phy_n *nphy = dev->phy.n;
2552
2553 u16 coef[4];
2554 u16 *loft = NULL;
2555 u16 *table = NULL;
2556
2557 int i;
2558 u16 *txcal_radio_regs = NULL;
2559 struct b43_phy_n_iq_comp *rxcal_coeffs = NULL;
2560
2561 if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ) {
Rafał Miłecki204a6652010-10-14 19:33:34 +0200[diff] [blame]2562 if (!nphy->iqcal_chanspec_2G.center_freq)
Rafał Miłecki2f258b72010-01-15 15:18:35 +0100[diff] [blame]2563 return;
2564 table = nphy->cal_cache.txcal_coeffs_2G;
2565 loft = &nphy->cal_cache.txcal_coeffs_2G[5];
2566 } else {
Rafał Miłecki204a6652010-10-14 19:33:34 +0200[diff] [blame]2567 if (!nphy->iqcal_chanspec_5G.center_freq)
Rafał Miłecki2f258b72010-01-15 15:18:35 +0100[diff] [blame]2568 return;
2569 table = nphy->cal_cache.txcal_coeffs_5G;
2570 loft = &nphy->cal_cache.txcal_coeffs_5G[5];
2571 }
2572
Rafał Miłecki2581b142010-01-18 00:21:21 +0100[diff] [blame]2573 b43_ntab_write_bulk(dev, B43_NTAB16(15, 80), 4, table);
Rafał Miłecki2f258b72010-01-15 15:18:35 +0100[diff] [blame]2574
2575 for (i = 0; i < 4; i++) {
2576 if (dev->phy.rev >= 3)
2577 table[i] = coef[i];
2578 else
2579 coef[i] = 0;
2580 }
2581
Rafał Miłecki2581b142010-01-18 00:21:21 +0100[diff] [blame]2582 b43_ntab_write_bulk(dev, B43_NTAB16(15, 88), 4, coef);
2583 b43_ntab_write_bulk(dev, B43_NTAB16(15, 85), 2, loft);
2584 b43_ntab_write_bulk(dev, B43_NTAB16(15, 93), 2, loft);
Rafał Miłecki2f258b72010-01-15 15:18:35 +0100[diff] [blame]2585
2586 if (dev->phy.rev < 2)
2587 b43_nphy_tx_iq_workaround(dev);
2588
2589 if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ) {
2590 txcal_radio_regs = nphy->cal_cache.txcal_radio_regs_2G;
2591 rxcal_coeffs = &nphy->cal_cache.rxcal_coeffs_2G;
2592 } else {
2593 txcal_radio_regs = nphy->cal_cache.txcal_radio_regs_5G;
2594 rxcal_coeffs = &nphy->cal_cache.rxcal_coeffs_5G;
2595 }
2596
2597 /* TODO use some definitions */
2598 if (dev->phy.rev >= 3) {
2599 b43_radio_write(dev, 0x2021, txcal_radio_regs[0]);
2600 b43_radio_write(dev, 0x2022, txcal_radio_regs[1]);
2601 b43_radio_write(dev, 0x3021, txcal_radio_regs[2]);
2602 b43_radio_write(dev, 0x3022, txcal_radio_regs[3]);
2603 b43_radio_write(dev, 0x2023, txcal_radio_regs[4]);
2604 b43_radio_write(dev, 0x2024, txcal_radio_regs[5]);
2605 b43_radio_write(dev, 0x3023, txcal_radio_regs[6]);
2606 b43_radio_write(dev, 0x3024, txcal_radio_regs[7]);
2607 } else {
2608 b43_radio_write(dev, 0x8B, txcal_radio_regs[0]);
2609 b43_radio_write(dev, 0xBA, txcal_radio_regs[1]);
2610 b43_radio_write(dev, 0x8D, txcal_radio_regs[2]);
2611 b43_radio_write(dev, 0xBC, txcal_radio_regs[3]);
2612 }
2613 b43_nphy_rx_iq_coeffs(dev, true, rxcal_coeffs);
2614}
2615
Rafał Miłeckifb43b8e2010-01-15 16:10:48 +0100[diff] [blame]2616/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/CalTxIqlo */
2617static int b43_nphy_cal_tx_iq_lo(struct b43_wldev *dev,
2618 struct nphy_txgains target,
2619 bool full, bool mphase)
2620{
2621 struct b43_phy_n *nphy = dev->phy.n;
2622 int i;
2623 int error = 0;
2624 int freq;
2625 bool avoid = false;
2626 u8 length;
2627 u16 tmp, core, type, count, max, numb, last, cmd;
2628 const u16 *table;
2629 bool phy6or5x;
2630
2631 u16 buffer[11];
2632 u16 diq_start = 0;
2633 u16 save[2];
2634 u16 gain[2];
2635 struct nphy_iqcal_params params[2];
2636 bool updated[2] = { };
2637
2638 b43_nphy_stay_in_carrier_search(dev, true);
2639
2640 if (dev->phy.rev >= 4) {
2641 avoid = nphy->hang_avoid;
2642 nphy->hang_avoid = 0;
2643 }
2644
Rafał Miłecki91458342010-01-18 00:21:35 +0100[diff] [blame]2645 b43_ntab_read_bulk(dev, B43_NTAB16(7, 0x110), 2, save);
Rafał Miłeckifb43b8e2010-01-15 16:10:48 +0100[diff] [blame]2646
2647 for (i = 0; i < 2; i++) {
2648 b43_nphy_iq_cal_gain_params(dev, i, target, &params[i]);
2649 gain[i] = params[i].cal_gain;
2650 }
Rafał Miłecki2581b142010-01-18 00:21:21 +0100[diff] [blame]2651
2652 b43_ntab_write_bulk(dev, B43_NTAB16(7, 0x110), 2, gain);
Rafał Miłeckifb43b8e2010-01-15 16:10:48 +0100[diff] [blame]2653
2654 b43_nphy_tx_cal_radio_setup(dev);
Rafał Miłeckie53de672010-01-17 13:03:32 +0100[diff] [blame]2655 b43_nphy_tx_cal_phy_setup(dev);
Rafał Miłeckifb43b8e2010-01-15 16:10:48 +0100[diff] [blame]2656
2657 phy6or5x = dev->phy.rev >= 6 ||
2658 (dev->phy.rev == 5 && nphy->ipa2g_on &&
2659 b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ);
2660 if (phy6or5x) {
Rafał Miłecki38bb9022010-01-30 20:18:05 +0100[diff] [blame]2661 if (dev->phy.is_40mhz) {
2662 b43_ntab_write_bulk(dev, B43_NTAB16(15, 0), 18,
2663 tbl_tx_iqlo_cal_loft_ladder_40);
2664 b43_ntab_write_bulk(dev, B43_NTAB16(15, 32), 18,
2665 tbl_tx_iqlo_cal_iqimb_ladder_40);
2666 } else {
2667 b43_ntab_write_bulk(dev, B43_NTAB16(15, 0), 18,
2668 tbl_tx_iqlo_cal_loft_ladder_20);
2669 b43_ntab_write_bulk(dev, B43_NTAB16(15, 32), 18,
2670 tbl_tx_iqlo_cal_iqimb_ladder_20);
2671 }
Rafał Miłeckifb43b8e2010-01-15 16:10:48 +0100[diff] [blame]2672 }
2673
2674 b43_phy_write(dev, B43_NPHY_IQLOCAL_CMDGCTL, 0x8AA9);
2675
Rafał Miłeckiaa4c7b2a22010-01-22 01:53:12 +0100[diff] [blame]2676 if (!dev->phy.is_40mhz)
Rafał Miłeckifb43b8e2010-01-15 16:10:48 +0100[diff] [blame]2677 freq = 2500;
2678 else
2679 freq = 5000;
2680
2681 if (nphy->mphase_cal_phase_id > 2)
Rafał Miłecki10a79872010-01-22 01:53:14 +0100[diff] [blame]2682 b43_nphy_run_samples(dev, (dev->phy.is_40mhz ? 40 : 20) * 8,
2683 0xFFFF, 0, true, false);
Rafał Miłeckifb43b8e2010-01-15 16:10:48 +0100[diff] [blame]2684 else
Rafał Miłecki59af0992010-01-22 01:53:16 +0100[diff] [blame]2685 error = b43_nphy_tx_tone(dev, freq, 250, true, false);
Rafał Miłeckifb43b8e2010-01-15 16:10:48 +0100[diff] [blame]2686
2687 if (error == 0) {
2688 if (nphy->mphase_cal_phase_id > 2) {
2689 table = nphy->mphase_txcal_bestcoeffs;
2690 length = 11;
2691 if (dev->phy.rev < 3)
2692 length -= 2;
2693 } else {
2694 if (!full && nphy->txiqlocal_coeffsvalid) {
2695 table = nphy->txiqlocal_bestc;
2696 length = 11;
2697 if (dev->phy.rev < 3)
2698 length -= 2;
2699 } else {
2700 full = true;
2701 if (dev->phy.rev >= 3) {
2702 table = tbl_tx_iqlo_cal_startcoefs_nphyrev3;
2703 length = B43_NTAB_TX_IQLO_CAL_STARTCOEFS_REV3;
2704 } else {
2705 table = tbl_tx_iqlo_cal_startcoefs;
2706 length = B43_NTAB_TX_IQLO_CAL_STARTCOEFS;
2707 }
2708 }
2709 }
2710
Rafał Miłecki2581b142010-01-18 00:21:21 +0100[diff] [blame]2711 b43_ntab_write_bulk(dev, B43_NTAB16(15, 64), length, table);
Rafał Miłeckifb43b8e2010-01-15 16:10:48 +0100[diff] [blame]2712
2713 if (full) {
2714 if (dev->phy.rev >= 3)
2715 max = B43_NTAB_TX_IQLO_CAL_CMDS_FULLCAL_REV3;
2716 else
2717 max = B43_NTAB_TX_IQLO_CAL_CMDS_FULLCAL;
2718 } else {
2719 if (dev->phy.rev >= 3)
2720 max = B43_NTAB_TX_IQLO_CAL_CMDS_RECAL_REV3;
2721 else
2722 max = B43_NTAB_TX_IQLO_CAL_CMDS_RECAL;
2723 }
2724
2725 if (mphase) {
2726 count = nphy->mphase_txcal_cmdidx;
2727 numb = min(max,
2728 (u16)(count + nphy->mphase_txcal_numcmds));
2729 } else {
2730 count = 0;
2731 numb = max;
2732 }
2733
2734 for (; count < numb; count++) {
2735 if (full) {
2736 if (dev->phy.rev >= 3)
2737 cmd = tbl_tx_iqlo_cal_cmds_fullcal_nphyrev3[count];
2738 else
2739 cmd = tbl_tx_iqlo_cal_cmds_fullcal[count];
2740 } else {
2741 if (dev->phy.rev >= 3)
2742 cmd = tbl_tx_iqlo_cal_cmds_recal_nphyrev3[count];
2743 else
2744 cmd = tbl_tx_iqlo_cal_cmds_recal[count];
2745 }
2746
2747 core = (cmd & 0x3000) >> 12;
2748 type = (cmd & 0x0F00) >> 8;
2749
2750 if (phy6or5x && updated[core] == 0) {
2751 b43_nphy_update_tx_cal_ladder(dev, core);
2752 updated[core] = 1;
2753 }
2754
2755 tmp = (params[core].ncorr[type] << 8) | 0x66;
2756 b43_phy_write(dev, B43_NPHY_IQLOCAL_CMDNNUM, tmp);
2757
2758 if (type == 1 || type == 3 || type == 4) {
Rafał Miłeckic643a662010-01-18 00:21:27 +0100[diff] [blame]2759 buffer[0] = b43_ntab_read(dev,
2760 B43_NTAB16(15, 69 + core));
Rafał Miłeckifb43b8e2010-01-15 16:10:48 +0100[diff] [blame]2761 diq_start = buffer[0];
2762 buffer[0] = 0;
Rafał Miłeckid41a3552010-01-18 00:21:17 +0100[diff] [blame]2763 b43_ntab_write(dev, B43_NTAB16(15, 69 + core),
2764 0);
Rafał Miłeckifb43b8e2010-01-15 16:10:48 +0100[diff] [blame]2765 }
2766
2767 b43_phy_write(dev, B43_NPHY_IQLOCAL_CMD, cmd);
2768 for (i = 0; i < 2000; i++) {
2769 tmp = b43_phy_read(dev, B43_NPHY_IQLOCAL_CMD);
2770 if (tmp & 0xC000)
2771 break;
2772 udelay(10);
2773 }
2774
Rafał Miłecki91458342010-01-18 00:21:35 +0100[diff] [blame]2775 b43_ntab_read_bulk(dev, B43_NTAB16(15, 96), length,
2776 buffer);
Rafał Miłecki2581b142010-01-18 00:21:21 +0100[diff] [blame]2777 b43_ntab_write_bulk(dev, B43_NTAB16(15, 64), length,
2778 buffer);
Rafał Miłeckifb43b8e2010-01-15 16:10:48 +0100[diff] [blame]2779
2780 if (type == 1 || type == 3 || type == 4)
2781 buffer[0] = diq_start;
2782 }
2783
2784 if (mphase)
2785 nphy->mphase_txcal_cmdidx = (numb >= max) ? 0 : numb;
2786
2787 last = (dev->phy.rev < 3) ? 6 : 7;
2788
2789 if (!mphase || nphy->mphase_cal_phase_id == last) {
Rafał Miłecki2581b142010-01-18 00:21:21 +0100[diff] [blame]2790 b43_ntab_write_bulk(dev, B43_NTAB16(15, 96), 4, buffer);
Rafał Miłecki91458342010-01-18 00:21:35 +0100[diff] [blame]2791 b43_ntab_read_bulk(dev, B43_NTAB16(15, 80), 4, buffer);
Rafał Miłeckifb43b8e2010-01-15 16:10:48 +0100[diff] [blame]2792 if (dev->phy.rev < 3) {
2793 buffer[0] = 0;
2794 buffer[1] = 0;
2795 buffer[2] = 0;
2796 buffer[3] = 0;
2797 }
Rafał Miłecki2581b142010-01-18 00:21:21 +0100[diff] [blame]2798 b43_ntab_write_bulk(dev, B43_NTAB16(15, 88), 4,
2799 buffer);
Rafał Miłeckibc53e512010-04-01 23:11:10 +0200[diff] [blame]2800 b43_ntab_read_bulk(dev, B43_NTAB16(15, 101), 2,
Rafał Miłecki2581b142010-01-18 00:21:21 +0100[diff] [blame]2801 buffer);
2802 b43_ntab_write_bulk(dev, B43_NTAB16(15, 85), 2,
2803 buffer);
2804 b43_ntab_write_bulk(dev, B43_NTAB16(15, 93), 2,
2805 buffer);
Rafał Miłeckifb43b8e2010-01-15 16:10:48 +0100[diff] [blame]2806 length = 11;
2807 if (dev->phy.rev < 3)
2808 length -= 2;
Rafał Miłecki91458342010-01-18 00:21:35 +0100[diff] [blame]2809 b43_ntab_read_bulk(dev, B43_NTAB16(15, 96), length,
2810 nphy->txiqlocal_bestc);
Rafał Miłeckifb43b8e2010-01-15 16:10:48 +0100[diff] [blame]2811 nphy->txiqlocal_coeffsvalid = true;
Rafał Miłecki204a6652010-10-14 19:33:34 +0200[diff] [blame]2812 nphy->txiqlocal_chanspec.center_freq =
2813 dev->phy.channel_freq;
2814 nphy->txiqlocal_chanspec.channel_type =
2815 dev->phy.channel_type;
Rafał Miłeckifb43b8e2010-01-15 16:10:48 +0100[diff] [blame]2816 } else {
2817 length = 11;
2818 if (dev->phy.rev < 3)
2819 length -= 2;
Rafał Miłecki91458342010-01-18 00:21:35 +0100[diff] [blame]2820 b43_ntab_read_bulk(dev, B43_NTAB16(15, 96), length,
2821 nphy->mphase_txcal_bestcoeffs);
Rafał Miłeckifb43b8e2010-01-15 16:10:48 +0100[diff] [blame]2822 }
2823
Rafał Miłecki53ae8e82010-01-17 13:03:48 +0100[diff] [blame]2824 b43_nphy_stop_playback(dev);
Rafał Miłeckifb43b8e2010-01-15 16:10:48 +0100[diff] [blame]2825 b43_phy_write(dev, B43_NPHY_IQLOCAL_CMDGCTL, 0);
2826 }
2827
Rafał Miłeckie53de672010-01-17 13:03:32 +0100[diff] [blame]2828 b43_nphy_tx_cal_phy_cleanup(dev);
Rafał Miłecki2581b142010-01-18 00:21:21 +0100[diff] [blame]2829 b43_ntab_write_bulk(dev, B43_NTAB16(7, 0x110), 2, save);
Rafał Miłeckifb43b8e2010-01-15 16:10:48 +0100[diff] [blame]2830
2831 if (dev->phy.rev < 2 && (!mphase || nphy->mphase_cal_phase_id == last))
2832 b43_nphy_tx_iq_workaround(dev);
2833
2834 if (dev->phy.rev >= 4)
2835 nphy->hang_avoid = avoid;
2836
2837 b43_nphy_stay_in_carrier_search(dev, false);
2838
2839 return error;
2840}
2841
Rafał Miłecki984ff4f2010-02-04 12:23:10 +0100[diff] [blame]2842/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/ReapplyTxCalCoeffs */
2843static void b43_nphy_reapply_tx_cal_coeffs(struct b43_wldev *dev)
2844{
2845 struct b43_phy_n *nphy = dev->phy.n;
2846 u8 i;
2847 u16 buffer[7];
2848 bool equal = true;
2849
Rafał Miłecki902db912010-02-27 13:03:37 +0100[diff] [blame]2850 if (!nphy->txiqlocal_coeffsvalid ||
Rafał Miłecki204a6652010-10-14 19:33:34 +0200[diff] [blame]2851 nphy->txiqlocal_chanspec.center_freq != dev->phy.channel_freq ||
2852 nphy->txiqlocal_chanspec.channel_type != dev->phy.channel_type)
Rafał Miłecki984ff4f2010-02-04 12:23:10 +0100[diff] [blame]2853 return;
2854
2855 b43_ntab_read_bulk(dev, B43_NTAB16(15, 80), 7, buffer);
2856 for (i = 0; i < 4; i++) {
2857 if (buffer[i] != nphy->txiqlocal_bestc[i]) {
2858 equal = false;
2859 break;
2860 }
2861 }
2862
2863 if (!equal) {
2864 b43_ntab_write_bulk(dev, B43_NTAB16(15, 80), 4,
2865 nphy->txiqlocal_bestc);
2866 for (i = 0; i < 4; i++)
2867 buffer[i] = 0;
2868 b43_ntab_write_bulk(dev, B43_NTAB16(15, 88), 4,
2869 buffer);
2870 b43_ntab_write_bulk(dev, B43_NTAB16(15, 85), 2,
2871 &nphy->txiqlocal_bestc[5]);
2872 b43_ntab_write_bulk(dev, B43_NTAB16(15, 93), 2,
2873 &nphy->txiqlocal_bestc[5]);
2874 }
2875}
2876
Rafał Miłecki15931e32010-01-15 16:20:56 +0100[diff] [blame]2877/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/CalRxIqRev2 */
2878static int b43_nphy_rev2_cal_rx_iq(struct b43_wldev *dev,
2879 struct nphy_txgains target, u8 type, bool debug)
2880{
2881 struct b43_phy_n *nphy = dev->phy.n;
2882 int i, j, index;
2883 u8 rfctl[2];
2884 u8 afectl_core;
2885 u16 tmp[6];
2886 u16 cur_hpf1, cur_hpf2, cur_lna;
2887 u32 real, imag;
2888 enum ieee80211_band band;
2889
2890 u8 use;
2891 u16 cur_hpf;
2892 u16 lna[3] = { 3, 3, 1 };
2893 u16 hpf1[3] = { 7, 2, 0 };
2894 u16 hpf2[3] = { 2, 0, 0 };
Rafał Miłeckide9a47f2010-01-18 00:21:49 +0100[diff] [blame]2895 u32 power[3] = { };
Rafał Miłecki15931e32010-01-15 16:20:56 +0100[diff] [blame]2896 u16 gain_save[2];
2897 u16 cal_gain[2];
2898 struct nphy_iqcal_params cal_params[2];
2899 struct nphy_iq_est est;
2900 int ret = 0;
2901 bool playtone = true;
2902 int desired = 13;
2903
2904 b43_nphy_stay_in_carrier_search(dev, 1);
2905
2906 if (dev->phy.rev < 2)
Rafał Miłecki984ff4f2010-02-04 12:23:10 +0100[diff] [blame]2907 b43_nphy_reapply_tx_cal_coeffs(dev);
Rafał Miłecki91458342010-01-18 00:21:35 +0100[diff] [blame]2908 b43_ntab_read_bulk(dev, B43_NTAB16(7, 0x110), 2, gain_save);
Rafał Miłecki15931e32010-01-15 16:20:56 +0100[diff] [blame]2909 for (i = 0; i < 2; i++) {
2910 b43_nphy_iq_cal_gain_params(dev, i, target, &cal_params[i]);
2911 cal_gain[i] = cal_params[i].cal_gain;
2912 }
Rafał Miłecki2581b142010-01-18 00:21:21 +0100[diff] [blame]2913 b43_ntab_write_bulk(dev, B43_NTAB16(7, 0x110), 2, cal_gain);
Rafał Miłecki15931e32010-01-15 16:20:56 +0100[diff] [blame]2914
2915 for (i = 0; i < 2; i++) {
2916 if (i == 0) {
2917 rfctl[0] = B43_NPHY_RFCTL_INTC1;
2918 rfctl[1] = B43_NPHY_RFCTL_INTC2;
2919 afectl_core = B43_NPHY_AFECTL_C1;
2920 } else {
2921 rfctl[0] = B43_NPHY_RFCTL_INTC2;
2922 rfctl[1] = B43_NPHY_RFCTL_INTC1;
2923 afectl_core = B43_NPHY_AFECTL_C2;
2924 }
2925
2926 tmp[1] = b43_phy_read(dev, B43_NPHY_RFSEQCA);
2927 tmp[2] = b43_phy_read(dev, afectl_core);
2928 tmp[3] = b43_phy_read(dev, B43_NPHY_AFECTL_OVER);
2929 tmp[4] = b43_phy_read(dev, rfctl[0]);
2930 tmp[5] = b43_phy_read(dev, rfctl[1]);
2931
2932 b43_phy_maskset(dev, B43_NPHY_RFSEQCA,
Larry Fingeracd82aa2010-07-21 11:48:05 -0500[diff] [blame]2933 ~B43_NPHY_RFSEQCA_RXDIS & 0xFFFF,
Rafał Miłecki15931e32010-01-15 16:20:56 +0100[diff] [blame]2934 ((1 - i) << B43_NPHY_RFSEQCA_RXDIS_SHIFT));
2935 b43_phy_maskset(dev, B43_NPHY_RFSEQCA, ~B43_NPHY_RFSEQCA_TXEN,
2936 (1 - i));
2937 b43_phy_set(dev, afectl_core, 0x0006);
2938 b43_phy_set(dev, B43_NPHY_AFECTL_OVER, 0x0006);
2939
2940 band = b43_current_band(dev->wl);
2941
2942 if (nphy->rxcalparams & 0xFF000000) {
2943 if (band == IEEE80211_BAND_5GHZ)
2944 b43_phy_write(dev, rfctl[0], 0x140);
2945 else
2946 b43_phy_write(dev, rfctl[0], 0x110);
2947 } else {
2948 if (band == IEEE80211_BAND_5GHZ)
2949 b43_phy_write(dev, rfctl[0], 0x180);
2950 else
2951 b43_phy_write(dev, rfctl[0], 0x120);
2952 }
2953
2954 if (band == IEEE80211_BAND_5GHZ)
2955 b43_phy_write(dev, rfctl[1], 0x148);
2956 else
2957 b43_phy_write(dev, rfctl[1], 0x114);
2958
2959 if (nphy->rxcalparams & 0x10000) {
2960 b43_radio_maskset(dev, B2055_C1_GENSPARE2, 0xFC,
2961 (i + 1));
2962 b43_radio_maskset(dev, B2055_C2_GENSPARE2, 0xFC,
2963 (2 - i));
2964 }
2965
2966 for (j = 0; i < 4; j++) {
2967 if (j < 3) {
2968 cur_lna = lna[j];
2969 cur_hpf1 = hpf1[j];
2970 cur_hpf2 = hpf2[j];
2971 } else {
2972 if (power[1] > 10000) {
2973 use = 1;
2974 cur_hpf = cur_hpf1;
2975 index = 2;
2976 } else {
2977 if (power[0] > 10000) {
2978 use = 1;
2979 cur_hpf = cur_hpf1;
2980 index = 1;
2981 } else {
2982 index = 0;
2983 use = 2;
2984 cur_hpf = cur_hpf2;
2985 }
2986 }
2987 cur_lna = lna[index];
2988 cur_hpf1 = hpf1[index];
2989 cur_hpf2 = hpf2[index];
2990 cur_hpf += desired - hweight32(power[index]);
2991 cur_hpf = clamp_val(cur_hpf, 0, 10);
2992 if (use == 1)
2993 cur_hpf1 = cur_hpf;
2994 else
2995 cur_hpf2 = cur_hpf;
2996 }
2997
2998 tmp[0] = ((cur_hpf2 << 8) | (cur_hpf1 << 4) |
2999 (cur_lna << 2));
Rafał Miłecki75377b22010-01-22 01:53:13 +0100[diff] [blame]3000 b43_nphy_rf_control_override(dev, 0x400, tmp[0], 3,
3001 false);
Rafał Miłeckide9a47f2010-01-18 00:21:49 +0100[diff] [blame]3002 b43_nphy_force_rf_sequence(dev, B43_RFSEQ_RESET2RX);
Rafał Miłecki53ae8e82010-01-17 13:03:48 +0100[diff] [blame]3003 b43_nphy_stop_playback(dev);
Rafał Miłecki15931e32010-01-15 16:20:56 +0100[diff] [blame]3004
3005 if (playtone) {
Rafał Miłecki59af0992010-01-22 01:53:16 +0100[diff] [blame]3006 ret = b43_nphy_tx_tone(dev, 4000,
3007 (nphy->rxcalparams & 0xFFFF),
3008 false, false);
Rafał Miłecki15931e32010-01-15 16:20:56 +0100[diff] [blame]3009 playtone = false;
3010 } else {
Rafał Miłecki10a79872010-01-22 01:53:14 +0100[diff] [blame]3011 b43_nphy_run_samples(dev, 160, 0xFFFF, 0,
3012 false, false);
Rafał Miłecki15931e32010-01-15 16:20:56 +0100[diff] [blame]3013 }
3014
3015 if (ret == 0) {
3016 if (j < 3) {
3017 b43_nphy_rx_iq_est(dev, &est, 1024, 32,
3018 false);
3019 if (i == 0) {
3020 real = est.i0_pwr;
3021 imag = est.q0_pwr;
3022 } else {
3023 real = est.i1_pwr;
3024 imag = est.q1_pwr;
3025 }
3026 power[i] = ((real + imag) / 1024) + 1;
3027 } else {
3028 b43_nphy_calc_rx_iq_comp(dev, 1 << i);
3029 }
Rafał Miłecki53ae8e82010-01-17 13:03:48 +0100[diff] [blame]3030 b43_nphy_stop_playback(dev);
Rafał Miłecki15931e32010-01-15 16:20:56 +0100[diff] [blame]3031 }
3032
3033 if (ret != 0)
3034 break;
3035 }
3036
3037 b43_radio_mask(dev, B2055_C1_GENSPARE2, 0xFC);
3038 b43_radio_mask(dev, B2055_C2_GENSPARE2, 0xFC);
3039 b43_phy_write(dev, rfctl[1], tmp[5]);
3040 b43_phy_write(dev, rfctl[0], tmp[4]);
3041 b43_phy_write(dev, B43_NPHY_AFECTL_OVER, tmp[3]);
3042 b43_phy_write(dev, afectl_core, tmp[2]);
3043 b43_phy_write(dev, B43_NPHY_RFSEQCA, tmp[1]);
3044
3045 if (ret != 0)
3046 break;
3047 }
3048
Rafał Miłecki75377b22010-01-22 01:53:13 +0100[diff] [blame]3049 b43_nphy_rf_control_override(dev, 0x400, 0, 3, true);
Rafał Miłecki67c0d6e2010-01-17 13:04:02 +0100[diff] [blame]3050 b43_nphy_force_rf_sequence(dev, B43_RFSEQ_RESET2RX);
Rafał Miłecki2581b142010-01-18 00:21:21 +0100[diff] [blame]3051 b43_ntab_write_bulk(dev, B43_NTAB16(7, 0x110), 2, gain_save);
Rafał Miłecki15931e32010-01-15 16:20:56 +0100[diff] [blame]3052
3053 b43_nphy_stay_in_carrier_search(dev, 0);
3054
3055 return ret;
3056}
3057
3058static int b43_nphy_rev3_cal_rx_iq(struct b43_wldev *dev,
3059 struct nphy_txgains target, u8 type, bool debug)
3060{
3061 return -1;
3062}
3063
3064/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/CalRxIq */
3065static int b43_nphy_cal_rx_iq(struct b43_wldev *dev,
3066 struct nphy_txgains target, u8 type, bool debug)
3067{
3068 if (dev->phy.rev >= 3)
3069 return b43_nphy_rev3_cal_rx_iq(dev, target, type, debug);
3070 else
3071 return b43_nphy_rev2_cal_rx_iq(dev, target, type, debug);
3072}
3073
Gábor Stefanikd2730b22010-08-16 22:39:16 +0200[diff] [blame]3074/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/MacPhyClkSet */
3075static void b43_nphy_mac_phy_clock_set(struct b43_wldev *dev, bool on)
3076{
3077 u32 tmslow = ssb_read32(dev->dev, SSB_TMSLOW);
3078 if (on)
3079 tmslow |= SSB_TMSLOW_PHYCLK;
3080 else
3081 tmslow &= ~SSB_TMSLOW_PHYCLK;
3082 ssb_write32(dev->dev, SSB_TMSLOW, tmslow);
3083}
3084
Gábor Stefanik4e687b22010-08-16 22:39:17 +0200[diff] [blame]3085/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/RxCoreSetState */
3086static void b43_nphy_set_rx_core_state(struct b43_wldev *dev, u8 mask)
3087{
3088 struct b43_phy *phy = &dev->phy;
3089 struct b43_phy_n *nphy = phy->n;
3090 u16 buf[16];
3091
Rafał Miłecki049fbfe2010-08-22 21:47:32 +0200[diff] [blame]3092 nphy->phyrxchain = mask;
3093
Gábor Stefanik4e687b22010-08-16 22:39:17 +0200[diff] [blame]3094 if (0 /* FIXME clk */)
3095 return;
3096
3097 b43_mac_suspend(dev);
3098
3099 if (nphy->hang_avoid)
3100 b43_nphy_stay_in_carrier_search(dev, true);
3101
3102 b43_phy_maskset(dev, B43_NPHY_RFSEQCA, ~B43_NPHY_RFSEQCA_RXEN,
3103 (mask & 0x3) << B43_NPHY_RFSEQCA_RXEN_SHIFT);
3104
Rafał Miłecki049fbfe2010-08-22 21:47:32 +0200[diff] [blame]3105 if ((mask & 0x3) != 0x3) {
Gábor Stefanik4e687b22010-08-16 22:39:17 +0200[diff] [blame]3106 b43_phy_write(dev, B43_NPHY_HPANT_SWTHRES, 1);
3107 if (dev->phy.rev >= 3) {
3108 /* TODO */
3109 }
3110 } else {
3111 b43_phy_write(dev, B43_NPHY_HPANT_SWTHRES, 0x1E);
3112 if (dev->phy.rev >= 3) {
3113 /* TODO */
3114 }
3115 }
3116
3117 b43_nphy_force_rf_sequence(dev, B43_RFSEQ_RESET2RX);
3118
3119 if (nphy->hang_avoid)
3120 b43_nphy_stay_in_carrier_search(dev, false);
3121
3122 b43_mac_enable(dev);
3123}
3124
Rafał Miłecki42e15472010-01-15 15:06:47 +0100[diff] [blame]3125/*
Rafał Miłecki0988a7a2010-01-15 13:27:29 +0100[diff] [blame]3126 * Init N-PHY
3127 * http://bcm-v4.sipsolutions.net/802.11/PHY/Init/N
3128 */
Michael Buesch424047e2008-01-09 16:13:56 +0100[diff] [blame]3129int b43_phy_initn(struct b43_wldev *dev)
3130{
Rafał Miłecki0988a7a2010-01-15 13:27:29 +0100[diff] [blame]3131 struct ssb_bus *bus = dev->dev->bus;
Michael Buesch95b66ba2008-01-18 01:09:25 +0100[diff] [blame]3132 struct b43_phy *phy = &dev->phy;
Rafał Miłecki0988a7a2010-01-15 13:27:29 +0100[diff] [blame]3133 struct b43_phy_n *nphy = phy->n;
3134 u8 tx_pwr_state;
3135 struct nphy_txgains target;
Michael Buesch95b66ba2008-01-18 01:09:25 +0100[diff] [blame]3136 u16 tmp;
Rafał Miłecki0988a7a2010-01-15 13:27:29 +0100[diff] [blame]3137 enum ieee80211_band tmp2;
3138 bool do_rssi_cal;
Michael Buesch424047e2008-01-09 16:13:56 +0100[diff] [blame]3139
Rafał Miłecki0988a7a2010-01-15 13:27:29 +0100[diff] [blame]3140 u16 clip[2];
3141 bool do_cal = false;
3142
3143 if ((dev->phy.rev >= 3) &&
3144 (bus->sprom.boardflags_lo & B43_BFL_EXTLNA) &&
3145 (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ)) {
3146 chipco_set32(&dev->dev->bus->chipco, SSB_CHIPCO_CHIPCTL, 0x40);
3147 }
3148 nphy->deaf_count = 0;
Michael Buesch95b66ba2008-01-18 01:09:25 +0100[diff] [blame]3149 b43_nphy_tables_init(dev);
Rafał Miłecki0988a7a2010-01-15 13:27:29 +0100[diff] [blame]3150 nphy->crsminpwr_adjusted = false;
3151 nphy->noisevars_adjusted = false;
Michael Buesch95b66ba2008-01-18 01:09:25 +0100[diff] [blame]3152
3153 /* Clear all overrides */
Rafał Miłecki0988a7a2010-01-15 13:27:29 +0100[diff] [blame]3154 if (dev->phy.rev >= 3) {
3155 b43_phy_write(dev, B43_NPHY_TXF_40CO_B1S1, 0);
3156 b43_phy_write(dev, B43_NPHY_RFCTL_OVER, 0);
3157 b43_phy_write(dev, B43_NPHY_TXF_40CO_B1S0, 0);
3158 b43_phy_write(dev, B43_NPHY_TXF_40CO_B32S1, 0);
3159 } else {
3160 b43_phy_write(dev, B43_NPHY_RFCTL_OVER, 0);
3161 }
Michael Buesch95b66ba2008-01-18 01:09:25 +0100[diff] [blame]3162 b43_phy_write(dev, B43_NPHY_RFCTL_INTC1, 0);
3163 b43_phy_write(dev, B43_NPHY_RFCTL_INTC2, 0);
Rafał Miłecki0988a7a2010-01-15 13:27:29 +0100[diff] [blame]3164 if (dev->phy.rev < 6) {
3165 b43_phy_write(dev, B43_NPHY_RFCTL_INTC3, 0);
3166 b43_phy_write(dev, B43_NPHY_RFCTL_INTC4, 0);
3167 }
Michael Buesch95b66ba2008-01-18 01:09:25 +0100[diff] [blame]3168 b43_phy_mask(dev, B43_NPHY_RFSEQMODE,
3169 ~(B43_NPHY_RFSEQMODE_CAOVER |
3170 B43_NPHY_RFSEQMODE_TROVER));
Rafał Miłecki0988a7a2010-01-15 13:27:29 +0100[diff] [blame]3171 if (dev->phy.rev >= 3)
3172 b43_phy_write(dev, B43_NPHY_AFECTL_OVER1, 0);
Michael Buesch95b66ba2008-01-18 01:09:25 +0100[diff] [blame]3173 b43_phy_write(dev, B43_NPHY_AFECTL_OVER, 0);
3174
Rafał Miłecki0988a7a2010-01-15 13:27:29 +0100[diff] [blame]3175 if (dev->phy.rev <= 2) {
3176 tmp = (dev->phy.rev == 2) ? 0x3B : 0x40;
3177 b43_phy_maskset(dev, B43_NPHY_BPHY_CTL3,
3178 ~B43_NPHY_BPHY_CTL3_SCALE,
3179 tmp << B43_NPHY_BPHY_CTL3_SCALE_SHIFT);
3180 }
Michael Buesch95b66ba2008-01-18 01:09:25 +0100[diff] [blame]3181 b43_phy_write(dev, B43_NPHY_AFESEQ_TX2RX_PUD_20M, 0x20);
3182 b43_phy_write(dev, B43_NPHY_AFESEQ_TX2RX_PUD_40M, 0x20);
3183
Rafał Miłecki0988a7a2010-01-15 13:27:29 +0100[diff] [blame]3184 if (bus->sprom.boardflags2_lo & 0x100 ||
3185 (bus->boardinfo.vendor == PCI_VENDOR_ID_APPLE &&
3186 bus->boardinfo.type == 0x8B))
3187 b43_phy_write(dev, B43_NPHY_TXREALFD, 0xA0);
3188 else
3189 b43_phy_write(dev, B43_NPHY_TXREALFD, 0xB8);
3190 b43_phy_write(dev, B43_NPHY_MIMO_CRSTXEXT, 0xC8);
3191 b43_phy_write(dev, B43_NPHY_PLOAD_CSENSE_EXTLEN, 0x50);
3192 b43_phy_write(dev, B43_NPHY_TXRIFS_FRDEL, 0x30);
Michael Buesch95b66ba2008-01-18 01:09:25 +0100[diff] [blame]3193
Rafał Miłeckiad9716e2010-01-17 13:03:40 +0100[diff] [blame]3194 b43_nphy_update_mimo_config(dev, nphy->preamble_override);
Rafał Miłecki4f4ab6c2010-01-17 13:03:55 +0100[diff] [blame]3195 b43_nphy_update_txrx_chain(dev);
Michael Buesch95b66ba2008-01-18 01:09:25 +0100[diff] [blame]3196
3197 if (phy->rev < 2) {
3198 b43_phy_write(dev, B43_NPHY_DUP40_GFBL, 0xAA8);
3199 b43_phy_write(dev, B43_NPHY_DUP40_BL, 0x9A4);
3200 }
Michael Buesch95b66ba2008-01-18 01:09:25 +0100[diff] [blame]3201
Rafał Miłecki0988a7a2010-01-15 13:27:29 +0100[diff] [blame]3202 tmp2 = b43_current_band(dev->wl);
3203 if ((nphy->ipa2g_on && tmp2 == IEEE80211_BAND_2GHZ) ||
3204 (nphy->ipa5g_on && tmp2 == IEEE80211_BAND_5GHZ)) {
3205 b43_phy_set(dev, B43_NPHY_PAPD_EN0, 0x1);
3206 b43_phy_maskset(dev, B43_NPHY_EPS_TABLE_ADJ0, 0x007F,
3207 nphy->papd_epsilon_offset[0] << 7);
3208 b43_phy_set(dev, B43_NPHY_PAPD_EN1, 0x1);
3209 b43_phy_maskset(dev, B43_NPHY_EPS_TABLE_ADJ1, 0x007F,
3210 nphy->papd_epsilon_offset[1] << 7);
Rafał Miłecki45ca6972010-01-22 01:53:15 +0100[diff] [blame]3211 b43_nphy_int_pa_set_tx_dig_filters(dev);
Rafał Miłecki0988a7a2010-01-15 13:27:29 +0100[diff] [blame]3212 } else if (phy->rev >= 5) {
Rafał Miłecki45ca6972010-01-22 01:53:15 +0100[diff] [blame]3213 b43_nphy_ext_pa_set_tx_dig_filters(dev);
Rafał Miłecki0988a7a2010-01-15 13:27:29 +0100[diff] [blame]3214 }
3215
3216 b43_nphy_workarounds(dev);
3217
3218 /* Reset CCA, in init code it differs a little from standard way */
Rafał Miłecki730dd702010-01-15 16:38:07 +0100[diff] [blame]3219 b43_nphy_bmac_clock_fgc(dev, 1);
Rafał Miłecki0988a7a2010-01-15 13:27:29 +0100[diff] [blame]3220 tmp = b43_phy_read(dev, B43_NPHY_BBCFG);
3221 b43_phy_write(dev, B43_NPHY_BBCFG, tmp | B43_NPHY_BBCFG_RSTCCA);
3222 b43_phy_write(dev, B43_NPHY_BBCFG, tmp & ~B43_NPHY_BBCFG_RSTCCA);
Rafał Miłecki730dd702010-01-15 16:38:07 +0100[diff] [blame]3223 b43_nphy_bmac_clock_fgc(dev, 0);
Rafał Miłecki0988a7a2010-01-15 13:27:29 +0100[diff] [blame]3224
Gábor Stefanikd2730b22010-08-16 22:39:16 +0200[diff] [blame]3225 b43_nphy_mac_phy_clock_set(dev, true);
Rafał Miłecki0988a7a2010-01-15 13:27:29 +0100[diff] [blame]3226
Rafał Miłeckie50cbcf2010-01-15 15:02:38 +0100[diff] [blame]3227 b43_nphy_pa_override(dev, false);
Michael Buesch95b66ba2008-01-18 01:09:25 +0100[diff] [blame]3228 b43_nphy_force_rf_sequence(dev, B43_RFSEQ_RX2TX);
3229 b43_nphy_force_rf_sequence(dev, B43_RFSEQ_RESET2RX);
Rafał Miłeckie50cbcf2010-01-15 15:02:38 +0100[diff] [blame]3230 b43_nphy_pa_override(dev, true);
Michael Buesch95b66ba2008-01-18 01:09:25 +0100[diff] [blame]3231
Rafał Miłeckibbec3982010-01-15 14:31:39 +0100[diff] [blame]3232 b43_nphy_classifier(dev, 0, 0);
3233 b43_nphy_read_clip_detection(dev, clip);
Rafał Miłecki0988a7a2010-01-15 13:27:29 +0100[diff] [blame]3234 tx_pwr_state = nphy->txpwrctrl;
3235 /* TODO N PHY TX power control with argument 0
3236 (turning off power control) */
3237 /* TODO Fix the TX Power Settings */
3238 /* TODO N PHY TX Power Control Idle TSSI */
3239 /* TODO N PHY TX Power Control Setup */
Michael Buesch95b66ba2008-01-18 01:09:25 +0100[diff] [blame]3240
Rafał Miłecki0988a7a2010-01-15 13:27:29 +0100[diff] [blame]3241 if (phy->rev >= 3) {
3242 /* TODO */
3243 } else {
Rafał Miłecki2581b142010-01-18 00:21:21 +0100[diff] [blame]3244 b43_ntab_write_bulk(dev, B43_NTAB32(26, 192), 128,
3245 b43_ntab_tx_gain_rev0_1_2);
3246 b43_ntab_write_bulk(dev, B43_NTAB32(27, 192), 128,
3247 b43_ntab_tx_gain_rev0_1_2);
Rafał Miłecki0988a7a2010-01-15 13:27:29 +0100[diff] [blame]3248 }
3249
3250 if (nphy->phyrxchain != 3)
Gábor Stefanik4e687b22010-08-16 22:39:17 +0200[diff] [blame]3251 b43_nphy_set_rx_core_state(dev, nphy->phyrxchain);
Rafał Miłecki0988a7a2010-01-15 13:27:29 +0100[diff] [blame]3252 if (nphy->mphase_cal_phase_id > 0)
3253 ;/* TODO PHY Periodic Calibration Multi-Phase Restart */
3254
3255 do_rssi_cal = false;
3256 if (phy->rev >= 3) {
3257 if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ)
Rafał Miłecki204a6652010-10-14 19:33:34 +0200[diff] [blame]3258 do_rssi_cal = !nphy->rssical_chanspec_2G.center_freq;
Rafał Miłecki0988a7a2010-01-15 13:27:29 +0100[diff] [blame]3259 else
Rafał Miłecki204a6652010-10-14 19:33:34 +0200[diff] [blame]3260 do_rssi_cal = !nphy->rssical_chanspec_5G.center_freq;
Rafał Miłecki0988a7a2010-01-15 13:27:29 +0100[diff] [blame]3261
3262 if (do_rssi_cal)
Rafał Miłecki4cb99772010-01-15 13:40:58 +0100[diff] [blame]3263 b43_nphy_rssi_cal(dev);
Rafał Miłecki0988a7a2010-01-15 13:27:29 +0100[diff] [blame]3264 else
Rafał Miłecki42e15472010-01-15 15:06:47 +0100[diff] [blame]3265 b43_nphy_restore_rssi_cal(dev);
Rafał Miłecki0988a7a2010-01-15 13:27:29 +0100[diff] [blame]3266 } else {
Rafał Miłecki4cb99772010-01-15 13:40:58 +0100[diff] [blame]3267 b43_nphy_rssi_cal(dev);
Rafał Miłecki0988a7a2010-01-15 13:27:29 +0100[diff] [blame]3268 }
3269
3270 if (!((nphy->measure_hold & 0x6) != 0)) {
3271 if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ)
Rafał Miłecki204a6652010-10-14 19:33:34 +0200[diff] [blame]3272 do_cal = !nphy->iqcal_chanspec_2G.center_freq;
Rafał Miłecki0988a7a2010-01-15 13:27:29 +0100[diff] [blame]3273 else
Rafał Miłecki204a6652010-10-14 19:33:34 +0200[diff] [blame]3274 do_cal = !nphy->iqcal_chanspec_5G.center_freq;
Rafał Miłecki0988a7a2010-01-15 13:27:29 +0100[diff] [blame]3275
3276 if (nphy->mute)
3277 do_cal = false;
3278
3279 if (do_cal) {
Rafał Miłeckib0022e12010-01-15 15:40:50 +0100[diff] [blame]3280 target = b43_nphy_get_tx_gains(dev);
Rafał Miłecki0988a7a2010-01-15 13:27:29 +0100[diff] [blame]3281
3282 if (nphy->antsel_type == 2)
Rafał Miłecki8987a9e2010-02-27 13:03:33 +0100[diff] [blame]3283 b43_nphy_superswitch_init(dev, true);
Rafał Miłecki0988a7a2010-01-15 13:27:29 +0100[diff] [blame]3284 if (nphy->perical != 2) {
Rafał Miłecki90b97382010-01-15 14:48:21 +0100[diff] [blame]3285 b43_nphy_rssi_cal(dev);
Rafał Miłecki0988a7a2010-01-15 13:27:29 +0100[diff] [blame]3286 if (phy->rev >= 3) {
3287 nphy->cal_orig_pwr_idx[0] =
3288 nphy->txpwrindex[0].index_internal;
3289 nphy->cal_orig_pwr_idx[1] =
3290 nphy->txpwrindex[1].index_internal;
3291 /* TODO N PHY Pre Calibrate TX Gain */
Rafał Miłeckib0022e12010-01-15 15:40:50 +0100[diff] [blame]3292 target = b43_nphy_get_tx_gains(dev);
Rafał Miłecki0988a7a2010-01-15 13:27:29 +0100[diff] [blame]3293 }
3294 }
3295 }
3296 }
3297
Rafał Miłecki0988a7a2010-01-15 13:27:29 +0100[diff] [blame]3298 if (!b43_nphy_cal_tx_iq_lo(dev, target, true, false)) {
3299 if (b43_nphy_cal_rx_iq(dev, target, 2, 0) == 0)
Rafał Miłeckibbc6dc12010-02-04 12:23:11 +0100[diff] [blame]3300 b43_nphy_save_cal(dev);
Rafał Miłecki0988a7a2010-01-15 13:27:29 +0100[diff] [blame]3301 else if (nphy->mphase_cal_phase_id == 0)
Rafał Miłecki15931e32010-01-15 16:20:56 +0100[diff] [blame]3302 ;/* N PHY Periodic Calibration with argument 3 */
Rafał Miłecki0988a7a2010-01-15 13:27:29 +0100[diff] [blame]3303 } else {
3304 b43_nphy_restore_cal(dev);
3305 }
Rafał Miłecki0988a7a2010-01-15 13:27:29 +0100[diff] [blame]3306
Rafał Miłecki6dcd9d92010-01-15 16:24:57 +0100[diff] [blame]3307 b43_nphy_tx_pwr_ctrl_coef_setup(dev);
Rafał Miłecki0988a7a2010-01-15 13:27:29 +0100[diff] [blame]3308 /* TODO N PHY TX Power Control Enable with argument tx_pwr_state */
3309 b43_phy_write(dev, B43_NPHY_TXMACIF_HOLDOFF, 0x0015);
3310 b43_phy_write(dev, B43_NPHY_TXMACDELAY, 0x0320);
3311 if (phy->rev >= 3 && phy->rev <= 6)
3312 b43_phy_write(dev, B43_NPHY_PLOAD_CSENSE_EXTLEN, 0x0014);
Rafał Miłeckife3e46e2010-01-15 15:51:55 +0100[diff] [blame]3313 b43_nphy_tx_lp_fbw(dev);
Rafał Miłecki9442e5b2010-02-04 12:23:12 +0100[diff] [blame]3314 if (phy->rev >= 3)
3315 b43_nphy_spur_workaround(dev);
Michael Buesch95b66ba2008-01-18 01:09:25 +0100[diff] [blame]3316
3317 b43err(dev->wl, "IEEE 802.11n devices are not supported, yet.\n");
Michael Buesch53a6e232008-01-13 21:23:44 +0100[diff] [blame]3318 return 0;
Michael Buesch424047e2008-01-09 16:13:56 +0100[diff] [blame]3319}
Michael Bueschef1a6282008-08-27 18:53:02 +0200[diff] [blame]3320
Rafał Miłecki1b69ec72010-02-27 13:03:40 +0100[diff] [blame]3321/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/ChanspecSetup */
Rafał Miłeckia656b6a2010-10-11 03:11:01 +0200[diff] [blame]3322static void b43_nphy_channel_setup(struct b43_wldev *dev,
Rafał Miłeckib15b3032010-03-29 00:53:13 +0200[diff] [blame]3323 const struct b43_phy_n_sfo_cfg *e,
Rafał Miłeckia656b6a2010-10-11 03:11:01 +0200[diff] [blame]3324 struct ieee80211_channel *new_channel)
Rafał Miłecki1b69ec72010-02-27 13:03:40 +0100[diff] [blame]3325{
3326 struct b43_phy *phy = &dev->phy;
3327 struct b43_phy_n *nphy = dev->phy.n;
3328
Rafał Miłecki087de742010-10-11 03:11:03 +0200[diff] [blame]3329 u16 old_band_5ghz;
Rafał Miłecki1b69ec72010-02-27 13:03:40 +0100[diff] [blame]3330 u32 tmp32;
3331
Rafał Miłecki087de742010-10-11 03:11:03 +0200[diff] [blame]3332 old_band_5ghz =
3333 b43_phy_read(dev, B43_NPHY_BANDCTL) & B43_NPHY_BANDCTL_5GHZ;
3334 if (new_channel->band == IEEE80211_BAND_5GHZ && !old_band_5ghz) {
Rafał Miłecki1b69ec72010-02-27 13:03:40 +0100[diff] [blame]3335 tmp32 = b43_read32(dev, B43_MMIO_PSM_PHY_HDR);
3336 b43_write32(dev, B43_MMIO_PSM_PHY_HDR, tmp32 | 4);
3337 b43_phy_set(dev, B43_PHY_B_BBCFG, 0xC000);
3338 b43_write32(dev, B43_MMIO_PSM_PHY_HDR, tmp32);
3339 b43_phy_set(dev, B43_NPHY_BANDCTL, B43_NPHY_BANDCTL_5GHZ);
Rafał Miłecki087de742010-10-11 03:11:03 +0200[diff] [blame]3340 } else if (new_channel->band == IEEE80211_BAND_2GHZ && old_band_5ghz) {
Rafał Miłecki1b69ec72010-02-27 13:03:40 +0100[diff] [blame]3341 b43_phy_mask(dev, B43_NPHY_BANDCTL, ~B43_NPHY_BANDCTL_5GHZ);
3342 tmp32 = b43_read32(dev, B43_MMIO_PSM_PHY_HDR);
3343 b43_write32(dev, B43_MMIO_PSM_PHY_HDR, tmp32 | 4);
Larry Fingeracd82aa2010-07-21 11:48:05 -0500[diff] [blame]3344 b43_phy_mask(dev, B43_PHY_B_BBCFG, 0x3FFF);
Rafał Miłecki1b69ec72010-02-27 13:03:40 +0100[diff] [blame]3345 b43_write32(dev, B43_MMIO_PSM_PHY_HDR, tmp32);
3346 }
3347
3348 b43_chantab_phy_upload(dev, e);
3349
Rafał Miłeckia656b6a2010-10-11 03:11:01 +0200[diff] [blame]3350 if (new_channel->hw_value == 14) {
Rafał Miłecki1b69ec72010-02-27 13:03:40 +0100[diff] [blame]3351 b43_nphy_classifier(dev, 2, 0);
3352 b43_phy_set(dev, B43_PHY_B_TEST, 0x0800);
3353 } else {
3354 b43_nphy_classifier(dev, 2, 2);
Rafał Miłeckia656b6a2010-10-11 03:11:01 +0200[diff] [blame]3355 if (new_channel->band == IEEE80211_BAND_2GHZ)
Rafał Miłecki1b69ec72010-02-27 13:03:40 +0100[diff] [blame]3356 b43_phy_mask(dev, B43_PHY_B_TEST, ~0x840);
3357 }
3358
3359 if (nphy->txpwrctrl)
3360 b43_nphy_tx_power_fix(dev);
3361
3362 if (dev->phy.rev < 3)
3363 b43_nphy_adjust_lna_gain_table(dev);
3364
3365 b43_nphy_tx_lp_fbw(dev);
3366
3367 if (dev->phy.rev >= 3 && 0) {
3368 /* TODO */
3369 }
3370
3371 b43_phy_write(dev, B43_NPHY_NDATAT_DUP40, 0x3830);
3372
3373 if (phy->rev >= 3)
3374 b43_nphy_spur_workaround(dev);
3375}
3376
Rafał Miłeckieff66c52010-02-27 13:03:41 +0100[diff] [blame]3377/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/SetChanspec */
Rafał Miłeckia656b6a2010-10-11 03:11:01 +0200[diff] [blame]3378static int b43_nphy_set_channel(struct b43_wldev *dev,
3379 struct ieee80211_channel *channel,
3380 enum nl80211_channel_type channel_type)
Rafał Miłeckieff66c52010-02-27 13:03:41 +0100[diff] [blame]3381{
Rafał Miłeckia656b6a2010-10-11 03:11:01 +0200[diff] [blame]3382 struct b43_phy *phy = &dev->phy;
Rafał Miłeckieff66c52010-02-27 13:03:41 +0100[diff] [blame]3383 struct b43_phy_n *nphy = dev->phy.n;
3384
Rafał Miłeckif19ebe72010-03-29 00:53:15 +0200[diff] [blame]3385 const struct b43_nphy_channeltab_entry_rev2 *tabent_r2;
3386 const struct b43_nphy_channeltab_entry_rev3 *tabent_r3;
Rafał Miłeckieff66c52010-02-27 13:03:41 +0100[diff] [blame]3387
3388 u8 tmp;
Rafał Miłeckieff66c52010-02-27 13:03:41 +0100[diff] [blame]3389
3390 if (dev->phy.rev >= 3) {
Rafał Miłeckif2a6d6a2010-10-11 03:19:22 +0200[diff] [blame]3391 tabent_r3 = b43_nphy_get_chantabent_rev3(dev,
3392 channel->center_freq);
Rafał Miłeckif19ebe72010-03-29 00:53:15 +0200[diff] [blame]3393 tabent_r3 = NULL;
3394 if (!tabent_r3)
3395 return -ESRCH;
Rafał Miłeckiffd2d9b2010-03-29 00:53:14 +0200[diff] [blame]3396 } else {
Rafał Miłeckia656b6a2010-10-11 03:11:01 +0200[diff] [blame]3397 tabent_r2 = b43_nphy_get_chantabent_rev2(dev,
3398 channel->hw_value);
Rafał Miłeckif19ebe72010-03-29 00:53:15 +0200[diff] [blame]3399 if (!tabent_r2)
Rafał Miłeckiffd2d9b2010-03-29 00:53:14 +0200[diff] [blame]3400 return -ESRCH;
Rafał Miłeckieff66c52010-02-27 13:03:41 +0100[diff] [blame]3401 }
3402
Rafał Miłecki204a6652010-10-14 19:33:34 +0200[diff] [blame]3403 /* Channel is set later in common code, but we need to set it on our
3404 own to let this function's subcalls work properly. */
3405 phy->channel = channel->hw_value;
3406 phy->channel_freq = channel->center_freq;
Rafał Miłeckieff66c52010-02-27 13:03:41 +0100[diff] [blame]3407
Rafał Miłeckie5c407f2010-10-11 03:11:02 +0200[diff] [blame]3408 if (b43_channel_type_is_40mhz(phy->channel_type) !=
3409 b43_channel_type_is_40mhz(channel_type))
3410 ; /* TODO: BMAC BW Set (channel_type) */
Rafał Miłeckieff66c52010-02-27 13:03:41 +0100[diff] [blame]3411
Rafał Miłeckia656b6a2010-10-11 03:11:01 +0200[diff] [blame]3412 if (channel_type == NL80211_CHAN_HT40PLUS)
3413 b43_phy_set(dev, B43_NPHY_RXCTL,
3414 B43_NPHY_RXCTL_BSELU20);
3415 else if (channel_type == NL80211_CHAN_HT40MINUS)
3416 b43_phy_mask(dev, B43_NPHY_RXCTL,
3417 ~B43_NPHY_RXCTL_BSELU20);
Rafał Miłeckieff66c52010-02-27 13:03:41 +0100[diff] [blame]3418
3419 if (dev->phy.rev >= 3) {
Rafał Miłeckia656b6a2010-10-11 03:11:01 +0200[diff] [blame]3420 tmp = (channel->band == IEEE80211_BAND_5GHZ) ? 4 : 0;
Rafał Miłeckieff66c52010-02-27 13:03:41 +0100[diff] [blame]3421 b43_radio_maskset(dev, 0x08, 0xFFFB, tmp);
Rafał Miłeckif19ebe72010-03-29 00:53:15 +0200[diff] [blame]3422 /* TODO: PHY Radio2056 Setup (dev, tabent_r3); */
Rafał Miłeckia656b6a2010-10-11 03:11:01 +0200[diff] [blame]3423 b43_nphy_channel_setup(dev, &(tabent_r3->phy_regs), channel);
Rafał Miłeckieff66c52010-02-27 13:03:41 +0100[diff] [blame]3424 } else {
Rafał Miłeckia656b6a2010-10-11 03:11:01 +0200[diff] [blame]3425 tmp = (channel->band == IEEE80211_BAND_5GHZ) ? 0x0020 : 0x0050;
Rafał Miłeckieff66c52010-02-27 13:03:41 +0100[diff] [blame]3426 b43_radio_maskset(dev, B2055_MASTER1, 0xFF8F, tmp);
Rafał Miłeckif19ebe72010-03-29 00:53:15 +0200[diff] [blame]3427 b43_radio_2055_setup(dev, tabent_r2);
Rafał Miłeckia656b6a2010-10-11 03:11:01 +0200[diff] [blame]3428 b43_nphy_channel_setup(dev, &(tabent_r2->phy_regs), channel);
Rafał Miłeckieff66c52010-02-27 13:03:41 +0100[diff] [blame]3429 }
3430
3431 return 0;
3432}
3433
Michael Bueschef1a6282008-08-27 18:53:02 +0200[diff] [blame]3434static int b43_nphy_op_allocate(struct b43_wldev *dev)
3435{
3436 struct b43_phy_n *nphy;
3437
3438 nphy = kzalloc(sizeof(*nphy), GFP_KERNEL);
3439 if (!nphy)
3440 return -ENOMEM;
3441 dev->phy.n = nphy;
3442
Michael Bueschef1a6282008-08-27 18:53:02 +0200[diff] [blame]3443 return 0;
3444}
3445
Michael Bueschfb111372008-09-02 13:00:34 +0200[diff] [blame]3446static void b43_nphy_op_prepare_structs(struct b43_wldev *dev)
3447{
3448 struct b43_phy *phy = &dev->phy;
3449 struct b43_phy_n *nphy = phy->n;
3450
3451 memset(nphy, 0, sizeof(*nphy));
3452
3453 //TODO init struct b43_phy_n
3454}
3455
3456static void b43_nphy_op_free(struct b43_wldev *dev)
3457{
3458 struct b43_phy *phy = &dev->phy;
3459 struct b43_phy_n *nphy = phy->n;
3460
3461 kfree(nphy);
3462 phy->n = NULL;
3463}
3464
Michael Bueschef1a6282008-08-27 18:53:02 +0200[diff] [blame]3465static int b43_nphy_op_init(struct b43_wldev *dev)
3466{
Michael Bueschfb111372008-09-02 13:00:34 +0200[diff] [blame]3467 return b43_phy_initn(dev);
Michael Bueschef1a6282008-08-27 18:53:02 +0200[diff] [blame]3468}
3469
3470static inline void check_phyreg(struct b43_wldev *dev, u16 offset)
3471{
3472#if B43_DEBUG
3473 if ((offset & B43_PHYROUTE) == B43_PHYROUTE_OFDM_GPHY) {
3474 /* OFDM registers are onnly available on A/G-PHYs */
3475 b43err(dev->wl, "Invalid OFDM PHY access at "
3476 "0x%04X on N-PHY\n", offset);
3477 dump_stack();
3478 }
3479 if ((offset & B43_PHYROUTE) == B43_PHYROUTE_EXT_GPHY) {
3480 /* Ext-G registers are only available on G-PHYs */
3481 b43err(dev->wl, "Invalid EXT-G PHY access at "
3482 "0x%04X on N-PHY\n", offset);
3483 dump_stack();
3484 }
3485#endif /* B43_DEBUG */
3486}
3487
3488static u16 b43_nphy_op_read(struct b43_wldev *dev, u16 reg)
3489{
3490 check_phyreg(dev, reg);
3491 b43_write16(dev, B43_MMIO_PHY_CONTROL, reg);
3492 return b43_read16(dev, B43_MMIO_PHY_DATA);
3493}
3494
3495static void b43_nphy_op_write(struct b43_wldev *dev, u16 reg, u16 value)
3496{
3497 check_phyreg(dev, reg);
3498 b43_write16(dev, B43_MMIO_PHY_CONTROL, reg);
3499 b43_write16(dev, B43_MMIO_PHY_DATA, value);
3500}
3501
3502static u16 b43_nphy_op_radio_read(struct b43_wldev *dev, u16 reg)
3503{
3504 /* Register 1 is a 32-bit register. */
3505 B43_WARN_ON(reg == 1);
3506 /* N-PHY needs 0x100 for read access */
3507 reg |= 0x100;
3508
3509 b43_write16(dev, B43_MMIO_RADIO_CONTROL, reg);
3510 return b43_read16(dev, B43_MMIO_RADIO_DATA_LOW);
3511}
3512
3513static void b43_nphy_op_radio_write(struct b43_wldev *dev, u16 reg, u16 value)
3514{
3515 /* Register 1 is a 32-bit register. */
3516 B43_WARN_ON(reg == 1);
3517
3518 b43_write16(dev, B43_MMIO_RADIO_CONTROL, reg);
3519 b43_write16(dev, B43_MMIO_RADIO_DATA_LOW, value);
3520}
3521
Rafał Miłeckic2b7aef2010-02-27 13:03:34 +0100[diff] [blame]3522/* http://bcm-v4.sipsolutions.net/802.11/Radio/Switch%20Radio */
Michael Bueschef1a6282008-08-27 18:53:02 +0200[diff] [blame]3523static void b43_nphy_op_software_rfkill(struct b43_wldev *dev,
Johannes Berg19d337d2009-06-02 13:01:37 +0200[diff] [blame]3524 bool blocked)
Rafał Miłeckic2b7aef2010-02-27 13:03:34 +0100[diff] [blame]3525{
Rafał Miłeckid817f4e2010-03-29 00:53:12 +0200[diff] [blame]3526 struct b43_phy_n *nphy = dev->phy.n;
3527
Rafał Miłeckic2b7aef2010-02-27 13:03:34 +0100[diff] [blame]3528 if (b43_read32(dev, B43_MMIO_MACCTL) & B43_MACCTL_ENABLED)
3529 b43err(dev->wl, "MAC not suspended\n");
3530
3531 if (blocked) {
3532 b43_phy_mask(dev, B43_NPHY_RFCTL_CMD,
3533 ~B43_NPHY_RFCTL_CMD_CHIP0PU);
3534 if (dev->phy.rev >= 3) {
3535 b43_radio_mask(dev, 0x09, ~0x2);
3536
3537 b43_radio_write(dev, 0x204D, 0);
3538 b43_radio_write(dev, 0x2053, 0);
3539 b43_radio_write(dev, 0x2058, 0);
3540 b43_radio_write(dev, 0x205E, 0);
3541 b43_radio_mask(dev, 0x2062, ~0xF0);
3542 b43_radio_write(dev, 0x2064, 0);
3543
3544 b43_radio_write(dev, 0x304D, 0);
3545 b43_radio_write(dev, 0x3053, 0);
3546 b43_radio_write(dev, 0x3058, 0);
3547 b43_radio_write(dev, 0x305E, 0);
3548 b43_radio_mask(dev, 0x3062, ~0xF0);
3549 b43_radio_write(dev, 0x3064, 0);
3550 }
3551 } else {
3552 if (dev->phy.rev >= 3) {
Rafał Miłeckid817f4e2010-03-29 00:53:12 +0200[diff] [blame]3553 b43_radio_init2056(dev);
Rafał Miłecki78159782010-10-06 07:50:08 +0200[diff] [blame]3554 b43_switch_channel(dev, dev->phy.channel);
Rafał Miłeckic2b7aef2010-02-27 13:03:34 +0100[diff] [blame]3555 } else {
3556 b43_radio_init2055(dev);
3557 }
3558 }
Michael Bueschef1a6282008-08-27 18:53:02 +0200[diff] [blame]3559}
3560
Michael Bueschcb24f572008-09-03 12:12:20 +0200[diff] [blame]3561static void b43_nphy_op_switch_analog(struct b43_wldev *dev, bool on)
3562{
3563 b43_phy_write(dev, B43_NPHY_AFECTL_OVER,
3564 on ? 0 : 0x7FFF);
3565}
3566
Michael Bueschef1a6282008-08-27 18:53:02 +0200[diff] [blame]3567static int b43_nphy_op_switch_channel(struct b43_wldev *dev,
3568 unsigned int new_channel)
3569{
Rafał Miłeckia656b6a2010-10-11 03:11:01 +0200[diff] [blame]3570 struct ieee80211_channel *channel = dev->wl->hw->conf.channel;
3571 enum nl80211_channel_type channel_type = dev->wl->hw->conf.channel_type;
Rafał Miłecki5e7ee092010-10-06 07:50:06 +0200[diff] [blame]3572
Michael Bueschef1a6282008-08-27 18:53:02 +0200[diff] [blame]3573 if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ) {
3574 if ((new_channel < 1) || (new_channel > 14))
3575 return -EINVAL;
3576 } else {
3577 if (new_channel > 200)
3578 return -EINVAL;
3579 }
3580
Rafał Miłeckia656b6a2010-10-11 03:11:01 +0200[diff] [blame]3581 return b43_nphy_set_channel(dev, channel, channel_type);
Michael Bueschef1a6282008-08-27 18:53:02 +0200[diff] [blame]3582}
3583
3584static unsigned int b43_nphy_op_get_default_chan(struct b43_wldev *dev)
3585{
3586 if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ)
3587 return 1;
3588 return 36;
3589}
3590
Michael Bueschef1a6282008-08-27 18:53:02 +0200[diff] [blame]3591const struct b43_phy_operations b43_phyops_n = {
3592 .allocate = b43_nphy_op_allocate,
Michael Bueschfb111372008-09-02 13:00:34 +0200[diff] [blame]3593 .free = b43_nphy_op_free,
3594 .prepare_structs = b43_nphy_op_prepare_structs,
Michael Bueschef1a6282008-08-27 18:53:02 +0200[diff] [blame]3595 .init = b43_nphy_op_init,
Michael Bueschef1a6282008-08-27 18:53:02 +0200[diff] [blame]3596 .phy_read = b43_nphy_op_read,
3597 .phy_write = b43_nphy_op_write,
3598 .radio_read = b43_nphy_op_radio_read,
3599 .radio_write = b43_nphy_op_radio_write,
3600 .software_rfkill = b43_nphy_op_software_rfkill,
Michael Bueschcb24f572008-09-03 12:12:20 +0200[diff] [blame]3601 .switch_analog = b43_nphy_op_switch_analog,
Michael Bueschef1a6282008-08-27 18:53:02 +0200[diff] [blame]3602 .switch_channel = b43_nphy_op_switch_channel,
3603 .get_default_chan = b43_nphy_op_get_default_chan,
Michael Buesch18c8ade2008-08-28 19:33:40 +0200[diff] [blame]3604 .recalc_txpower = b43_nphy_op_recalc_txpower,
3605 .adjust_txpower = b43_nphy_op_adjust_txpower,
Michael Bueschef1a6282008-08-27 18:53:02 +0200[diff] [blame]3606};