Peter Korsgaard | 238b872 | 2006-12-06 20:35:17 -0800 | [diff] [blame] | 1 | /* |
| 2 | * uartlite.c: Serial driver for Xilinx uartlite serial controller |
| 3 | * |
Grant Likely | 852e1ea | 2007-10-02 12:16:04 +1000 | [diff] [blame] | 4 | * Copyright (C) 2006 Peter Korsgaard <jacmet@sunsite.dk> |
| 5 | * Copyright (C) 2007 Secret Lab Technologies Ltd. |
Peter Korsgaard | 238b872 | 2006-12-06 20:35:17 -0800 | [diff] [blame] | 6 | * |
| 7 | * This file is licensed under the terms of the GNU General Public License |
| 8 | * version 2. This program is licensed "as is" without any warranty of any |
| 9 | * kind, whether express or implied. |
| 10 | */ |
| 11 | |
| 12 | #include <linux/platform_device.h> |
| 13 | #include <linux/module.h> |
| 14 | #include <linux/console.h> |
| 15 | #include <linux/serial.h> |
| 16 | #include <linux/serial_core.h> |
| 17 | #include <linux/tty.h> |
Jiri Slaby | ee160a3 | 2011-09-01 16:20:57 +0200 | [diff] [blame] | 18 | #include <linux/tty_flip.h> |
Peter Korsgaard | 238b872 | 2006-12-06 20:35:17 -0800 | [diff] [blame] | 19 | #include <linux/delay.h> |
| 20 | #include <linux/interrupt.h> |
Stephen Neuendorffer | 0e349b0 | 2008-01-09 06:35:05 +1100 | [diff] [blame] | 21 | #include <linux/init.h> |
Michal Simek | 3240b48d | 2013-02-11 19:04:33 +0100 | [diff] [blame] | 22 | #include <linux/io.h> |
Stephen Neuendorffer | 0e349b0 | 2008-01-09 06:35:05 +1100 | [diff] [blame] | 23 | #include <linux/of.h> |
Grant Likely | 22ae782 | 2010-07-29 11:49:01 -0600 | [diff] [blame] | 24 | #include <linux/of_address.h> |
Grant Likely | 852e1ea | 2007-10-02 12:16:04 +1000 | [diff] [blame] | 25 | #include <linux/of_device.h> |
| 26 | #include <linux/of_platform.h> |
Stephen Neuendorffer | 0e349b0 | 2008-01-09 06:35:05 +1100 | [diff] [blame] | 27 | |
Grant Likely | 0077582 | 2007-10-02 12:15:49 +1000 | [diff] [blame] | 28 | #define ULITE_NAME "ttyUL" |
Peter Korsgaard | 238b872 | 2006-12-06 20:35:17 -0800 | [diff] [blame] | 29 | #define ULITE_MAJOR 204 |
| 30 | #define ULITE_MINOR 187 |
| 31 | #define ULITE_NR_UARTS 4 |
| 32 | |
Grant Likely | 435706b | 2007-10-02 12:15:59 +1000 | [diff] [blame] | 33 | /* --------------------------------------------------------------------- |
| 34 | * Register definitions |
| 35 | * |
| 36 | * For register details see datasheet: |
Michal Simek | 6d53c3b | 2013-02-11 19:04:34 +0100 | [diff] [blame^] | 37 | * http://www.xilinx.com/support/documentation/ip_documentation/opb_uartlite.pdf |
Grant Likely | 435706b | 2007-10-02 12:15:59 +1000 | [diff] [blame] | 38 | */ |
| 39 | |
Peter Korsgaard | 238b872 | 2006-12-06 20:35:17 -0800 | [diff] [blame] | 40 | #define ULITE_RX 0x00 |
| 41 | #define ULITE_TX 0x04 |
| 42 | #define ULITE_STATUS 0x08 |
| 43 | #define ULITE_CONTROL 0x0c |
| 44 | |
| 45 | #define ULITE_REGION 16 |
| 46 | |
| 47 | #define ULITE_STATUS_RXVALID 0x01 |
| 48 | #define ULITE_STATUS_RXFULL 0x02 |
| 49 | #define ULITE_STATUS_TXEMPTY 0x04 |
| 50 | #define ULITE_STATUS_TXFULL 0x08 |
| 51 | #define ULITE_STATUS_IE 0x10 |
| 52 | #define ULITE_STATUS_OVERRUN 0x20 |
| 53 | #define ULITE_STATUS_FRAME 0x40 |
| 54 | #define ULITE_STATUS_PARITY 0x80 |
| 55 | |
| 56 | #define ULITE_CONTROL_RST_TX 0x01 |
| 57 | #define ULITE_CONTROL_RST_RX 0x02 |
| 58 | #define ULITE_CONTROL_IE 0x10 |
| 59 | |
Michal Simek | 6d53c3b | 2013-02-11 19:04:34 +0100 | [diff] [blame^] | 60 | struct uartlite_reg_ops { |
| 61 | u32 (*in)(void __iomem *addr); |
| 62 | void (*out)(u32 val, void __iomem *addr); |
| 63 | }; |
| 64 | |
| 65 | static u32 uartlite_inbe32(void __iomem *addr) |
| 66 | { |
| 67 | return ioread32be(addr); |
| 68 | } |
| 69 | |
| 70 | static void uartlite_outbe32(u32 val, void __iomem *addr) |
| 71 | { |
| 72 | iowrite32be(val, addr); |
| 73 | } |
| 74 | |
| 75 | static struct uartlite_reg_ops uartlite_be = { |
| 76 | .in = uartlite_inbe32, |
| 77 | .out = uartlite_outbe32, |
| 78 | }; |
| 79 | |
| 80 | static u32 uartlite_inle32(void __iomem *addr) |
| 81 | { |
| 82 | return ioread32(addr); |
| 83 | } |
| 84 | |
| 85 | static void uartlite_outle32(u32 val, void __iomem *addr) |
| 86 | { |
| 87 | iowrite32(val, addr); |
| 88 | } |
| 89 | |
| 90 | static struct uartlite_reg_ops uartlite_le = { |
| 91 | .in = uartlite_inle32, |
| 92 | .out = uartlite_outle32, |
| 93 | }; |
| 94 | |
| 95 | static inline u32 uart_in32(u32 offset, struct uart_port *port) |
| 96 | { |
| 97 | struct uartlite_reg_ops *reg_ops = port->private_data; |
| 98 | |
| 99 | return reg_ops->in(port->membase + offset); |
| 100 | } |
| 101 | |
| 102 | static inline void uart_out32(u32 val, u32 offset, struct uart_port *port) |
| 103 | { |
| 104 | struct uartlite_reg_ops *reg_ops = port->private_data; |
| 105 | |
| 106 | reg_ops->out(val, port->membase + offset); |
| 107 | } |
Peter Korsgaard | 238b872 | 2006-12-06 20:35:17 -0800 | [diff] [blame] | 108 | |
Grant Likely | 483c79d | 2007-10-02 12:15:44 +1000 | [diff] [blame] | 109 | static struct uart_port ulite_ports[ULITE_NR_UARTS]; |
Peter Korsgaard | 238b872 | 2006-12-06 20:35:17 -0800 | [diff] [blame] | 110 | |
Grant Likely | 435706b | 2007-10-02 12:15:59 +1000 | [diff] [blame] | 111 | /* --------------------------------------------------------------------- |
| 112 | * Core UART driver operations |
| 113 | */ |
| 114 | |
Peter Korsgaard | 238b872 | 2006-12-06 20:35:17 -0800 | [diff] [blame] | 115 | static int ulite_receive(struct uart_port *port, int stat) |
| 116 | { |
Jiri Slaby | 92a19f9 | 2013-01-03 15:53:03 +0100 | [diff] [blame] | 117 | struct tty_port *tport = &port->state->port; |
Peter Korsgaard | 238b872 | 2006-12-06 20:35:17 -0800 | [diff] [blame] | 118 | unsigned char ch = 0; |
| 119 | char flag = TTY_NORMAL; |
| 120 | |
| 121 | if ((stat & (ULITE_STATUS_RXVALID | ULITE_STATUS_OVERRUN |
| 122 | | ULITE_STATUS_FRAME)) == 0) |
| 123 | return 0; |
| 124 | |
| 125 | /* stats */ |
| 126 | if (stat & ULITE_STATUS_RXVALID) { |
| 127 | port->icount.rx++; |
Michal Simek | 6d53c3b | 2013-02-11 19:04:34 +0100 | [diff] [blame^] | 128 | ch = uart_in32(ULITE_RX, port); |
Peter Korsgaard | 238b872 | 2006-12-06 20:35:17 -0800 | [diff] [blame] | 129 | |
| 130 | if (stat & ULITE_STATUS_PARITY) |
| 131 | port->icount.parity++; |
| 132 | } |
| 133 | |
| 134 | if (stat & ULITE_STATUS_OVERRUN) |
| 135 | port->icount.overrun++; |
| 136 | |
| 137 | if (stat & ULITE_STATUS_FRAME) |
| 138 | port->icount.frame++; |
| 139 | |
| 140 | |
| 141 | /* drop byte with parity error if IGNPAR specificed */ |
| 142 | if (stat & port->ignore_status_mask & ULITE_STATUS_PARITY) |
| 143 | stat &= ~ULITE_STATUS_RXVALID; |
| 144 | |
| 145 | stat &= port->read_status_mask; |
| 146 | |
| 147 | if (stat & ULITE_STATUS_PARITY) |
| 148 | flag = TTY_PARITY; |
| 149 | |
| 150 | |
| 151 | stat &= ~port->ignore_status_mask; |
| 152 | |
| 153 | if (stat & ULITE_STATUS_RXVALID) |
Jiri Slaby | 92a19f9 | 2013-01-03 15:53:03 +0100 | [diff] [blame] | 154 | tty_insert_flip_char(tport, ch, flag); |
Peter Korsgaard | 238b872 | 2006-12-06 20:35:17 -0800 | [diff] [blame] | 155 | |
| 156 | if (stat & ULITE_STATUS_FRAME) |
Jiri Slaby | 92a19f9 | 2013-01-03 15:53:03 +0100 | [diff] [blame] | 157 | tty_insert_flip_char(tport, 0, TTY_FRAME); |
Peter Korsgaard | 238b872 | 2006-12-06 20:35:17 -0800 | [diff] [blame] | 158 | |
| 159 | if (stat & ULITE_STATUS_OVERRUN) |
Jiri Slaby | 92a19f9 | 2013-01-03 15:53:03 +0100 | [diff] [blame] | 160 | tty_insert_flip_char(tport, 0, TTY_OVERRUN); |
Peter Korsgaard | 238b872 | 2006-12-06 20:35:17 -0800 | [diff] [blame] | 161 | |
| 162 | return 1; |
| 163 | } |
| 164 | |
| 165 | static int ulite_transmit(struct uart_port *port, int stat) |
| 166 | { |
Alan Cox | ebd2c8f | 2009-09-19 13:13:28 -0700 | [diff] [blame] | 167 | struct circ_buf *xmit = &port->state->xmit; |
Peter Korsgaard | 238b872 | 2006-12-06 20:35:17 -0800 | [diff] [blame] | 168 | |
| 169 | if (stat & ULITE_STATUS_TXFULL) |
| 170 | return 0; |
| 171 | |
| 172 | if (port->x_char) { |
Michal Simek | 6d53c3b | 2013-02-11 19:04:34 +0100 | [diff] [blame^] | 173 | uart_out32(port->x_char, ULITE_TX, port); |
Peter Korsgaard | 238b872 | 2006-12-06 20:35:17 -0800 | [diff] [blame] | 174 | port->x_char = 0; |
| 175 | port->icount.tx++; |
| 176 | return 1; |
| 177 | } |
| 178 | |
| 179 | if (uart_circ_empty(xmit) || uart_tx_stopped(port)) |
| 180 | return 0; |
| 181 | |
Michal Simek | 6d53c3b | 2013-02-11 19:04:34 +0100 | [diff] [blame^] | 182 | uart_out32(xmit->buf[xmit->tail], ULITE_TX, port); |
Peter Korsgaard | 238b872 | 2006-12-06 20:35:17 -0800 | [diff] [blame] | 183 | xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE-1); |
| 184 | port->icount.tx++; |
| 185 | |
| 186 | /* wake up */ |
| 187 | if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS) |
| 188 | uart_write_wakeup(port); |
| 189 | |
| 190 | return 1; |
| 191 | } |
| 192 | |
| 193 | static irqreturn_t ulite_isr(int irq, void *dev_id) |
| 194 | { |
Jeff Garzik | 15aafa2 | 2008-02-06 01:36:20 -0800 | [diff] [blame] | 195 | struct uart_port *port = dev_id; |
Peter Korsgaard | d2cfe96 | 2009-09-09 16:54:04 +0200 | [diff] [blame] | 196 | int busy, n = 0; |
Peter Korsgaard | 238b872 | 2006-12-06 20:35:17 -0800 | [diff] [blame] | 197 | |
| 198 | do { |
Michal Simek | 6d53c3b | 2013-02-11 19:04:34 +0100 | [diff] [blame^] | 199 | int stat = uart_in32(ULITE_STATUS, port); |
Peter Korsgaard | 238b872 | 2006-12-06 20:35:17 -0800 | [diff] [blame] | 200 | busy = ulite_receive(port, stat); |
| 201 | busy |= ulite_transmit(port, stat); |
Peter Korsgaard | d2cfe96 | 2009-09-09 16:54:04 +0200 | [diff] [blame] | 202 | n++; |
Peter Korsgaard | 238b872 | 2006-12-06 20:35:17 -0800 | [diff] [blame] | 203 | } while (busy); |
| 204 | |
Peter Korsgaard | d2cfe96 | 2009-09-09 16:54:04 +0200 | [diff] [blame] | 205 | /* work done? */ |
| 206 | if (n > 1) { |
Jiri Slaby | 2e124b4 | 2013-01-03 15:53:06 +0100 | [diff] [blame] | 207 | tty_flip_buffer_push(&port->state->port); |
Peter Korsgaard | d2cfe96 | 2009-09-09 16:54:04 +0200 | [diff] [blame] | 208 | return IRQ_HANDLED; |
| 209 | } else { |
| 210 | return IRQ_NONE; |
| 211 | } |
Peter Korsgaard | 238b872 | 2006-12-06 20:35:17 -0800 | [diff] [blame] | 212 | } |
| 213 | |
| 214 | static unsigned int ulite_tx_empty(struct uart_port *port) |
| 215 | { |
| 216 | unsigned long flags; |
| 217 | unsigned int ret; |
| 218 | |
| 219 | spin_lock_irqsave(&port->lock, flags); |
Michal Simek | 6d53c3b | 2013-02-11 19:04:34 +0100 | [diff] [blame^] | 220 | ret = uart_in32(ULITE_STATUS, port); |
Peter Korsgaard | 238b872 | 2006-12-06 20:35:17 -0800 | [diff] [blame] | 221 | spin_unlock_irqrestore(&port->lock, flags); |
| 222 | |
| 223 | return ret & ULITE_STATUS_TXEMPTY ? TIOCSER_TEMT : 0; |
| 224 | } |
| 225 | |
| 226 | static unsigned int ulite_get_mctrl(struct uart_port *port) |
| 227 | { |
| 228 | return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR; |
| 229 | } |
| 230 | |
| 231 | static void ulite_set_mctrl(struct uart_port *port, unsigned int mctrl) |
| 232 | { |
| 233 | /* N/A */ |
| 234 | } |
| 235 | |
| 236 | static void ulite_stop_tx(struct uart_port *port) |
| 237 | { |
| 238 | /* N/A */ |
| 239 | } |
| 240 | |
| 241 | static void ulite_start_tx(struct uart_port *port) |
| 242 | { |
Michal Simek | 6d53c3b | 2013-02-11 19:04:34 +0100 | [diff] [blame^] | 243 | ulite_transmit(port, uart_in32(ULITE_STATUS, port)); |
Peter Korsgaard | 238b872 | 2006-12-06 20:35:17 -0800 | [diff] [blame] | 244 | } |
| 245 | |
| 246 | static void ulite_stop_rx(struct uart_port *port) |
| 247 | { |
| 248 | /* don't forward any more data (like !CREAD) */ |
| 249 | port->ignore_status_mask = ULITE_STATUS_RXVALID | ULITE_STATUS_PARITY |
| 250 | | ULITE_STATUS_FRAME | ULITE_STATUS_OVERRUN; |
| 251 | } |
| 252 | |
| 253 | static void ulite_enable_ms(struct uart_port *port) |
| 254 | { |
| 255 | /* N/A */ |
| 256 | } |
| 257 | |
| 258 | static void ulite_break_ctl(struct uart_port *port, int ctl) |
| 259 | { |
| 260 | /* N/A */ |
| 261 | } |
| 262 | |
| 263 | static int ulite_startup(struct uart_port *port) |
| 264 | { |
| 265 | int ret; |
| 266 | |
Theodore Ts'o | fc4b186 | 2012-07-17 13:51:51 -0400 | [diff] [blame] | 267 | ret = request_irq(port->irq, ulite_isr, IRQF_SHARED, "uartlite", port); |
Peter Korsgaard | 238b872 | 2006-12-06 20:35:17 -0800 | [diff] [blame] | 268 | if (ret) |
| 269 | return ret; |
| 270 | |
Michal Simek | 6d53c3b | 2013-02-11 19:04:34 +0100 | [diff] [blame^] | 271 | uart_out32(ULITE_CONTROL_RST_RX | ULITE_CONTROL_RST_TX, |
| 272 | ULITE_CONTROL, port); |
| 273 | uart_out32(ULITE_CONTROL_IE, ULITE_CONTROL, port); |
Peter Korsgaard | 238b872 | 2006-12-06 20:35:17 -0800 | [diff] [blame] | 274 | |
| 275 | return 0; |
| 276 | } |
| 277 | |
| 278 | static void ulite_shutdown(struct uart_port *port) |
| 279 | { |
Michal Simek | 6d53c3b | 2013-02-11 19:04:34 +0100 | [diff] [blame^] | 280 | uart_out32(0, ULITE_CONTROL, port); |
| 281 | uart_in32(ULITE_CONTROL, port); /* dummy */ |
Peter Korsgaard | 238b872 | 2006-12-06 20:35:17 -0800 | [diff] [blame] | 282 | free_irq(port->irq, port); |
| 283 | } |
| 284 | |
Alan Cox | 606d099 | 2006-12-08 02:38:45 -0800 | [diff] [blame] | 285 | static void ulite_set_termios(struct uart_port *port, struct ktermios *termios, |
| 286 | struct ktermios *old) |
Peter Korsgaard | 238b872 | 2006-12-06 20:35:17 -0800 | [diff] [blame] | 287 | { |
| 288 | unsigned long flags; |
| 289 | unsigned int baud; |
| 290 | |
| 291 | spin_lock_irqsave(&port->lock, flags); |
| 292 | |
| 293 | port->read_status_mask = ULITE_STATUS_RXVALID | ULITE_STATUS_OVERRUN |
| 294 | | ULITE_STATUS_TXFULL; |
| 295 | |
| 296 | if (termios->c_iflag & INPCK) |
| 297 | port->read_status_mask |= |
| 298 | ULITE_STATUS_PARITY | ULITE_STATUS_FRAME; |
| 299 | |
| 300 | port->ignore_status_mask = 0; |
| 301 | if (termios->c_iflag & IGNPAR) |
| 302 | port->ignore_status_mask |= ULITE_STATUS_PARITY |
| 303 | | ULITE_STATUS_FRAME | ULITE_STATUS_OVERRUN; |
| 304 | |
| 305 | /* ignore all characters if CREAD is not set */ |
| 306 | if ((termios->c_cflag & CREAD) == 0) |
| 307 | port->ignore_status_mask |= |
| 308 | ULITE_STATUS_RXVALID | ULITE_STATUS_PARITY |
| 309 | | ULITE_STATUS_FRAME | ULITE_STATUS_OVERRUN; |
| 310 | |
| 311 | /* update timeout */ |
| 312 | baud = uart_get_baud_rate(port, termios, old, 0, 460800); |
| 313 | uart_update_timeout(port, termios->c_cflag, baud); |
| 314 | |
| 315 | spin_unlock_irqrestore(&port->lock, flags); |
| 316 | } |
| 317 | |
| 318 | static const char *ulite_type(struct uart_port *port) |
| 319 | { |
| 320 | return port->type == PORT_UARTLITE ? "uartlite" : NULL; |
| 321 | } |
| 322 | |
| 323 | static void ulite_release_port(struct uart_port *port) |
| 324 | { |
| 325 | release_mem_region(port->mapbase, ULITE_REGION); |
| 326 | iounmap(port->membase); |
Al Viro | b81831c6 | 2007-02-09 16:38:25 +0000 | [diff] [blame] | 327 | port->membase = NULL; |
Peter Korsgaard | 238b872 | 2006-12-06 20:35:17 -0800 | [diff] [blame] | 328 | } |
| 329 | |
| 330 | static int ulite_request_port(struct uart_port *port) |
| 331 | { |
Michal Simek | 6d53c3b | 2013-02-11 19:04:34 +0100 | [diff] [blame^] | 332 | int ret; |
| 333 | |
Grant Likely | a108096 | 2008-11-14 09:59:48 -0700 | [diff] [blame] | 334 | pr_debug("ulite console: port=%p; port->mapbase=%llx\n", |
| 335 | port, (unsigned long long) port->mapbase); |
Stephen Neuendorffer | 0e349b0 | 2008-01-09 06:35:05 +1100 | [diff] [blame] | 336 | |
Peter Korsgaard | 238b872 | 2006-12-06 20:35:17 -0800 | [diff] [blame] | 337 | if (!request_mem_region(port->mapbase, ULITE_REGION, "uartlite")) { |
| 338 | dev_err(port->dev, "Memory region busy\n"); |
| 339 | return -EBUSY; |
| 340 | } |
| 341 | |
| 342 | port->membase = ioremap(port->mapbase, ULITE_REGION); |
| 343 | if (!port->membase) { |
| 344 | dev_err(port->dev, "Unable to map registers\n"); |
| 345 | release_mem_region(port->mapbase, ULITE_REGION); |
| 346 | return -EBUSY; |
| 347 | } |
| 348 | |
Michal Simek | 6d53c3b | 2013-02-11 19:04:34 +0100 | [diff] [blame^] | 349 | port->private_data = &uartlite_be; |
| 350 | ret = uart_in32(ULITE_CONTROL, port); |
| 351 | uart_out32(ULITE_CONTROL_RST_TX, ULITE_CONTROL, port); |
| 352 | ret = uart_in32(ULITE_STATUS, port); |
| 353 | /* Endianess detection */ |
| 354 | if ((ret & ULITE_STATUS_TXEMPTY) != ULITE_STATUS_TXEMPTY) |
| 355 | port->private_data = &uartlite_le; |
| 356 | |
Peter Korsgaard | 238b872 | 2006-12-06 20:35:17 -0800 | [diff] [blame] | 357 | return 0; |
| 358 | } |
| 359 | |
| 360 | static void ulite_config_port(struct uart_port *port, int flags) |
| 361 | { |
Peter Korsgaard | e21654a | 2006-12-22 16:38:40 +0100 | [diff] [blame] | 362 | if (!ulite_request_port(port)) |
| 363 | port->type = PORT_UARTLITE; |
Peter Korsgaard | 238b872 | 2006-12-06 20:35:17 -0800 | [diff] [blame] | 364 | } |
| 365 | |
| 366 | static int ulite_verify_port(struct uart_port *port, struct serial_struct *ser) |
| 367 | { |
| 368 | /* we don't want the core code to modify any port params */ |
| 369 | return -EINVAL; |
| 370 | } |
| 371 | |
Michal Simek | 8a28af7f | 2010-08-17 10:42:05 +0200 | [diff] [blame] | 372 | #ifdef CONFIG_CONSOLE_POLL |
| 373 | static int ulite_get_poll_char(struct uart_port *port) |
| 374 | { |
Michal Simek | 6d53c3b | 2013-02-11 19:04:34 +0100 | [diff] [blame^] | 375 | if (!(uart_in32(ULITE_STATUS, port) & ULITE_STATUS_RXVALID)) |
Michal Simek | 8a28af7f | 2010-08-17 10:42:05 +0200 | [diff] [blame] | 376 | return NO_POLL_CHAR; |
| 377 | |
Michal Simek | 6d53c3b | 2013-02-11 19:04:34 +0100 | [diff] [blame^] | 378 | return uart_in32(ULITE_RX, port); |
Michal Simek | 8a28af7f | 2010-08-17 10:42:05 +0200 | [diff] [blame] | 379 | } |
| 380 | |
| 381 | static void ulite_put_poll_char(struct uart_port *port, unsigned char ch) |
| 382 | { |
Michal Simek | 6d53c3b | 2013-02-11 19:04:34 +0100 | [diff] [blame^] | 383 | while (uart_in32(ULITE_STATUS, port) & ULITE_STATUS_TXFULL) |
Michal Simek | 8a28af7f | 2010-08-17 10:42:05 +0200 | [diff] [blame] | 384 | cpu_relax(); |
| 385 | |
| 386 | /* write char to device */ |
Michal Simek | 6d53c3b | 2013-02-11 19:04:34 +0100 | [diff] [blame^] | 387 | uart_out32(ch, ULITE_TX, port); |
Michal Simek | 8a28af7f | 2010-08-17 10:42:05 +0200 | [diff] [blame] | 388 | } |
| 389 | #endif |
| 390 | |
Peter Korsgaard | 238b872 | 2006-12-06 20:35:17 -0800 | [diff] [blame] | 391 | static struct uart_ops ulite_ops = { |
| 392 | .tx_empty = ulite_tx_empty, |
| 393 | .set_mctrl = ulite_set_mctrl, |
| 394 | .get_mctrl = ulite_get_mctrl, |
| 395 | .stop_tx = ulite_stop_tx, |
| 396 | .start_tx = ulite_start_tx, |
| 397 | .stop_rx = ulite_stop_rx, |
| 398 | .enable_ms = ulite_enable_ms, |
| 399 | .break_ctl = ulite_break_ctl, |
| 400 | .startup = ulite_startup, |
| 401 | .shutdown = ulite_shutdown, |
| 402 | .set_termios = ulite_set_termios, |
| 403 | .type = ulite_type, |
| 404 | .release_port = ulite_release_port, |
| 405 | .request_port = ulite_request_port, |
| 406 | .config_port = ulite_config_port, |
Michal Simek | 8a28af7f | 2010-08-17 10:42:05 +0200 | [diff] [blame] | 407 | .verify_port = ulite_verify_port, |
| 408 | #ifdef CONFIG_CONSOLE_POLL |
| 409 | .poll_get_char = ulite_get_poll_char, |
| 410 | .poll_put_char = ulite_put_poll_char, |
| 411 | #endif |
Peter Korsgaard | 238b872 | 2006-12-06 20:35:17 -0800 | [diff] [blame] | 412 | }; |
| 413 | |
Grant Likely | 435706b | 2007-10-02 12:15:59 +1000 | [diff] [blame] | 414 | /* --------------------------------------------------------------------- |
| 415 | * Console driver operations |
| 416 | */ |
| 417 | |
Peter Korsgaard | 238b872 | 2006-12-06 20:35:17 -0800 | [diff] [blame] | 418 | #ifdef CONFIG_SERIAL_UARTLITE_CONSOLE |
| 419 | static void ulite_console_wait_tx(struct uart_port *port) |
| 420 | { |
| 421 | int i; |
Grant Likely | 1d6b698 | 2007-10-23 14:27:46 +1000 | [diff] [blame] | 422 | u8 val; |
Peter Korsgaard | 238b872 | 2006-12-06 20:35:17 -0800 | [diff] [blame] | 423 | |
Grant Likely | 1d6b698 | 2007-10-23 14:27:46 +1000 | [diff] [blame] | 424 | /* Spin waiting for TX fifo to have space available */ |
| 425 | for (i = 0; i < 100000; i++) { |
Michal Simek | 6d53c3b | 2013-02-11 19:04:34 +0100 | [diff] [blame^] | 426 | val = uart_in32(ULITE_STATUS, port); |
Grant Likely | 1d6b698 | 2007-10-23 14:27:46 +1000 | [diff] [blame] | 427 | if ((val & ULITE_STATUS_TXFULL) == 0) |
Peter Korsgaard | 238b872 | 2006-12-06 20:35:17 -0800 | [diff] [blame] | 428 | break; |
Grant Likely | 1d6b698 | 2007-10-23 14:27:46 +1000 | [diff] [blame] | 429 | cpu_relax(); |
Peter Korsgaard | 238b872 | 2006-12-06 20:35:17 -0800 | [diff] [blame] | 430 | } |
| 431 | } |
| 432 | |
| 433 | static void ulite_console_putchar(struct uart_port *port, int ch) |
| 434 | { |
| 435 | ulite_console_wait_tx(port); |
Michal Simek | 6d53c3b | 2013-02-11 19:04:34 +0100 | [diff] [blame^] | 436 | uart_out32(ch, ULITE_TX, port); |
Peter Korsgaard | 238b872 | 2006-12-06 20:35:17 -0800 | [diff] [blame] | 437 | } |
| 438 | |
| 439 | static void ulite_console_write(struct console *co, const char *s, |
| 440 | unsigned int count) |
| 441 | { |
Grant Likely | 483c79d | 2007-10-02 12:15:44 +1000 | [diff] [blame] | 442 | struct uart_port *port = &ulite_ports[co->index]; |
Peter Korsgaard | 238b872 | 2006-12-06 20:35:17 -0800 | [diff] [blame] | 443 | unsigned long flags; |
| 444 | unsigned int ier; |
| 445 | int locked = 1; |
| 446 | |
| 447 | if (oops_in_progress) { |
| 448 | locked = spin_trylock_irqsave(&port->lock, flags); |
| 449 | } else |
| 450 | spin_lock_irqsave(&port->lock, flags); |
| 451 | |
| 452 | /* save and disable interrupt */ |
Michal Simek | 6d53c3b | 2013-02-11 19:04:34 +0100 | [diff] [blame^] | 453 | ier = uart_in32(ULITE_STATUS, port) & ULITE_STATUS_IE; |
| 454 | uart_out32(0, ULITE_CONTROL, port); |
Peter Korsgaard | 238b872 | 2006-12-06 20:35:17 -0800 | [diff] [blame] | 455 | |
| 456 | uart_console_write(port, s, count, ulite_console_putchar); |
| 457 | |
| 458 | ulite_console_wait_tx(port); |
| 459 | |
| 460 | /* restore interrupt state */ |
| 461 | if (ier) |
Michal Simek | 6d53c3b | 2013-02-11 19:04:34 +0100 | [diff] [blame^] | 462 | uart_out32(ULITE_CONTROL_IE, ULITE_CONTROL, port); |
Peter Korsgaard | 238b872 | 2006-12-06 20:35:17 -0800 | [diff] [blame] | 463 | |
| 464 | if (locked) |
| 465 | spin_unlock_irqrestore(&port->lock, flags); |
| 466 | } |
| 467 | |
Bill Pemberton | 9671f09 | 2012-11-19 13:21:50 -0500 | [diff] [blame] | 468 | static int ulite_console_setup(struct console *co, char *options) |
Peter Korsgaard | 238b872 | 2006-12-06 20:35:17 -0800 | [diff] [blame] | 469 | { |
| 470 | struct uart_port *port; |
| 471 | int baud = 9600; |
| 472 | int bits = 8; |
| 473 | int parity = 'n'; |
| 474 | int flow = 'n'; |
| 475 | |
| 476 | if (co->index < 0 || co->index >= ULITE_NR_UARTS) |
| 477 | return -EINVAL; |
| 478 | |
Grant Likely | 483c79d | 2007-10-02 12:15:44 +1000 | [diff] [blame] | 479 | port = &ulite_ports[co->index]; |
Peter Korsgaard | 238b872 | 2006-12-06 20:35:17 -0800 | [diff] [blame] | 480 | |
Grant Likely | 3de66a1 | 2008-02-06 10:23:41 -0700 | [diff] [blame] | 481 | /* Has the device been initialized yet? */ |
Grant Likely | fb4e6e6 | 2007-10-02 12:16:09 +1000 | [diff] [blame] | 482 | if (!port->mapbase) { |
| 483 | pr_debug("console on ttyUL%i not present\n", co->index); |
| 484 | return -ENODEV; |
| 485 | } |
| 486 | |
Peter Korsgaard | 238b872 | 2006-12-06 20:35:17 -0800 | [diff] [blame] | 487 | /* not initialized yet? */ |
Grant Likely | 852e1ea | 2007-10-02 12:16:04 +1000 | [diff] [blame] | 488 | if (!port->membase) { |
Grant Likely | fb4e6e6 | 2007-10-02 12:16:09 +1000 | [diff] [blame] | 489 | if (ulite_request_port(port)) |
| 490 | return -ENODEV; |
Grant Likely | 852e1ea | 2007-10-02 12:16:04 +1000 | [diff] [blame] | 491 | } |
Peter Korsgaard | 238b872 | 2006-12-06 20:35:17 -0800 | [diff] [blame] | 492 | |
| 493 | if (options) |
| 494 | uart_parse_options(options, &baud, &parity, &bits, &flow); |
| 495 | |
| 496 | return uart_set_options(port, co, baud, parity, bits, flow); |
| 497 | } |
| 498 | |
| 499 | static struct uart_driver ulite_uart_driver; |
| 500 | |
| 501 | static struct console ulite_console = { |
Grant Likely | 0077582 | 2007-10-02 12:15:49 +1000 | [diff] [blame] | 502 | .name = ULITE_NAME, |
Peter Korsgaard | 238b872 | 2006-12-06 20:35:17 -0800 | [diff] [blame] | 503 | .write = ulite_console_write, |
| 504 | .device = uart_console_device, |
| 505 | .setup = ulite_console_setup, |
| 506 | .flags = CON_PRINTBUFFER, |
| 507 | .index = -1, /* Specified on the cmdline (e.g. console=ttyUL0 ) */ |
| 508 | .data = &ulite_uart_driver, |
| 509 | }; |
| 510 | |
| 511 | static int __init ulite_console_init(void) |
| 512 | { |
| 513 | register_console(&ulite_console); |
| 514 | return 0; |
| 515 | } |
| 516 | |
| 517 | console_initcall(ulite_console_init); |
| 518 | |
| 519 | #endif /* CONFIG_SERIAL_UARTLITE_CONSOLE */ |
| 520 | |
| 521 | static struct uart_driver ulite_uart_driver = { |
| 522 | .owner = THIS_MODULE, |
| 523 | .driver_name = "uartlite", |
Grant Likely | 0077582 | 2007-10-02 12:15:49 +1000 | [diff] [blame] | 524 | .dev_name = ULITE_NAME, |
Peter Korsgaard | 238b872 | 2006-12-06 20:35:17 -0800 | [diff] [blame] | 525 | .major = ULITE_MAJOR, |
| 526 | .minor = ULITE_MINOR, |
| 527 | .nr = ULITE_NR_UARTS, |
| 528 | #ifdef CONFIG_SERIAL_UARTLITE_CONSOLE |
| 529 | .cons = &ulite_console, |
| 530 | #endif |
| 531 | }; |
| 532 | |
Grant Likely | 435706b | 2007-10-02 12:15:59 +1000 | [diff] [blame] | 533 | /* --------------------------------------------------------------------- |
| 534 | * Port assignment functions (mapping devices to uart_port structures) |
| 535 | */ |
| 536 | |
| 537 | /** ulite_assign: register a uartlite device with the driver |
| 538 | * |
| 539 | * @dev: pointer to device structure |
| 540 | * @id: requested id number. Pass -1 for automatic port assignment |
| 541 | * @base: base address of uartlite registers |
| 542 | * @irq: irq number for uartlite |
| 543 | * |
| 544 | * Returns: 0 on success, <0 otherwise |
| 545 | */ |
Bill Pemberton | 9671f09 | 2012-11-19 13:21:50 -0500 | [diff] [blame] | 546 | static int ulite_assign(struct device *dev, int id, u32 base, int irq) |
Grant Likely | 8fa7b61 | 2007-10-02 12:15:54 +1000 | [diff] [blame] | 547 | { |
| 548 | struct uart_port *port; |
| 549 | int rc; |
| 550 | |
| 551 | /* if id = -1; then scan for a free id and use that */ |
| 552 | if (id < 0) { |
| 553 | for (id = 0; id < ULITE_NR_UARTS; id++) |
| 554 | if (ulite_ports[id].mapbase == 0) |
| 555 | break; |
| 556 | } |
| 557 | if (id < 0 || id >= ULITE_NR_UARTS) { |
| 558 | dev_err(dev, "%s%i too large\n", ULITE_NAME, id); |
| 559 | return -EINVAL; |
| 560 | } |
| 561 | |
Grant Likely | fb4e6e6 | 2007-10-02 12:16:09 +1000 | [diff] [blame] | 562 | if ((ulite_ports[id].mapbase) && (ulite_ports[id].mapbase != base)) { |
Grant Likely | 8fa7b61 | 2007-10-02 12:15:54 +1000 | [diff] [blame] | 563 | dev_err(dev, "cannot assign to %s%i; it is already in use\n", |
| 564 | ULITE_NAME, id); |
| 565 | return -EBUSY; |
| 566 | } |
| 567 | |
| 568 | port = &ulite_ports[id]; |
| 569 | |
| 570 | spin_lock_init(&port->lock); |
| 571 | port->fifosize = 16; |
| 572 | port->regshift = 2; |
| 573 | port->iotype = UPIO_MEM; |
| 574 | port->iobase = 1; /* mark port in use */ |
| 575 | port->mapbase = base; |
| 576 | port->membase = NULL; |
| 577 | port->ops = &ulite_ops; |
| 578 | port->irq = irq; |
| 579 | port->flags = UPF_BOOT_AUTOCONF; |
| 580 | port->dev = dev; |
| 581 | port->type = PORT_UNKNOWN; |
| 582 | port->line = id; |
| 583 | |
| 584 | dev_set_drvdata(dev, port); |
| 585 | |
| 586 | /* Register the port */ |
| 587 | rc = uart_add_one_port(&ulite_uart_driver, port); |
| 588 | if (rc) { |
| 589 | dev_err(dev, "uart_add_one_port() failed; err=%i\n", rc); |
| 590 | port->mapbase = 0; |
| 591 | dev_set_drvdata(dev, NULL); |
| 592 | return rc; |
| 593 | } |
| 594 | |
| 595 | return 0; |
| 596 | } |
| 597 | |
Grant Likely | 435706b | 2007-10-02 12:15:59 +1000 | [diff] [blame] | 598 | /** ulite_release: register a uartlite device with the driver |
| 599 | * |
| 600 | * @dev: pointer to device structure |
| 601 | */ |
Bill Pemberton | ae8d8a1 | 2012-11-19 13:26:18 -0500 | [diff] [blame] | 602 | static int ulite_release(struct device *dev) |
Grant Likely | 8fa7b61 | 2007-10-02 12:15:54 +1000 | [diff] [blame] | 603 | { |
| 604 | struct uart_port *port = dev_get_drvdata(dev); |
| 605 | int rc = 0; |
| 606 | |
| 607 | if (port) { |
| 608 | rc = uart_remove_one_port(&ulite_uart_driver, port); |
| 609 | dev_set_drvdata(dev, NULL); |
| 610 | port->mapbase = 0; |
| 611 | } |
| 612 | |
| 613 | return rc; |
| 614 | } |
| 615 | |
Grant Likely | 435706b | 2007-10-02 12:15:59 +1000 | [diff] [blame] | 616 | /* --------------------------------------------------------------------- |
| 617 | * Platform bus binding |
| 618 | */ |
| 619 | |
Grant Likely | e5263a5 | 2011-02-22 20:16:13 -0700 | [diff] [blame] | 620 | #if defined(CONFIG_OF) |
| 621 | /* Match table for of_platform binding */ |
Bill Pemberton | de88b34 | 2012-11-19 13:24:32 -0500 | [diff] [blame] | 622 | static struct of_device_id ulite_of_match[] = { |
Grant Likely | e5263a5 | 2011-02-22 20:16:13 -0700 | [diff] [blame] | 623 | { .compatible = "xlnx,opb-uartlite-1.00.b", }, |
| 624 | { .compatible = "xlnx,xps-uartlite-1.00.a", }, |
| 625 | {} |
| 626 | }; |
| 627 | MODULE_DEVICE_TABLE(of, ulite_of_match); |
Grant Likely | e5263a5 | 2011-02-22 20:16:13 -0700 | [diff] [blame] | 628 | #endif /* CONFIG_OF */ |
| 629 | |
Bill Pemberton | 9671f09 | 2012-11-19 13:21:50 -0500 | [diff] [blame] | 630 | static int ulite_probe(struct platform_device *pdev) |
Peter Korsgaard | 238b872 | 2006-12-06 20:35:17 -0800 | [diff] [blame] | 631 | { |
| 632 | struct resource *res, *res2; |
Grant Likely | e5263a5 | 2011-02-22 20:16:13 -0700 | [diff] [blame] | 633 | int id = pdev->id; |
| 634 | #ifdef CONFIG_OF |
| 635 | const __be32 *prop; |
| 636 | |
| 637 | prop = of_get_property(pdev->dev.of_node, "port-number", NULL); |
| 638 | if (prop) |
| 639 | id = be32_to_cpup(prop); |
| 640 | #endif |
Peter Korsgaard | 238b872 | 2006-12-06 20:35:17 -0800 | [diff] [blame] | 641 | |
| 642 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
| 643 | if (!res) |
| 644 | return -ENODEV; |
| 645 | |
| 646 | res2 = platform_get_resource(pdev, IORESOURCE_IRQ, 0); |
| 647 | if (!res2) |
| 648 | return -ENODEV; |
| 649 | |
Grant Likely | e5263a5 | 2011-02-22 20:16:13 -0700 | [diff] [blame] | 650 | return ulite_assign(&pdev->dev, id, res->start, res2->start); |
Peter Korsgaard | 238b872 | 2006-12-06 20:35:17 -0800 | [diff] [blame] | 651 | } |
| 652 | |
Bill Pemberton | ae8d8a1 | 2012-11-19 13:26:18 -0500 | [diff] [blame] | 653 | static int ulite_remove(struct platform_device *pdev) |
Peter Korsgaard | 238b872 | 2006-12-06 20:35:17 -0800 | [diff] [blame] | 654 | { |
Grant Likely | 8fa7b61 | 2007-10-02 12:15:54 +1000 | [diff] [blame] | 655 | return ulite_release(&pdev->dev); |
Peter Korsgaard | 238b872 | 2006-12-06 20:35:17 -0800 | [diff] [blame] | 656 | } |
| 657 | |
Kay Sievers | e169c13 | 2008-04-15 14:34:35 -0700 | [diff] [blame] | 658 | /* work with hotplug and coldplug */ |
| 659 | MODULE_ALIAS("platform:uartlite"); |
| 660 | |
Peter Korsgaard | 238b872 | 2006-12-06 20:35:17 -0800 | [diff] [blame] | 661 | static struct platform_driver ulite_platform_driver = { |
Grant Likely | e5263a5 | 2011-02-22 20:16:13 -0700 | [diff] [blame] | 662 | .probe = ulite_probe, |
Bill Pemberton | 2d47b71 | 2012-11-19 13:21:34 -0500 | [diff] [blame] | 663 | .remove = ulite_remove, |
Grant Likely | 852e1ea | 2007-10-02 12:16:04 +1000 | [diff] [blame] | 664 | .driver = { |
Grant Likely | 4018294 | 2010-04-13 16:13:02 -0700 | [diff] [blame] | 665 | .owner = THIS_MODULE, |
Grant Likely | e5263a5 | 2011-02-22 20:16:13 -0700 | [diff] [blame] | 666 | .name = "uartlite", |
Ben Dooks | 8588806 | 2011-08-03 10:11:43 +0100 | [diff] [blame] | 667 | .of_match_table = of_match_ptr(ulite_of_match), |
Grant Likely | 852e1ea | 2007-10-02 12:16:04 +1000 | [diff] [blame] | 668 | }, |
| 669 | }; |
| 670 | |
Grant Likely | 852e1ea | 2007-10-02 12:16:04 +1000 | [diff] [blame] | 671 | /* --------------------------------------------------------------------- |
Grant Likely | 435706b | 2007-10-02 12:15:59 +1000 | [diff] [blame] | 672 | * Module setup/teardown |
| 673 | */ |
| 674 | |
Michal Simek | 3240b48d | 2013-02-11 19:04:33 +0100 | [diff] [blame] | 675 | static int __init ulite_init(void) |
Peter Korsgaard | 238b872 | 2006-12-06 20:35:17 -0800 | [diff] [blame] | 676 | { |
| 677 | int ret; |
| 678 | |
Grant Likely | 852e1ea | 2007-10-02 12:16:04 +1000 | [diff] [blame] | 679 | pr_debug("uartlite: calling uart_register_driver()\n"); |
Peter Korsgaard | 238b872 | 2006-12-06 20:35:17 -0800 | [diff] [blame] | 680 | ret = uart_register_driver(&ulite_uart_driver); |
| 681 | if (ret) |
Grant Likely | 852e1ea | 2007-10-02 12:16:04 +1000 | [diff] [blame] | 682 | goto err_uart; |
Peter Korsgaard | 238b872 | 2006-12-06 20:35:17 -0800 | [diff] [blame] | 683 | |
Grant Likely | 852e1ea | 2007-10-02 12:16:04 +1000 | [diff] [blame] | 684 | pr_debug("uartlite: calling platform_driver_register()\n"); |
Peter Korsgaard | 238b872 | 2006-12-06 20:35:17 -0800 | [diff] [blame] | 685 | ret = platform_driver_register(&ulite_platform_driver); |
| 686 | if (ret) |
Grant Likely | 852e1ea | 2007-10-02 12:16:04 +1000 | [diff] [blame] | 687 | goto err_plat; |
Peter Korsgaard | 238b872 | 2006-12-06 20:35:17 -0800 | [diff] [blame] | 688 | |
Grant Likely | 852e1ea | 2007-10-02 12:16:04 +1000 | [diff] [blame] | 689 | return 0; |
| 690 | |
| 691 | err_plat: |
Grant Likely | 852e1ea | 2007-10-02 12:16:04 +1000 | [diff] [blame] | 692 | uart_unregister_driver(&ulite_uart_driver); |
| 693 | err_uart: |
Michal Simek | 3240b48d | 2013-02-11 19:04:33 +0100 | [diff] [blame] | 694 | pr_err("registering uartlite driver failed: err=%i", ret); |
Peter Korsgaard | 238b872 | 2006-12-06 20:35:17 -0800 | [diff] [blame] | 695 | return ret; |
| 696 | } |
| 697 | |
Michal Simek | 3240b48d | 2013-02-11 19:04:33 +0100 | [diff] [blame] | 698 | static void __exit ulite_exit(void) |
Peter Korsgaard | 238b872 | 2006-12-06 20:35:17 -0800 | [diff] [blame] | 699 | { |
| 700 | platform_driver_unregister(&ulite_platform_driver); |
Peter Korsgaard | 238b872 | 2006-12-06 20:35:17 -0800 | [diff] [blame] | 701 | uart_unregister_driver(&ulite_uart_driver); |
| 702 | } |
| 703 | |
| 704 | module_init(ulite_init); |
| 705 | module_exit(ulite_exit); |
| 706 | |
| 707 | MODULE_AUTHOR("Peter Korsgaard <jacmet@sunsite.dk>"); |
| 708 | MODULE_DESCRIPTION("Xilinx uartlite serial driver"); |
| 709 | MODULE_LICENSE("GPL"); |