Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 1 | /* |
| 2 | * Copyright 2008 Advanced Micro Devices, Inc. |
| 3 | * Copyright 2008 Red Hat Inc. |
| 4 | * Copyright 2009 Jerome Glisse. |
| 5 | * |
| 6 | * Permission is hereby granted, free of charge, to any person obtaining a |
| 7 | * copy of this software and associated documentation files (the "Software"), |
| 8 | * to deal in the Software without restriction, including without limitation |
| 9 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
| 10 | * and/or sell copies of the Software, and to permit persons to whom the |
| 11 | * Software is furnished to do so, subject to the following conditions: |
| 12 | * |
| 13 | * The above copyright notice and this permission notice shall be included in |
| 14 | * all copies or substantial portions of the Software. |
| 15 | * |
| 16 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
| 17 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
| 18 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
| 19 | * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR |
| 20 | * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, |
| 21 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR |
| 22 | * OTHER DEALINGS IN THE SOFTWARE. |
| 23 | * |
| 24 | * Authors: Dave Airlie |
| 25 | * Alex Deucher |
| 26 | * Jerome Glisse |
| 27 | */ |
David Howells | 760285e | 2012-10-02 18:01:07 +0100 | [diff] [blame] | 28 | #include <drm/drmP.h> |
| 29 | #include <drm/radeon_drm.h> |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 30 | #include "radeon.h" |
| 31 | |
| 32 | int radeon_gem_object_init(struct drm_gem_object *obj) |
| 33 | { |
Daniel Vetter | 441921d | 2011-02-18 17:59:16 +0100 | [diff] [blame] | 34 | BUG(); |
| 35 | |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 36 | return 0; |
| 37 | } |
| 38 | |
| 39 | void radeon_gem_object_free(struct drm_gem_object *gobj) |
| 40 | { |
Daniel Vetter | 7e4d15d | 2011-02-18 17:59:17 +0100 | [diff] [blame] | 41 | struct radeon_bo *robj = gem_to_radeon_bo(gobj); |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 42 | |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 43 | if (robj) { |
Alex Deucher | 40f5cf9 | 2012-05-10 18:33:13 -0400 | [diff] [blame] | 44 | if (robj->gem_base.import_attach) |
| 45 | drm_prime_gem_destroy(&robj->gem_base, robj->tbo.sg); |
Jerome Glisse | 4c78867 | 2009-11-20 14:29:23 +0100 | [diff] [blame] | 46 | radeon_bo_unref(&robj); |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 47 | } |
| 48 | } |
| 49 | |
| 50 | int radeon_gem_object_create(struct radeon_device *rdev, int size, |
Jerome Glisse | 4c78867 | 2009-11-20 14:29:23 +0100 | [diff] [blame] | 51 | int alignment, int initial_domain, |
| 52 | bool discardable, bool kernel, |
| 53 | struct drm_gem_object **obj) |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 54 | { |
Jerome Glisse | 4c78867 | 2009-11-20 14:29:23 +0100 | [diff] [blame] | 55 | struct radeon_bo *robj; |
Christian König | 6c0d112 | 2012-10-23 15:53:18 +0200 | [diff] [blame^] | 56 | unsigned long max_size; |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 57 | int r; |
| 58 | |
| 59 | *obj = NULL; |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 60 | /* At least align on page size */ |
| 61 | if (alignment < PAGE_SIZE) { |
| 62 | alignment = PAGE_SIZE; |
| 63 | } |
Christian König | 6c0d112 | 2012-10-23 15:53:18 +0200 | [diff] [blame^] | 64 | |
| 65 | /* maximun bo size is the minimun btw visible vram and gtt size */ |
| 66 | max_size = min(rdev->mc.visible_vram_size, rdev->mc.gtt_size); |
| 67 | if (size > max_size) { |
| 68 | printk(KERN_WARNING "%s:%d alloc size %dMb bigger than %ldMb limit\n", |
| 69 | __func__, __LINE__, size >> 20, max_size >> 20); |
| 70 | return -ENOMEM; |
| 71 | } |
| 72 | |
Alex Deucher | 40f5cf9 | 2012-05-10 18:33:13 -0400 | [diff] [blame] | 73 | r = radeon_bo_create(rdev, size, alignment, kernel, initial_domain, NULL, &robj); |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 74 | if (r) { |
Dave Airlie | ecabd32 | 2009-12-15 10:39:48 +1000 | [diff] [blame] | 75 | if (r != -ERESTARTSYS) |
| 76 | DRM_ERROR("Failed to allocate GEM object (%d, %d, %u, %d)\n", |
| 77 | size, initial_domain, alignment, r); |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 78 | return r; |
| 79 | } |
Daniel Vetter | 441921d | 2011-02-18 17:59:16 +0100 | [diff] [blame] | 80 | *obj = &robj->gem_base; |
| 81 | |
| 82 | mutex_lock(&rdev->gem.mutex); |
| 83 | list_add_tail(&robj->list, &rdev->gem.objects); |
| 84 | mutex_unlock(&rdev->gem.mutex); |
| 85 | |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 86 | return 0; |
| 87 | } |
| 88 | |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 89 | int radeon_gem_set_domain(struct drm_gem_object *gobj, |
| 90 | uint32_t rdomain, uint32_t wdomain) |
| 91 | { |
Jerome Glisse | 4c78867 | 2009-11-20 14:29:23 +0100 | [diff] [blame] | 92 | struct radeon_bo *robj; |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 93 | uint32_t domain; |
| 94 | int r; |
| 95 | |
| 96 | /* FIXME: reeimplement */ |
Daniel Vetter | 7e4d15d | 2011-02-18 17:59:17 +0100 | [diff] [blame] | 97 | robj = gem_to_radeon_bo(gobj); |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 98 | /* work out where to validate the buffer to */ |
| 99 | domain = wdomain; |
| 100 | if (!domain) { |
| 101 | domain = rdomain; |
| 102 | } |
| 103 | if (!domain) { |
| 104 | /* Do nothings */ |
Masanari Iida | b6cafa2 | 2012-02-27 23:28:38 +0900 | [diff] [blame] | 105 | printk(KERN_WARNING "Set domain without domain !\n"); |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 106 | return 0; |
| 107 | } |
| 108 | if (domain == RADEON_GEM_DOMAIN_CPU) { |
| 109 | /* Asking for cpu access wait for object idle */ |
Jerome Glisse | 4c78867 | 2009-11-20 14:29:23 +0100 | [diff] [blame] | 110 | r = radeon_bo_wait(robj, NULL, false); |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 111 | if (r) { |
| 112 | printk(KERN_ERR "Failed to wait for object !\n"); |
| 113 | return r; |
| 114 | } |
| 115 | } |
| 116 | return 0; |
| 117 | } |
| 118 | |
| 119 | int radeon_gem_init(struct radeon_device *rdev) |
| 120 | { |
| 121 | INIT_LIST_HEAD(&rdev->gem.objects); |
| 122 | return 0; |
| 123 | } |
| 124 | |
| 125 | void radeon_gem_fini(struct radeon_device *rdev) |
| 126 | { |
Jerome Glisse | 4c78867 | 2009-11-20 14:29:23 +0100 | [diff] [blame] | 127 | radeon_bo_force_delete(rdev); |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 128 | } |
| 129 | |
Jerome Glisse | 721604a | 2012-01-05 22:11:05 -0500 | [diff] [blame] | 130 | /* |
| 131 | * Call from drm_gem_handle_create which appear in both new and open ioctl |
| 132 | * case. |
| 133 | */ |
| 134 | int radeon_gem_object_open(struct drm_gem_object *obj, struct drm_file *file_priv) |
| 135 | { |
Christian König | e971bd5 | 2012-09-11 16:10:04 +0200 | [diff] [blame] | 136 | struct radeon_bo *rbo = gem_to_radeon_bo(obj); |
| 137 | struct radeon_device *rdev = rbo->rdev; |
| 138 | struct radeon_fpriv *fpriv = file_priv->driver_priv; |
| 139 | struct radeon_vm *vm = &fpriv->vm; |
| 140 | struct radeon_bo_va *bo_va; |
| 141 | int r; |
| 142 | |
| 143 | if (rdev->family < CHIP_CAYMAN) { |
| 144 | return 0; |
| 145 | } |
| 146 | |
| 147 | r = radeon_bo_reserve(rbo, false); |
| 148 | if (r) { |
| 149 | return r; |
| 150 | } |
| 151 | |
| 152 | bo_va = radeon_vm_bo_find(vm, rbo); |
| 153 | if (!bo_va) { |
| 154 | bo_va = radeon_vm_bo_add(rdev, vm, rbo); |
| 155 | } else { |
| 156 | ++bo_va->ref_count; |
| 157 | } |
| 158 | radeon_bo_unreserve(rbo); |
| 159 | |
Jerome Glisse | 721604a | 2012-01-05 22:11:05 -0500 | [diff] [blame] | 160 | return 0; |
| 161 | } |
| 162 | |
| 163 | void radeon_gem_object_close(struct drm_gem_object *obj, |
| 164 | struct drm_file *file_priv) |
| 165 | { |
| 166 | struct radeon_bo *rbo = gem_to_radeon_bo(obj); |
| 167 | struct radeon_device *rdev = rbo->rdev; |
| 168 | struct radeon_fpriv *fpriv = file_priv->driver_priv; |
| 169 | struct radeon_vm *vm = &fpriv->vm; |
Christian König | e971bd5 | 2012-09-11 16:10:04 +0200 | [diff] [blame] | 170 | struct radeon_bo_va *bo_va; |
Christian König | d59f702 | 2012-09-11 16:10:02 +0200 | [diff] [blame] | 171 | int r; |
Jerome Glisse | 721604a | 2012-01-05 22:11:05 -0500 | [diff] [blame] | 172 | |
| 173 | if (rdev->family < CHIP_CAYMAN) { |
| 174 | return; |
| 175 | } |
| 176 | |
Christian König | d59f702 | 2012-09-11 16:10:02 +0200 | [diff] [blame] | 177 | r = radeon_bo_reserve(rbo, true); |
| 178 | if (r) { |
| 179 | dev_err(rdev->dev, "leaking bo va because " |
| 180 | "we fail to reserve bo (%d)\n", r); |
Jerome Glisse | 721604a | 2012-01-05 22:11:05 -0500 | [diff] [blame] | 181 | return; |
| 182 | } |
Christian König | e971bd5 | 2012-09-11 16:10:04 +0200 | [diff] [blame] | 183 | bo_va = radeon_vm_bo_find(vm, rbo); |
| 184 | if (bo_va) { |
| 185 | if (--bo_va->ref_count == 0) { |
| 186 | radeon_vm_bo_rmv(rdev, bo_va); |
| 187 | } |
| 188 | } |
Jerome Glisse | 721604a | 2012-01-05 22:11:05 -0500 | [diff] [blame] | 189 | radeon_bo_unreserve(rbo); |
| 190 | } |
| 191 | |
Christian König | 6c6f478 | 2012-05-02 15:11:19 +0200 | [diff] [blame] | 192 | static int radeon_gem_handle_lockup(struct radeon_device *rdev, int r) |
| 193 | { |
| 194 | if (r == -EDEADLK) { |
Christian König | 6c6f478 | 2012-05-02 15:11:19 +0200 | [diff] [blame] | 195 | r = radeon_gpu_reset(rdev); |
| 196 | if (!r) |
| 197 | r = -EAGAIN; |
Christian König | 6c6f478 | 2012-05-02 15:11:19 +0200 | [diff] [blame] | 198 | } |
| 199 | return r; |
| 200 | } |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 201 | |
| 202 | /* |
| 203 | * GEM ioctls. |
| 204 | */ |
| 205 | int radeon_gem_info_ioctl(struct drm_device *dev, void *data, |
| 206 | struct drm_file *filp) |
| 207 | { |
| 208 | struct radeon_device *rdev = dev->dev_private; |
| 209 | struct drm_radeon_gem_info *args = data; |
Dave Airlie | 5359533 | 2011-03-14 09:47:24 +1000 | [diff] [blame] | 210 | struct ttm_mem_type_manager *man; |
Christian König | bf85279 | 2011-10-13 13:19:22 +0200 | [diff] [blame] | 211 | unsigned i; |
Dave Airlie | 5359533 | 2011-03-14 09:47:24 +1000 | [diff] [blame] | 212 | |
| 213 | man = &rdev->mman.bdev.man[TTM_PL_VRAM]; |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 214 | |
Dave Airlie | 7a50f01 | 2009-07-21 20:39:30 +1000 | [diff] [blame] | 215 | args->vram_size = rdev->mc.real_vram_size; |
Dave Airlie | 5359533 | 2011-03-14 09:47:24 +1000 | [diff] [blame] | 216 | args->vram_visible = (u64)man->size << PAGE_SHIFT; |
Michel Dänzer | 38e1492 | 2009-08-05 00:19:51 +0200 | [diff] [blame] | 217 | if (rdev->stollen_vga_memory) |
Jerome Glisse | 4c78867 | 2009-11-20 14:29:23 +0100 | [diff] [blame] | 218 | args->vram_visible -= radeon_bo_size(rdev->stollen_vga_memory); |
Dave Airlie | 3865167 | 2010-03-30 05:34:13 +0000 | [diff] [blame] | 219 | args->vram_visible -= radeon_fbdev_total_size(rdev); |
Christian König | 7b1f248 | 2011-09-23 15:11:23 +0200 | [diff] [blame] | 220 | args->gart_size = rdev->mc.gtt_size - 4096 - RADEON_IB_POOL_SIZE*64*1024; |
Christian König | bf85279 | 2011-10-13 13:19:22 +0200 | [diff] [blame] | 221 | for(i = 0; i < RADEON_NUM_RINGS; ++i) |
Christian König | e32eb50 | 2011-10-23 12:56:27 +0200 | [diff] [blame] | 222 | args->gart_size -= rdev->ring[i].ring_size; |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 223 | return 0; |
| 224 | } |
| 225 | |
| 226 | int radeon_gem_pread_ioctl(struct drm_device *dev, void *data, |
| 227 | struct drm_file *filp) |
| 228 | { |
| 229 | /* TODO: implement */ |
| 230 | DRM_ERROR("unimplemented %s\n", __func__); |
| 231 | return -ENOSYS; |
| 232 | } |
| 233 | |
| 234 | int radeon_gem_pwrite_ioctl(struct drm_device *dev, void *data, |
| 235 | struct drm_file *filp) |
| 236 | { |
| 237 | /* TODO: implement */ |
| 238 | DRM_ERROR("unimplemented %s\n", __func__); |
| 239 | return -ENOSYS; |
| 240 | } |
| 241 | |
| 242 | int radeon_gem_create_ioctl(struct drm_device *dev, void *data, |
| 243 | struct drm_file *filp) |
| 244 | { |
| 245 | struct radeon_device *rdev = dev->dev_private; |
| 246 | struct drm_radeon_gem_create *args = data; |
| 247 | struct drm_gem_object *gobj; |
| 248 | uint32_t handle; |
| 249 | int r; |
| 250 | |
Jerome Glisse | dee53e7 | 2012-07-02 12:45:19 -0400 | [diff] [blame] | 251 | down_read(&rdev->exclusive_lock); |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 252 | /* create a gem object to contain this object in */ |
| 253 | args->size = roundup(args->size, PAGE_SIZE); |
| 254 | r = radeon_gem_object_create(rdev, args->size, args->alignment, |
Jerome Glisse | 4c78867 | 2009-11-20 14:29:23 +0100 | [diff] [blame] | 255 | args->initial_domain, false, |
| 256 | false, &gobj); |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 257 | if (r) { |
Jerome Glisse | dee53e7 | 2012-07-02 12:45:19 -0400 | [diff] [blame] | 258 | up_read(&rdev->exclusive_lock); |
Christian König | 6c6f478 | 2012-05-02 15:11:19 +0200 | [diff] [blame] | 259 | r = radeon_gem_handle_lockup(rdev, r); |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 260 | return r; |
| 261 | } |
| 262 | r = drm_gem_handle_create(filp, gobj, &handle); |
Dave Airlie | 29d08b3 | 2010-09-27 16:17:17 +1000 | [diff] [blame] | 263 | /* drop reference from allocate - handle holds it now */ |
| 264 | drm_gem_object_unreference_unlocked(gobj); |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 265 | if (r) { |
Jerome Glisse | dee53e7 | 2012-07-02 12:45:19 -0400 | [diff] [blame] | 266 | up_read(&rdev->exclusive_lock); |
Christian König | 6c6f478 | 2012-05-02 15:11:19 +0200 | [diff] [blame] | 267 | r = radeon_gem_handle_lockup(rdev, r); |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 268 | return r; |
| 269 | } |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 270 | args->handle = handle; |
Jerome Glisse | dee53e7 | 2012-07-02 12:45:19 -0400 | [diff] [blame] | 271 | up_read(&rdev->exclusive_lock); |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 272 | return 0; |
| 273 | } |
| 274 | |
| 275 | int radeon_gem_set_domain_ioctl(struct drm_device *dev, void *data, |
| 276 | struct drm_file *filp) |
| 277 | { |
| 278 | /* transition the BO to a domain - |
| 279 | * just validate the BO into a certain domain */ |
Jerome Glisse | dee53e7 | 2012-07-02 12:45:19 -0400 | [diff] [blame] | 280 | struct radeon_device *rdev = dev->dev_private; |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 281 | struct drm_radeon_gem_set_domain *args = data; |
| 282 | struct drm_gem_object *gobj; |
Jerome Glisse | 4c78867 | 2009-11-20 14:29:23 +0100 | [diff] [blame] | 283 | struct radeon_bo *robj; |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 284 | int r; |
| 285 | |
| 286 | /* for now if someone requests domain CPU - |
| 287 | * just make sure the buffer is finished with */ |
Jerome Glisse | dee53e7 | 2012-07-02 12:45:19 -0400 | [diff] [blame] | 288 | down_read(&rdev->exclusive_lock); |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 289 | |
| 290 | /* just do a BO wait for now */ |
| 291 | gobj = drm_gem_object_lookup(dev, filp, args->handle); |
| 292 | if (gobj == NULL) { |
Jerome Glisse | dee53e7 | 2012-07-02 12:45:19 -0400 | [diff] [blame] | 293 | up_read(&rdev->exclusive_lock); |
Chris Wilson | bf79cb9 | 2010-08-04 14:19:46 +0100 | [diff] [blame] | 294 | return -ENOENT; |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 295 | } |
Daniel Vetter | 7e4d15d | 2011-02-18 17:59:17 +0100 | [diff] [blame] | 296 | robj = gem_to_radeon_bo(gobj); |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 297 | |
| 298 | r = radeon_gem_set_domain(gobj, args->read_domains, args->write_domain); |
| 299 | |
Luca Barbieri | bc9025b | 2010-02-09 05:49:12 +0000 | [diff] [blame] | 300 | drm_gem_object_unreference_unlocked(gobj); |
Jerome Glisse | dee53e7 | 2012-07-02 12:45:19 -0400 | [diff] [blame] | 301 | up_read(&rdev->exclusive_lock); |
Christian König | 6c6f478 | 2012-05-02 15:11:19 +0200 | [diff] [blame] | 302 | r = radeon_gem_handle_lockup(robj->rdev, r); |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 303 | return r; |
| 304 | } |
| 305 | |
Dave Airlie | ff72145b | 2011-02-07 12:16:14 +1000 | [diff] [blame] | 306 | int radeon_mode_dumb_mmap(struct drm_file *filp, |
| 307 | struct drm_device *dev, |
| 308 | uint32_t handle, uint64_t *offset_p) |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 309 | { |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 310 | struct drm_gem_object *gobj; |
Jerome Glisse | 4c78867 | 2009-11-20 14:29:23 +0100 | [diff] [blame] | 311 | struct radeon_bo *robj; |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 312 | |
Dave Airlie | ff72145b | 2011-02-07 12:16:14 +1000 | [diff] [blame] | 313 | gobj = drm_gem_object_lookup(dev, filp, handle); |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 314 | if (gobj == NULL) { |
Chris Wilson | bf79cb9 | 2010-08-04 14:19:46 +0100 | [diff] [blame] | 315 | return -ENOENT; |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 316 | } |
Daniel Vetter | 7e4d15d | 2011-02-18 17:59:17 +0100 | [diff] [blame] | 317 | robj = gem_to_radeon_bo(gobj); |
Dave Airlie | ff72145b | 2011-02-07 12:16:14 +1000 | [diff] [blame] | 318 | *offset_p = radeon_bo_mmap_offset(robj); |
Luca Barbieri | bc9025b | 2010-02-09 05:49:12 +0000 | [diff] [blame] | 319 | drm_gem_object_unreference_unlocked(gobj); |
Jerome Glisse | 4c78867 | 2009-11-20 14:29:23 +0100 | [diff] [blame] | 320 | return 0; |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 321 | } |
| 322 | |
Dave Airlie | ff72145b | 2011-02-07 12:16:14 +1000 | [diff] [blame] | 323 | int radeon_gem_mmap_ioctl(struct drm_device *dev, void *data, |
| 324 | struct drm_file *filp) |
| 325 | { |
| 326 | struct drm_radeon_gem_mmap *args = data; |
| 327 | |
| 328 | return radeon_mode_dumb_mmap(filp, dev, args->handle, &args->addr_ptr); |
| 329 | } |
| 330 | |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 331 | int radeon_gem_busy_ioctl(struct drm_device *dev, void *data, |
| 332 | struct drm_file *filp) |
| 333 | { |
Jerome Glisse | 1ef5325 | 2012-07-02 12:40:54 -0400 | [diff] [blame] | 334 | struct radeon_device *rdev = dev->dev_private; |
Dave Airlie | cefb87e | 2009-08-16 21:05:45 +1000 | [diff] [blame] | 335 | struct drm_radeon_gem_busy *args = data; |
| 336 | struct drm_gem_object *gobj; |
Jerome Glisse | 4c78867 | 2009-11-20 14:29:23 +0100 | [diff] [blame] | 337 | struct radeon_bo *robj; |
Dave Airlie | cefb87e | 2009-08-16 21:05:45 +1000 | [diff] [blame] | 338 | int r; |
Dave Airlie | 4361e52 | 2009-12-10 15:59:32 +1000 | [diff] [blame] | 339 | uint32_t cur_placement = 0; |
Dave Airlie | cefb87e | 2009-08-16 21:05:45 +1000 | [diff] [blame] | 340 | |
| 341 | gobj = drm_gem_object_lookup(dev, filp, args->handle); |
| 342 | if (gobj == NULL) { |
Chris Wilson | bf79cb9 | 2010-08-04 14:19:46 +0100 | [diff] [blame] | 343 | return -ENOENT; |
Dave Airlie | cefb87e | 2009-08-16 21:05:45 +1000 | [diff] [blame] | 344 | } |
Daniel Vetter | 7e4d15d | 2011-02-18 17:59:17 +0100 | [diff] [blame] | 345 | robj = gem_to_radeon_bo(gobj); |
Jerome Glisse | 4c78867 | 2009-11-20 14:29:23 +0100 | [diff] [blame] | 346 | r = radeon_bo_wait(robj, &cur_placement, true); |
Michel Dänzer | 9f844e5 | 2009-08-22 17:38:23 +0200 | [diff] [blame] | 347 | switch (cur_placement) { |
| 348 | case TTM_PL_VRAM: |
Dave Airlie | cefb87e | 2009-08-16 21:05:45 +1000 | [diff] [blame] | 349 | args->domain = RADEON_GEM_DOMAIN_VRAM; |
Michel Dänzer | 9f844e5 | 2009-08-22 17:38:23 +0200 | [diff] [blame] | 350 | break; |
| 351 | case TTM_PL_TT: |
Dave Airlie | cefb87e | 2009-08-16 21:05:45 +1000 | [diff] [blame] | 352 | args->domain = RADEON_GEM_DOMAIN_GTT; |
Michel Dänzer | 9f844e5 | 2009-08-22 17:38:23 +0200 | [diff] [blame] | 353 | break; |
| 354 | case TTM_PL_SYSTEM: |
Dave Airlie | cefb87e | 2009-08-16 21:05:45 +1000 | [diff] [blame] | 355 | args->domain = RADEON_GEM_DOMAIN_CPU; |
Michel Dänzer | 9f844e5 | 2009-08-22 17:38:23 +0200 | [diff] [blame] | 356 | default: |
| 357 | break; |
| 358 | } |
Luca Barbieri | bc9025b | 2010-02-09 05:49:12 +0000 | [diff] [blame] | 359 | drm_gem_object_unreference_unlocked(gobj); |
Jerome Glisse | 1ef5325 | 2012-07-02 12:40:54 -0400 | [diff] [blame] | 360 | r = radeon_gem_handle_lockup(rdev, r); |
Dave Airlie | e3b2415 | 2009-08-21 09:47:45 +1000 | [diff] [blame] | 361 | return r; |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 362 | } |
| 363 | |
| 364 | int radeon_gem_wait_idle_ioctl(struct drm_device *dev, void *data, |
| 365 | struct drm_file *filp) |
| 366 | { |
Jerome Glisse | 1ef5325 | 2012-07-02 12:40:54 -0400 | [diff] [blame] | 367 | struct radeon_device *rdev = dev->dev_private; |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 368 | struct drm_radeon_gem_wait_idle *args = data; |
| 369 | struct drm_gem_object *gobj; |
Jerome Glisse | 4c78867 | 2009-11-20 14:29:23 +0100 | [diff] [blame] | 370 | struct radeon_bo *robj; |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 371 | int r; |
| 372 | |
| 373 | gobj = drm_gem_object_lookup(dev, filp, args->handle); |
| 374 | if (gobj == NULL) { |
Chris Wilson | bf79cb9 | 2010-08-04 14:19:46 +0100 | [diff] [blame] | 375 | return -ENOENT; |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 376 | } |
Daniel Vetter | 7e4d15d | 2011-02-18 17:59:17 +0100 | [diff] [blame] | 377 | robj = gem_to_radeon_bo(gobj); |
Jerome Glisse | 4c78867 | 2009-11-20 14:29:23 +0100 | [diff] [blame] | 378 | r = radeon_bo_wait(robj, NULL, false); |
Jerome Glisse | 062b389 | 2010-02-04 20:36:39 +0100 | [diff] [blame] | 379 | /* callback hw specific functions if any */ |
Jerome Glisse | 1ef5325 | 2012-07-02 12:40:54 -0400 | [diff] [blame] | 380 | if (rdev->asic->ioctl_wait_idle) |
| 381 | robj->rdev->asic->ioctl_wait_idle(rdev, robj); |
Luca Barbieri | bc9025b | 2010-02-09 05:49:12 +0000 | [diff] [blame] | 382 | drm_gem_object_unreference_unlocked(gobj); |
Jerome Glisse | 1ef5325 | 2012-07-02 12:40:54 -0400 | [diff] [blame] | 383 | r = radeon_gem_handle_lockup(rdev, r); |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 384 | return r; |
| 385 | } |
Dave Airlie | e024e11 | 2009-06-24 09:48:08 +1000 | [diff] [blame] | 386 | |
| 387 | int radeon_gem_set_tiling_ioctl(struct drm_device *dev, void *data, |
| 388 | struct drm_file *filp) |
| 389 | { |
| 390 | struct drm_radeon_gem_set_tiling *args = data; |
| 391 | struct drm_gem_object *gobj; |
Jerome Glisse | 4c78867 | 2009-11-20 14:29:23 +0100 | [diff] [blame] | 392 | struct radeon_bo *robj; |
Dave Airlie | e024e11 | 2009-06-24 09:48:08 +1000 | [diff] [blame] | 393 | int r = 0; |
| 394 | |
| 395 | DRM_DEBUG("%d \n", args->handle); |
| 396 | gobj = drm_gem_object_lookup(dev, filp, args->handle); |
| 397 | if (gobj == NULL) |
Chris Wilson | bf79cb9 | 2010-08-04 14:19:46 +0100 | [diff] [blame] | 398 | return -ENOENT; |
Daniel Vetter | 7e4d15d | 2011-02-18 17:59:17 +0100 | [diff] [blame] | 399 | robj = gem_to_radeon_bo(gobj); |
Jerome Glisse | 4c78867 | 2009-11-20 14:29:23 +0100 | [diff] [blame] | 400 | r = radeon_bo_set_tiling_flags(robj, args->tiling_flags, args->pitch); |
Luca Barbieri | bc9025b | 2010-02-09 05:49:12 +0000 | [diff] [blame] | 401 | drm_gem_object_unreference_unlocked(gobj); |
Dave Airlie | e024e11 | 2009-06-24 09:48:08 +1000 | [diff] [blame] | 402 | return r; |
| 403 | } |
| 404 | |
| 405 | int radeon_gem_get_tiling_ioctl(struct drm_device *dev, void *data, |
| 406 | struct drm_file *filp) |
| 407 | { |
| 408 | struct drm_radeon_gem_get_tiling *args = data; |
| 409 | struct drm_gem_object *gobj; |
Jerome Glisse | 4c78867 | 2009-11-20 14:29:23 +0100 | [diff] [blame] | 410 | struct radeon_bo *rbo; |
Dave Airlie | e024e11 | 2009-06-24 09:48:08 +1000 | [diff] [blame] | 411 | int r = 0; |
| 412 | |
| 413 | DRM_DEBUG("\n"); |
| 414 | gobj = drm_gem_object_lookup(dev, filp, args->handle); |
| 415 | if (gobj == NULL) |
Chris Wilson | bf79cb9 | 2010-08-04 14:19:46 +0100 | [diff] [blame] | 416 | return -ENOENT; |
Daniel Vetter | 7e4d15d | 2011-02-18 17:59:17 +0100 | [diff] [blame] | 417 | rbo = gem_to_radeon_bo(gobj); |
Jerome Glisse | 4c78867 | 2009-11-20 14:29:23 +0100 | [diff] [blame] | 418 | r = radeon_bo_reserve(rbo, false); |
| 419 | if (unlikely(r != 0)) |
Dave Airlie | 51f07b7 | 2009-12-16 13:10:43 +1000 | [diff] [blame] | 420 | goto out; |
Jerome Glisse | 4c78867 | 2009-11-20 14:29:23 +0100 | [diff] [blame] | 421 | radeon_bo_get_tiling_flags(rbo, &args->tiling_flags, &args->pitch); |
| 422 | radeon_bo_unreserve(rbo); |
Dave Airlie | 51f07b7 | 2009-12-16 13:10:43 +1000 | [diff] [blame] | 423 | out: |
Luca Barbieri | bc9025b | 2010-02-09 05:49:12 +0000 | [diff] [blame] | 424 | drm_gem_object_unreference_unlocked(gobj); |
Dave Airlie | e024e11 | 2009-06-24 09:48:08 +1000 | [diff] [blame] | 425 | return r; |
| 426 | } |
Dave Airlie | ff72145b | 2011-02-07 12:16:14 +1000 | [diff] [blame] | 427 | |
Jerome Glisse | 721604a | 2012-01-05 22:11:05 -0500 | [diff] [blame] | 428 | int radeon_gem_va_ioctl(struct drm_device *dev, void *data, |
| 429 | struct drm_file *filp) |
| 430 | { |
| 431 | struct drm_radeon_gem_va *args = data; |
| 432 | struct drm_gem_object *gobj; |
| 433 | struct radeon_device *rdev = dev->dev_private; |
| 434 | struct radeon_fpriv *fpriv = filp->driver_priv; |
| 435 | struct radeon_bo *rbo; |
| 436 | struct radeon_bo_va *bo_va; |
| 437 | u32 invalid_flags; |
| 438 | int r = 0; |
| 439 | |
Alex Deucher | 67e915e | 2012-01-06 09:38:15 -0500 | [diff] [blame] | 440 | if (!rdev->vm_manager.enabled) { |
| 441 | args->operation = RADEON_VA_RESULT_ERROR; |
| 442 | return -ENOTTY; |
| 443 | } |
| 444 | |
Jerome Glisse | 721604a | 2012-01-05 22:11:05 -0500 | [diff] [blame] | 445 | /* !! DONT REMOVE !! |
| 446 | * We don't support vm_id yet, to be sure we don't have have broken |
| 447 | * userspace, reject anyone trying to use non 0 value thus moving |
| 448 | * forward we can use those fields without breaking existant userspace |
| 449 | */ |
| 450 | if (args->vm_id) { |
| 451 | args->operation = RADEON_VA_RESULT_ERROR; |
| 452 | return -EINVAL; |
| 453 | } |
| 454 | |
| 455 | if (args->offset < RADEON_VA_RESERVED_SIZE) { |
| 456 | dev_err(&dev->pdev->dev, |
| 457 | "offset 0x%lX is in reserved area 0x%X\n", |
| 458 | (unsigned long)args->offset, |
| 459 | RADEON_VA_RESERVED_SIZE); |
| 460 | args->operation = RADEON_VA_RESULT_ERROR; |
| 461 | return -EINVAL; |
| 462 | } |
| 463 | |
| 464 | /* don't remove, we need to enforce userspace to set the snooped flag |
| 465 | * otherwise we will endup with broken userspace and we won't be able |
| 466 | * to enable this feature without adding new interface |
| 467 | */ |
| 468 | invalid_flags = RADEON_VM_PAGE_VALID | RADEON_VM_PAGE_SYSTEM; |
| 469 | if ((args->flags & invalid_flags)) { |
| 470 | dev_err(&dev->pdev->dev, "invalid flags 0x%08X vs 0x%08X\n", |
| 471 | args->flags, invalid_flags); |
| 472 | args->operation = RADEON_VA_RESULT_ERROR; |
| 473 | return -EINVAL; |
| 474 | } |
| 475 | if (!(args->flags & RADEON_VM_PAGE_SNOOPED)) { |
| 476 | dev_err(&dev->pdev->dev, "only supported snooped mapping for now\n"); |
| 477 | args->operation = RADEON_VA_RESULT_ERROR; |
| 478 | return -EINVAL; |
| 479 | } |
| 480 | |
| 481 | switch (args->operation) { |
| 482 | case RADEON_VA_MAP: |
| 483 | case RADEON_VA_UNMAP: |
| 484 | break; |
| 485 | default: |
| 486 | dev_err(&dev->pdev->dev, "unsupported operation %d\n", |
| 487 | args->operation); |
| 488 | args->operation = RADEON_VA_RESULT_ERROR; |
| 489 | return -EINVAL; |
| 490 | } |
| 491 | |
| 492 | gobj = drm_gem_object_lookup(dev, filp, args->handle); |
| 493 | if (gobj == NULL) { |
| 494 | args->operation = RADEON_VA_RESULT_ERROR; |
| 495 | return -ENOENT; |
| 496 | } |
| 497 | rbo = gem_to_radeon_bo(gobj); |
| 498 | r = radeon_bo_reserve(rbo, false); |
| 499 | if (r) { |
| 500 | args->operation = RADEON_VA_RESULT_ERROR; |
| 501 | drm_gem_object_unreference_unlocked(gobj); |
| 502 | return r; |
| 503 | } |
Christian König | e971bd5 | 2012-09-11 16:10:04 +0200 | [diff] [blame] | 504 | bo_va = radeon_vm_bo_find(&fpriv->vm, rbo); |
| 505 | if (!bo_va) { |
| 506 | args->operation = RADEON_VA_RESULT_ERROR; |
| 507 | drm_gem_object_unreference_unlocked(gobj); |
| 508 | return -ENOENT; |
| 509 | } |
| 510 | |
Jerome Glisse | 721604a | 2012-01-05 22:11:05 -0500 | [diff] [blame] | 511 | switch (args->operation) { |
| 512 | case RADEON_VA_MAP: |
Christian König | e971bd5 | 2012-09-11 16:10:04 +0200 | [diff] [blame] | 513 | if (bo_va->soffset) { |
Jerome Glisse | 721604a | 2012-01-05 22:11:05 -0500 | [diff] [blame] | 514 | args->operation = RADEON_VA_RESULT_VA_EXIST; |
| 515 | args->offset = bo_va->soffset; |
| 516 | goto out; |
| 517 | } |
Christian König | e971bd5 | 2012-09-11 16:10:04 +0200 | [diff] [blame] | 518 | r = radeon_vm_bo_set_addr(rdev, bo_va, args->offset, args->flags); |
Jerome Glisse | 721604a | 2012-01-05 22:11:05 -0500 | [diff] [blame] | 519 | break; |
| 520 | case RADEON_VA_UNMAP: |
Christian König | e971bd5 | 2012-09-11 16:10:04 +0200 | [diff] [blame] | 521 | r = radeon_vm_bo_set_addr(rdev, bo_va, 0, 0); |
Jerome Glisse | 721604a | 2012-01-05 22:11:05 -0500 | [diff] [blame] | 522 | break; |
| 523 | default: |
| 524 | break; |
| 525 | } |
| 526 | args->operation = RADEON_VA_RESULT_OK; |
| 527 | if (r) { |
| 528 | args->operation = RADEON_VA_RESULT_ERROR; |
| 529 | } |
| 530 | out: |
| 531 | radeon_bo_unreserve(rbo); |
| 532 | drm_gem_object_unreference_unlocked(gobj); |
| 533 | return r; |
| 534 | } |
| 535 | |
Dave Airlie | ff72145b | 2011-02-07 12:16:14 +1000 | [diff] [blame] | 536 | int radeon_mode_dumb_create(struct drm_file *file_priv, |
| 537 | struct drm_device *dev, |
| 538 | struct drm_mode_create_dumb *args) |
| 539 | { |
| 540 | struct radeon_device *rdev = dev->dev_private; |
| 541 | struct drm_gem_object *gobj; |
Dave Airlie | c87a8d8 | 2011-03-17 13:58:34 +1000 | [diff] [blame] | 542 | uint32_t handle; |
Dave Airlie | ff72145b | 2011-02-07 12:16:14 +1000 | [diff] [blame] | 543 | int r; |
| 544 | |
| 545 | args->pitch = radeon_align_pitch(rdev, args->width, args->bpp, 0) * ((args->bpp + 1) / 8); |
| 546 | args->size = args->pitch * args->height; |
| 547 | args->size = ALIGN(args->size, PAGE_SIZE); |
| 548 | |
| 549 | r = radeon_gem_object_create(rdev, args->size, 0, |
| 550 | RADEON_GEM_DOMAIN_VRAM, |
| 551 | false, ttm_bo_type_device, |
| 552 | &gobj); |
| 553 | if (r) |
| 554 | return -ENOMEM; |
| 555 | |
Dave Airlie | c87a8d8 | 2011-03-17 13:58:34 +1000 | [diff] [blame] | 556 | r = drm_gem_handle_create(file_priv, gobj, &handle); |
| 557 | /* drop reference from allocate - handle holds it now */ |
| 558 | drm_gem_object_unreference_unlocked(gobj); |
Dave Airlie | ff72145b | 2011-02-07 12:16:14 +1000 | [diff] [blame] | 559 | if (r) { |
Dave Airlie | ff72145b | 2011-02-07 12:16:14 +1000 | [diff] [blame] | 560 | return r; |
| 561 | } |
Dave Airlie | c87a8d8 | 2011-03-17 13:58:34 +1000 | [diff] [blame] | 562 | args->handle = handle; |
Dave Airlie | ff72145b | 2011-02-07 12:16:14 +1000 | [diff] [blame] | 563 | return 0; |
| 564 | } |
| 565 | |
| 566 | int radeon_mode_dumb_destroy(struct drm_file *file_priv, |
| 567 | struct drm_device *dev, |
| 568 | uint32_t handle) |
| 569 | { |
| 570 | return drm_gem_handle_delete(file_priv, handle); |
| 571 | } |