Thomas Gleixner | 2874c5f | 2019-05-27 08:55:01 +0200 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0-or-later |
Heiko Schocher | 8159df7 | 2009-06-15 09:38:18 +0200 | [diff] [blame] | 2 | /* |
Holger Brunck | 93e2b95 | 2011-03-11 08:02:44 +0100 | [diff] [blame] | 3 | * Copyright 2008-2011 DENX Software Engineering GmbH |
Heiko Schocher | 8159df7 | 2009-06-15 09:38:18 +0200 | [diff] [blame] | 4 | * Author: Heiko Schocher <hs@denx.de> |
| 5 | * |
| 6 | * Description: |
Christian Herzig | 4bfc1dd | 2012-05-08 15:57:20 +0200 | [diff] [blame] | 7 | * Keymile 83xx platform specific routines. |
Heiko Schocher | 8159df7 | 2009-06-15 09:38:18 +0200 | [diff] [blame] | 8 | */ |
| 9 | |
| 10 | #include <linux/stddef.h> |
| 11 | #include <linux/kernel.h> |
| 12 | #include <linux/init.h> |
| 13 | #include <linux/errno.h> |
| 14 | #include <linux/reboot.h> |
| 15 | #include <linux/pci.h> |
| 16 | #include <linux/kdev_t.h> |
| 17 | #include <linux/major.h> |
| 18 | #include <linux/console.h> |
| 19 | #include <linux/delay.h> |
| 20 | #include <linux/seq_file.h> |
| 21 | #include <linux/root_dev.h> |
| 22 | #include <linux/initrd.h> |
| 23 | #include <linux/of_platform.h> |
| 24 | #include <linux/of_device.h> |
| 25 | |
Arun Sharma | 60063497 | 2011-07-26 16:09:06 -0700 | [diff] [blame] | 26 | #include <linux/atomic.h> |
Holger Brunck | 89491d8 | 2012-12-07 16:09:13 +0100 | [diff] [blame] | 27 | #include <linux/time.h> |
| 28 | #include <linux/io.h> |
Heiko Schocher | 8159df7 | 2009-06-15 09:38:18 +0200 | [diff] [blame] | 29 | #include <asm/machdep.h> |
| 30 | #include <asm/ipic.h> |
| 31 | #include <asm/irq.h> |
| 32 | #include <asm/prom.h> |
| 33 | #include <asm/udbg.h> |
| 34 | #include <sysdev/fsl_soc.h> |
| 35 | #include <sysdev/fsl_pci.h> |
Zhao Qiang | 7aa1aa6 | 2015-11-30 10:48:57 +0800 | [diff] [blame] | 36 | #include <soc/fsl/qe/qe.h> |
Heiko Schocher | 8159df7 | 2009-06-15 09:38:18 +0200 | [diff] [blame] | 37 | |
| 38 | #include "mpc83xx.h" |
| 39 | |
| 40 | #define SVR_REV(svr) (((svr) >> 0) & 0xFFFF) /* Revision field */ |
Gerlando Falauto | 14f40f3 | 2012-12-07 16:09:14 +0100 | [diff] [blame] | 41 | |
Nick Child | f4a88b0 | 2021-12-16 17:00:32 -0500 | [diff] [blame] | 42 | static void __init quirk_mpc8360e_qe_enet10(void) |
Gerlando Falauto | 14f40f3 | 2012-12-07 16:09:14 +0100 | [diff] [blame] | 43 | { |
| 44 | /* |
| 45 | * handle mpc8360E Erratum QE_ENET10: |
| 46 | * RGMII AC values do not meet the specification |
| 47 | */ |
| 48 | uint svid = mfspr(SPRN_SVR); |
| 49 | struct device_node *np_par; |
| 50 | struct resource res; |
| 51 | void __iomem *base; |
| 52 | int ret; |
| 53 | |
| 54 | np_par = of_find_node_by_name(NULL, "par_io"); |
| 55 | if (np_par == NULL) { |
Christophe JAILLET | 365ad0b | 2020-02-08 15:09:04 +0100 | [diff] [blame] | 56 | pr_warn("%s couldn't find par_io node\n", __func__); |
Gerlando Falauto | 14f40f3 | 2012-12-07 16:09:14 +0100 | [diff] [blame] | 57 | return; |
| 58 | } |
| 59 | /* Map Parallel I/O ports registers */ |
| 60 | ret = of_address_to_resource(np_par, 0, &res); |
| 61 | if (ret) { |
Christophe JAILLET | 365ad0b | 2020-02-08 15:09:04 +0100 | [diff] [blame] | 62 | pr_warn("%s couldn't map par_io registers\n", __func__); |
Christophe JAILLET | 88654d5 | 2020-02-08 15:09:20 +0100 | [diff] [blame] | 63 | goto out; |
Gerlando Falauto | 14f40f3 | 2012-12-07 16:09:14 +0100 | [diff] [blame] | 64 | } |
| 65 | |
Julia Lawall | bfbe37f | 2020-01-01 18:49:45 +0100 | [diff] [blame] | 66 | base = ioremap(res.start, resource_size(&res)); |
Christophe JAILLET | 88654d5 | 2020-02-08 15:09:20 +0100 | [diff] [blame] | 67 | if (!base) |
| 68 | goto out; |
Gerlando Falauto | 14f40f3 | 2012-12-07 16:09:14 +0100 | [diff] [blame] | 69 | |
| 70 | /* |
| 71 | * set output delay adjustments to default values according |
| 72 | * table 5 in Errata Rev. 5, 9/2011: |
| 73 | * |
| 74 | * write 0b01 to UCC1 bits 18:19 |
| 75 | * write 0b01 to UCC2 option 1 bits 4:5 |
| 76 | * write 0b01 to UCC2 option 2 bits 16:17 |
| 77 | */ |
| 78 | clrsetbits_be32((base + 0xa8), 0x0c00f000, 0x04005000); |
| 79 | |
| 80 | /* |
| 81 | * set output delay adjustments to default values according |
| 82 | * table 3-13 in Reference Manual Rev.3 05/2010: |
| 83 | * |
| 84 | * write 0b01 to UCC2 option 2 bits 16:17 |
| 85 | * write 0b0101 to UCC1 bits 20:23 |
| 86 | * write 0b0101 to UCC2 option 1 bits 24:27 |
| 87 | */ |
| 88 | clrsetbits_be32((base + 0xac), 0x0000cff0, 0x00004550); |
| 89 | |
| 90 | if (SVR_REV(svid) == 0x0021) { |
| 91 | /* |
| 92 | * UCC2 option 1: write 0b1010 to bits 24:27 |
| 93 | * at address IMMRBAR+0x14AC |
| 94 | */ |
| 95 | clrsetbits_be32((base + 0xac), 0x000000f0, 0x000000a0); |
| 96 | } else if (SVR_REV(svid) == 0x0020) { |
| 97 | /* |
| 98 | * UCC1: write 0b11 to bits 18:19 |
| 99 | * at address IMMRBAR+0x14A8 |
| 100 | */ |
| 101 | setbits32((base + 0xa8), 0x00003000); |
| 102 | |
| 103 | /* |
| 104 | * UCC2 option 1: write 0b11 to bits 4:5 |
| 105 | * at address IMMRBAR+0x14A8 |
| 106 | */ |
| 107 | setbits32((base + 0xa8), 0x0c000000); |
| 108 | |
| 109 | /* |
| 110 | * UCC2 option 2: write 0b11 to bits 16:17 |
| 111 | * at address IMMRBAR+0x14AC |
| 112 | */ |
| 113 | setbits32((base + 0xac), 0x0000c000); |
| 114 | } |
| 115 | iounmap(base); |
Christophe JAILLET | 88654d5 | 2020-02-08 15:09:20 +0100 | [diff] [blame] | 116 | out: |
Gerlando Falauto | 14f40f3 | 2012-12-07 16:09:14 +0100 | [diff] [blame] | 117 | of_node_put(np_par); |
| 118 | } |
| 119 | |
Heiko Schocher | 8159df7 | 2009-06-15 09:38:18 +0200 | [diff] [blame] | 120 | /* ************************************************************************ |
| 121 | * |
| 122 | * Setup the architecture |
| 123 | * |
| 124 | */ |
Holger Brunck | 93e2b95 | 2011-03-11 08:02:44 +0100 | [diff] [blame] | 125 | static void __init mpc83xx_km_setup_arch(void) |
Heiko Schocher | 8159df7 | 2009-06-15 09:38:18 +0200 | [diff] [blame] | 126 | { |
Dmitry Eremin-Solenikov | bede480 | 2011-11-17 18:48:48 +0400 | [diff] [blame] | 127 | #ifdef CONFIG_QUICC_ENGINE |
Heiko Schocher | 8159df7 | 2009-06-15 09:38:18 +0200 | [diff] [blame] | 128 | struct device_node *np; |
Dmitry Eremin-Solenikov | bede480 | 2011-11-17 18:48:48 +0400 | [diff] [blame] | 129 | #endif |
Heiko Schocher | 8159df7 | 2009-06-15 09:38:18 +0200 | [diff] [blame] | 130 | |
Kevin Hao | fff69fd | 2016-08-23 10:06:58 +0800 | [diff] [blame] | 131 | mpc83xx_setup_arch(); |
Heiko Schocher | 8159df7 | 2009-06-15 09:38:18 +0200 | [diff] [blame] | 132 | |
| 133 | #ifdef CONFIG_QUICC_ENGINE |
Heiko Schocher | 8159df7 | 2009-06-15 09:38:18 +0200 | [diff] [blame] | 134 | np = of_find_node_by_name(NULL, "par_io"); |
| 135 | if (np != NULL) { |
| 136 | par_io_init(np); |
| 137 | of_node_put(np); |
| 138 | |
Holger Brunck | 93e2b95 | 2011-03-11 08:02:44 +0100 | [diff] [blame] | 139 | for_each_node_by_name(np, "spi") |
| 140 | par_io_of_config(np); |
| 141 | |
Holger Brunck | f7854e7 | 2012-05-08 15:57:19 +0200 | [diff] [blame] | 142 | for_each_node_by_name(np, "ucc") |
Heiko Schocher | 8159df7 | 2009-06-15 09:38:18 +0200 | [diff] [blame] | 143 | par_io_of_config(np); |
Gerlando Falauto | 9c2f451 | 2012-12-07 16:09:15 +0100 | [diff] [blame] | 144 | |
| 145 | /* Only apply this quirk when par_io is available */ |
| 146 | np = of_find_compatible_node(NULL, "network", "ucc_geth"); |
| 147 | if (np != NULL) { |
| 148 | quirk_mpc8360e_qe_enet10(); |
| 149 | of_node_put(np); |
| 150 | } |
Heiko Schocher | 8159df7 | 2009-06-15 09:38:18 +0200 | [diff] [blame] | 151 | } |
Christian Herzig | 4bfc1dd | 2012-05-08 15:57:20 +0200 | [diff] [blame] | 152 | #endif /* CONFIG_QUICC_ENGINE */ |
Heiko Schocher | 8159df7 | 2009-06-15 09:38:18 +0200 | [diff] [blame] | 153 | } |
| 154 | |
Dmitry Eremin-Solenikov | 7669d58 | 2011-11-17 18:48:47 +0400 | [diff] [blame] | 155 | machine_device_initcall(mpc83xx_km, mpc83xx_declare_of_platform_devices); |
Heiko Schocher | 8159df7 | 2009-06-15 09:38:18 +0200 | [diff] [blame] | 156 | |
Holger Brunck | 93e2b95 | 2011-03-11 08:02:44 +0100 | [diff] [blame] | 157 | /* list of the supported boards */ |
| 158 | static char *board[] __initdata = { |
| 159 | "Keymile,KMETER1", |
| 160 | "Keymile,kmpbec8321", |
| 161 | NULL |
| 162 | }; |
| 163 | |
Heiko Schocher | 8159df7 | 2009-06-15 09:38:18 +0200 | [diff] [blame] | 164 | /* |
| 165 | * Called very early, MMU is off, device-tree isn't unflattened |
| 166 | */ |
Holger Brunck | 93e2b95 | 2011-03-11 08:02:44 +0100 | [diff] [blame] | 167 | static int __init mpc83xx_km_probe(void) |
Heiko Schocher | 8159df7 | 2009-06-15 09:38:18 +0200 | [diff] [blame] | 168 | { |
Holger Brunck | 93e2b95 | 2011-03-11 08:02:44 +0100 | [diff] [blame] | 169 | int i = 0; |
Heiko Schocher | 8159df7 | 2009-06-15 09:38:18 +0200 | [diff] [blame] | 170 | |
Holger Brunck | 93e2b95 | 2011-03-11 08:02:44 +0100 | [diff] [blame] | 171 | while (board[i]) { |
Benjamin Herrenschmidt | 5657138 | 2016-07-05 15:04:05 +1000 | [diff] [blame] | 172 | if (of_machine_is_compatible(board[i])) |
Holger Brunck | 93e2b95 | 2011-03-11 08:02:44 +0100 | [diff] [blame] | 173 | break; |
| 174 | i++; |
| 175 | } |
| 176 | return (board[i] != NULL); |
Heiko Schocher | 8159df7 | 2009-06-15 09:38:18 +0200 | [diff] [blame] | 177 | } |
| 178 | |
Holger Brunck | 93e2b95 | 2011-03-11 08:02:44 +0100 | [diff] [blame] | 179 | define_machine(mpc83xx_km) { |
| 180 | .name = "mpc83xx-km-platform", |
| 181 | .probe = mpc83xx_km_probe, |
| 182 | .setup_arch = mpc83xx_km_setup_arch, |
Oliver O'Halloran | 83f8404 | 2020-11-03 15:35:15 +1100 | [diff] [blame] | 183 | .discover_phbs = mpc83xx_setup_pci, |
Rasmus Villemoes | 01a2ffb | 2019-11-28 15:55:18 +0100 | [diff] [blame] | 184 | .init_IRQ = mpc83xx_ipic_init_IRQ, |
Heiko Schocher | 8159df7 | 2009-06-15 09:38:18 +0200 | [diff] [blame] | 185 | .get_irq = ipic_get_irq, |
| 186 | .restart = mpc83xx_restart, |
| 187 | .time_init = mpc83xx_time_init, |
| 188 | .calibrate_decr = generic_calibrate_decr, |
| 189 | .progress = udbg_progress, |
| 190 | }; |