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AnilKumar Ch32bb00e2012-06-22 15:10:49 +05301/*
2 * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
8/dts-v1/;
9
Florian Vaussardeb33ef662013-06-03 16:12:22 +020010#include "am33xx.dtsi"
AnilKumar Ch32bb00e2012-06-22 15:10:49 +053011
12/ {
13 model = "TI AM335x EVM";
14 compatible = "ti,am335x-evm", "ti,am33xx";
15
AnilKumar Chefeedcf2012-08-31 15:07:20 +053016 cpus {
17 cpu@0 {
18 cpu0-supply = <&vdd1_reg>;
19 };
20 };
21
AnilKumar Ch32bb00e2012-06-22 15:10:49 +053022 memory {
23 device_type = "memory";
24 reg = <0x80000000 0x10000000>; /* 256 MB */
25 };
Vaibhav Hiremath53d91032012-08-15 16:53:25 +053026
AnilKumar Ch5d9b66f2012-11-06 19:18:29 +053027 am33xx_pinmux: pinmux@44e10800 {
28 pinctrl-names = "default";
Vaibhav Hiremath4d927572013-05-20 18:58:10 +053029 pinctrl-0 = <&matrix_keypad_s0 &volume_keys_s0 &clkout2_pin>;
AnilKumar Ch5d9b66f2012-11-06 19:18:29 +053030
31 matrix_keypad_s0: matrix_keypad_s0 {
32 pinctrl-single,pins = <
Florian Vaussard6a8a6b62013-06-03 16:12:25 +020033 0x54 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a5.gpio1_21 */
34 0x58 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a6.gpio1_22 */
35 0x64 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_a9.gpio1_25 */
36 0x68 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_a10.gpio1_26 */
37 0x6c (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_a11.gpio1_27 */
AnilKumar Ch5d9b66f2012-11-06 19:18:29 +053038 >;
39 };
AnilKumar Ch404aa0d2012-11-06 19:18:31 +053040
41 volume_keys_s0: volume_keys_s0 {
42 pinctrl-single,pins = <
Florian Vaussard6a8a6b62013-06-03 16:12:25 +020043 0x150 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* spi0_sclk.gpio0_2 */
44 0x154 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* spi0_d0.gpio0_3 */
AnilKumar Ch404aa0d2012-11-06 19:18:31 +053045 >;
46 };
Vaibhav Hiremath3f866442013-03-26 14:14:01 +053047
48 i2c0_pins: pinmux_i2c0_pins {
49 pinctrl-single,pins = <
Florian Vaussard6a8a6b62013-06-03 16:12:25 +020050 0x188 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_sda.i2c0_sda */
51 0x18c (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_scl.i2c0_scl */
Vaibhav Hiremath3f866442013-03-26 14:14:01 +053052 >;
53 };
54
55 i2c1_pins: pinmux_i2c1_pins {
56 pinctrl-single,pins = <
Florian Vaussard6a8a6b62013-06-03 16:12:25 +020057 0x158 (PIN_INPUT_PULLUP | MUX_MODE2) /* spi0_d1.i2c1_sda */
58 0x15c (PIN_INPUT_PULLUP | MUX_MODE2) /* spi0_cs0.i2c1_scl */
Vaibhav Hiremath3f866442013-03-26 14:14:01 +053059 >;
60 };
Vaibhav Hiremath9f2fbe12013-03-27 16:31:34 +053061
62 uart0_pins: pinmux_uart0_pins {
63 pinctrl-single,pins = <
Florian Vaussard6a8a6b62013-06-03 16:12:25 +020064 0x170 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart0_rxd.uart0_rxd */
65 0x174 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart0_txd.uart0_txd */
Vaibhav Hiremath9f2fbe12013-03-27 16:31:34 +053066 >;
67 };
Vaibhav Hiremath4d927572013-05-20 18:58:10 +053068
69 clkout2_pin: pinmux_clkout2_pin {
70 pinctrl-single,pins = <
Florian Vaussard6a8a6b62013-06-03 16:12:25 +020071 0x1b4 (PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* xdma_event_intr1.clkout2 */
Vaibhav Hiremath4d927572013-05-20 18:58:10 +053072 >;
73 };
Philip Avinashfdc6a2d2013-05-31 13:19:05 +053074
75 nandflash_pins_s0: nandflash_pins_s0 {
76 pinctrl-single,pins = <
Florian Vaussard6a8a6b62013-06-03 16:12:25 +020077 0x0 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad0.gpmc_ad0 */
78 0x4 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad1.gpmc_ad1 */
79 0x8 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad2.gpmc_ad2 */
80 0xc (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad3.gpmc_ad3 */
81 0x10 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad4.gpmc_ad4 */
82 0x14 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad5.gpmc_ad5 */
83 0x18 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad6.gpmc_ad6 */
84 0x1c (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad7.gpmc_ad7 */
85 0x70 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_wait0.gpmc_wait0 */
86 0x74 (PIN_INPUT_PULLUP | MUX_MODE7) /* gpmc_wpn.gpio0_30 */
87 0x7c (PIN_OUTPUT | MUX_MODE0) /* gpmc_csn0.gpmc_csn0 */
88 0x90 (PIN_OUTPUT | MUX_MODE0) /* gpmc_advn_ale.gpmc_advn_ale */
89 0x94 (PIN_OUTPUT | MUX_MODE0) /* gpmc_oen_ren.gpmc_oen_ren */
90 0x98 (PIN_OUTPUT | MUX_MODE0) /* gpmc_wen.gpmc_wen */
91 0x9c (PIN_OUTPUT | MUX_MODE0) /* gpmc_be0n_cle.gpmc_be0n_cle */
Philip Avinashfdc6a2d2013-05-31 13:19:05 +053092 >;
93 };
Philip Avinash6993fd02013-06-06 15:52:38 +020094
95 ecap0_pins: backlight_pins {
96 pinctrl-single,pins = <
97 0x164 0x0 /* eCAP0_in_PWM0_out.eCAP0_in_PWM0_out MODE0 */
98 >;
99 };
AnilKumar Ch5d9b66f2012-11-06 19:18:29 +0530100 };
101
Vaibhav Hiremath53d91032012-08-15 16:53:25 +0530102 ocp {
Vaibhav Hiremathdde3b0d2013-03-28 11:36:05 +0530103 uart0: serial@44e09000 {
Vaibhav Hiremath9f2fbe12013-03-27 16:31:34 +0530104 pinctrl-names = "default";
105 pinctrl-0 = <&uart0_pins>;
106
Vaibhav Hiremath53d91032012-08-15 16:53:25 +0530107 status = "okay";
108 };
AnilKumar Ch1b2a9702012-08-21 16:47:29 +0530109
AnilKumar Chb918e2c2012-11-21 17:22:17 +0530110 i2c0: i2c@44e0b000 {
Vaibhav Hiremath3f866442013-03-26 14:14:01 +0530111 pinctrl-names = "default";
112 pinctrl-0 = <&i2c0_pins>;
113
AnilKumar Ch1b2a9702012-08-21 16:47:29 +0530114 status = "okay";
115 clock-frequency = <400000>;
116
Vaibhav Hiremath5d83cb82012-08-27 16:59:08 +0530117 tps: tps@2d {
118 reg = <0x2d>;
AnilKumar Ch1b2a9702012-08-21 16:47:29 +0530119 };
120 };
AnilKumar Ch492dd022012-09-20 02:49:29 +0530121
AnilKumar Chb918e2c2012-11-21 17:22:17 +0530122 i2c1: i2c@4802a000 {
Vaibhav Hiremath3f866442013-03-26 14:14:01 +0530123 pinctrl-names = "default";
124 pinctrl-0 = <&i2c1_pins>;
125
AnilKumar Ch492dd022012-09-20 02:49:29 +0530126 status = "okay";
AnilKumar Chcd5cfac2012-09-21 21:19:11 +0530127 clock-frequency = <100000>;
AnilKumar Ch492dd022012-09-20 02:49:29 +0530128
129 lis331dlh: lis331dlh@18 {
130 compatible = "st,lis331dlh", "st,lis3lv02d";
131 reg = <0x18>;
132 Vdd-supply = <&lis3_reg>;
133 Vdd_IO-supply = <&lis3_reg>;
134
135 st,click-single-x;
136 st,click-single-y;
137 st,click-single-z;
138 st,click-thresh-x = <10>;
139 st,click-thresh-y = <10>;
140 st,click-thresh-z = <10>;
141 st,irq1-click;
142 st,irq2-click;
143 st,wakeup-x-lo;
144 st,wakeup-x-hi;
145 st,wakeup-y-lo;
146 st,wakeup-y-hi;
147 st,wakeup-z-lo;
148 st,wakeup-z-hi;
149 st,min-limit-x = <120>;
150 st,min-limit-y = <120>;
151 st,min-limit-z = <140>;
152 st,max-limit-x = <550>;
153 st,max-limit-y = <550>;
154 st,max-limit-z = <750>;
155 };
AnilKumar Chbf078552012-09-20 02:49:30 +0530156
AnilKumar Chcd5cfac2012-09-21 21:19:11 +0530157 tsl2550: tsl2550@39 {
158 compatible = "taos,tsl2550";
159 reg = <0x39>;
160 };
161
AnilKumar Chbf078552012-09-20 02:49:30 +0530162 tmp275: tmp275@48 {
163 compatible = "ti,tmp275";
164 reg = <0x48>;
165 };
AnilKumar Ch492dd022012-09-20 02:49:29 +0530166 };
Philip Avinashfdc6a2d2013-05-31 13:19:05 +0530167
168 elm: elm@48080000 {
169 status = "okay";
170 };
171
Philip Avinash6993fd02013-06-06 15:52:38 +0200172 epwmss0: epwmss@48300000 {
173 status = "okay";
174
175 ecap0: ecap@48300100 {
176 status = "okay";
177 pinctrl-names = "default";
178 pinctrl-0 = <&ecap0_pins>;
179 };
180 };
181
Philip Avinashfdc6a2d2013-05-31 13:19:05 +0530182 gpmc: gpmc@50000000 {
183 status = "okay";
184 pinctrl-names = "default";
185 pinctrl-0 = <&nandflash_pins_s0>;
186 ranges = <0 0 0x08000000 0x10000000>; /* CS0: NAND */
187 nand@0,0 {
188 reg = <0 0 0>; /* CS0, offset 0 */
189 nand-bus-width = <8>;
190 ti,nand-ecc-opt = "bch8";
191 gpmc,device-nand = "true";
192 gpmc,device-width = <1>;
193 gpmc,sync-clk-ps = <0>;
194 gpmc,cs-on-ns = <0>;
195 gpmc,cs-rd-off-ns = <44>;
196 gpmc,cs-wr-off-ns = <44>;
197 gpmc,adv-on-ns = <6>;
198 gpmc,adv-rd-off-ns = <34>;
199 gpmc,adv-wr-off-ns = <44>;
200 gpmc,we-on-ns = <0>;
201 gpmc,we-off-ns = <40>;
202 gpmc,oe-on-ns = <0>;
203 gpmc,oe-off-ns = <54>;
204 gpmc,access-ns = <64>;
205 gpmc,rd-cycle-ns = <82>;
206 gpmc,wr-cycle-ns = <82>;
207 gpmc,wait-on-read = "true";
208 gpmc,wait-on-write = "true";
209 gpmc,bus-turnaround-ns = <0>;
210 gpmc,cycle2cycle-delay-ns = <0>;
211 gpmc,clk-activation-ns = <0>;
212 gpmc,wait-monitoring-ns = <0>;
213 gpmc,wr-access-ns = <40>;
214 gpmc,wr-data-mux-bus-ns = <0>;
215
216 #address-cells = <1>;
217 #size-cells = <1>;
218 elm_id = <&elm>;
219
220 /* MTD partition table */
221 partition@0 {
222 label = "SPL1";
223 reg = <0x00000000 0x000020000>;
224 };
225
226 partition@1 {
227 label = "SPL2";
228 reg = <0x00020000 0x00020000>;
229 };
230
231 partition@2 {
232 label = "SPL3";
233 reg = <0x00040000 0x00020000>;
234 };
235
236 partition@3 {
237 label = "SPL4";
238 reg = <0x00060000 0x00020000>;
239 };
240
241 partition@4 {
242 label = "U-boot";
243 reg = <0x00080000 0x001e0000>;
244 };
245
246 partition@5 {
247 label = "environment";
248 reg = <0x00260000 0x00020000>;
249 };
250
251 partition@6 {
252 label = "Kernel";
253 reg = <0x00280000 0x00500000>;
254 };
255
256 partition@7 {
257 label = "File-System";
258 reg = <0x00780000 0x0F880000>;
259 };
260 };
261 };
AnilKumar Ch1b2a9702012-08-21 16:47:29 +0530262 };
263
264 vbat: fixedregulator@0 {
265 compatible = "regulator-fixed";
266 regulator-name = "vbat";
267 regulator-min-microvolt = <5000000>;
268 regulator-max-microvolt = <5000000>;
269 regulator-boot-on;
270 };
AnilKumar Ch492dd022012-09-20 02:49:29 +0530271
272 lis3_reg: fixedregulator@1 {
273 compatible = "regulator-fixed";
274 regulator-name = "lis3_reg";
275 regulator-boot-on;
276 };
AnilKumar Ch2ca1d312012-11-06 19:18:30 +0530277
278 matrix_keypad: matrix_keypad@0 {
279 compatible = "gpio-matrix-keypad";
280 debounce-delay-ms = <5>;
281 col-scan-delay-us = <2>;
282
Florian Vaussarde94233c2013-06-03 16:12:23 +0200283 row-gpios = <&gpio1 25 GPIO_ACTIVE_HIGH /* Bank1, pin25 */
284 &gpio1 26 GPIO_ACTIVE_HIGH /* Bank1, pin26 */
285 &gpio1 27 GPIO_ACTIVE_HIGH>; /* Bank1, pin27 */
AnilKumar Ch2ca1d312012-11-06 19:18:30 +0530286
Florian Vaussarde94233c2013-06-03 16:12:23 +0200287 col-gpios = <&gpio1 21 GPIO_ACTIVE_HIGH /* Bank1, pin21 */
288 &gpio1 22 GPIO_ACTIVE_HIGH>; /* Bank1, pin22 */
AnilKumar Ch2ca1d312012-11-06 19:18:30 +0530289
290 linux,keymap = <0x0000008b /* MENU */
291 0x0100009e /* BACK */
292 0x02000069 /* LEFT */
293 0x0001006a /* RIGHT */
294 0x0101001c /* ENTER */
295 0x0201006c>; /* DOWN */
296 };
AnilKumar Ch822c9932012-11-06 19:18:32 +0530297
298 gpio_keys: volume_keys@0 {
299 compatible = "gpio-keys";
300 #address-cells = <1>;
301 #size-cells = <0>;
302 autorepeat;
303
304 switch@9 {
305 label = "volume-up";
306 linux,code = <115>;
Florian Vaussarde94233c2013-06-03 16:12:23 +0200307 gpios = <&gpio0 2 GPIO_ACTIVE_LOW>;
AnilKumar Ch822c9932012-11-06 19:18:32 +0530308 gpio-key,wakeup;
309 };
310
311 switch@10 {
312 label = "volume-down";
313 linux,code = <114>;
Florian Vaussarde94233c2013-06-03 16:12:23 +0200314 gpios = <&gpio0 3 GPIO_ACTIVE_LOW>;
AnilKumar Ch822c9932012-11-06 19:18:32 +0530315 gpio-key,wakeup;
316 };
317 };
Philip Avinash6993fd02013-06-06 15:52:38 +0200318
319 backlight {
320 compatible = "pwm-backlight";
321 pwms = <&ecap0 0 50000 0>;
322 brightness-levels = <0 51 53 56 62 75 101 152 255>;
323 default-brightness-level = <8>;
324 };
AnilKumar Ch1b2a9702012-08-21 16:47:29 +0530325};
326
Florian Vaussardeb33ef662013-06-03 16:12:22 +0200327#include "tps65910.dtsi"
AnilKumar Ch1b2a9702012-08-21 16:47:29 +0530328
329&tps {
330 vcc1-supply = <&vbat>;
331 vcc2-supply = <&vbat>;
332 vcc3-supply = <&vbat>;
333 vcc4-supply = <&vbat>;
334 vcc5-supply = <&vbat>;
335 vcc6-supply = <&vbat>;
336 vcc7-supply = <&vbat>;
337 vccio-supply = <&vbat>;
338
339 regulators {
340 vrtc_reg: regulator@0 {
341 regulator-always-on;
342 };
343
344 vio_reg: regulator@1 {
345 regulator-always-on;
346 };
347
348 vdd1_reg: regulator@2 {
349 /* VDD_MPU voltage limits 0.95V - 1.26V with +/-4% tolerance */
350 regulator-name = "vdd_mpu";
351 regulator-min-microvolt = <912500>;
352 regulator-max-microvolt = <1312500>;
353 regulator-boot-on;
354 regulator-always-on;
355 };
356
357 vdd2_reg: regulator@3 {
358 /* VDD_CORE voltage limits 0.95V - 1.1V with +/-4% tolerance */
359 regulator-name = "vdd_core";
360 regulator-min-microvolt = <912500>;
361 regulator-max-microvolt = <1150000>;
362 regulator-boot-on;
363 regulator-always-on;
364 };
365
366 vdd3_reg: regulator@4 {
367 regulator-always-on;
368 };
369
370 vdig1_reg: regulator@5 {
371 regulator-always-on;
372 };
373
374 vdig2_reg: regulator@6 {
375 regulator-always-on;
376 };
377
378 vpll_reg: regulator@7 {
379 regulator-always-on;
380 };
381
382 vdac_reg: regulator@8 {
383 regulator-always-on;
384 };
385
386 vaux1_reg: regulator@9 {
387 regulator-always-on;
388 };
389
390 vaux2_reg: regulator@10 {
391 regulator-always-on;
392 };
393
394 vaux33_reg: regulator@11 {
395 regulator-always-on;
396 };
397
398 vmmc_reg: regulator@12 {
399 regulator-always-on;
400 };
Vaibhav Hiremath53d91032012-08-15 16:53:25 +0530401 };
AnilKumar Ch32bb00e2012-06-22 15:10:49 +0530402};
Mugunthan V N1a39a652012-11-14 09:08:00 +0000403
404&cpsw_emac0 {
405 phy_id = <&davinci_mdio>, <0>;
406};
407
408&cpsw_emac1 {
409 phy_id = <&davinci_mdio>, <1>;
410};