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review.shift-gmbh.com / SHIFTPHONES / mainline / linux / 68cf027f3d9d586366391beed8721ba319fee5c0 / . / drivers / net / ethernet / ti / cpsw_ale.h
blob: 4777d626fac8ddcdebbd4af4232ea57f9cd85d62 [file] [log] [blame]
Grygorii Strashko68cf0272019-04-26 20:12:23 +0300[diff] [blame^]1/* SPDX-License-Identifier: GPL-2.0 */
Mugunthan V Ndb821732012-03-18 20:17:53 +0000[diff] [blame]2/*
Karicheri, Muralidharanca471302017-01-06 15:37:44 -0500[diff] [blame]3 * Texas Instruments N-Port Ethernet Switch Address Lookup Engine APIs
Mugunthan V Ndb821732012-03-18 20:17:53 +0000[diff] [blame]4 *
5 * Copyright (C) 2012 Texas Instruments
6 *
Mugunthan V Ndb821732012-03-18 20:17:53 +0000[diff] [blame]7 */
8#ifndef __TI_CPSW_ALE_H__
9#define __TI_CPSW_ALE_H__
10
11struct cpsw_ale_params {
12 struct device *dev;
13 void __iomem *ale_regs;
14 unsigned long ale_ageout; /* in secs */
15 unsigned long ale_entries;
16 unsigned long ale_ports;
Karicheri, Muralidharanca471302017-01-06 15:37:44 -0500[diff] [blame]17 /* NU Switch has specific handling as number of bits in ALE entries
18 * are different than other versions of ALE. Also there are specific
19 * registers for unknown vlan specific fields. So use nu_switch_ale
20 * to identify this hardware.
21 */
22 bool nu_switch_ale;
23 /* mask bit used in NU Switch ALE is 3 bits instead of 8 bits. So
24 * pass it from caller.
25 */
26 u32 major_ver_mask;
Mugunthan V Ndb821732012-03-18 20:17:53 +0000[diff] [blame]27};
28
29struct cpsw_ale {
30 struct cpsw_ale_params params;
31 struct timer_list timer;
32 unsigned long ageout;
Lennart Sorensen1e5c4bc2014-10-31 13:38:52 -0400[diff] [blame]33 int allmulti;
Karicheri, Muralidharanca471302017-01-06 15:37:44 -0500[diff] [blame]34 u32 version;
Karicheri, Muralidharanb361da82017-01-06 15:37:46 -0500[diff] [blame]35 /* These bits are different on NetCP NU Switch ALE */
36 u32 port_mask_bits;
37 u32 port_num_bits;
38 u32 vlan_field_bits;
Mugunthan V Ndb821732012-03-18 20:17:53 +0000[diff] [blame]39};
40
41enum cpsw_ale_control {
42 /* global */
43 ALE_ENABLE,
44 ALE_CLEAR,
45 ALE_AGEOUT,
Mugunthan V N0cd8f9c2014-01-23 00:03:12 +0530[diff] [blame]46 ALE_P0_UNI_FLOOD,
Mugunthan V Ndb821732012-03-18 20:17:53 +0000[diff] [blame]47 ALE_VLAN_NOLEARN,
48 ALE_NO_PORT_VLAN,
49 ALE_OUI_DENY,
50 ALE_BYPASS,
51 ALE_RATE_LIMIT_TX,
52 ALE_VLAN_AWARE,
53 ALE_AUTH_ENABLE,
54 ALE_RATE_LIMIT,
55 /* port controls */
56 ALE_PORT_STATE,
57 ALE_PORT_DROP_UNTAGGED,
58 ALE_PORT_DROP_UNKNOWN_VLAN,
59 ALE_PORT_NOLEARN,
Mugunthan V N0cd8f9c2014-01-23 00:03:12 +0530[diff] [blame]60 ALE_PORT_NO_SA_UPDATE,
Mugunthan V Ndb821732012-03-18 20:17:53 +0000[diff] [blame]61 ALE_PORT_UNKNOWN_VLAN_MEMBER,
62 ALE_PORT_UNKNOWN_MCAST_FLOOD,
63 ALE_PORT_UNKNOWN_REG_MCAST_FLOOD,
64 ALE_PORT_UNTAGGED_EGRESS,
65 ALE_PORT_BCAST_LIMIT,
66 ALE_PORT_MCAST_LIMIT,
67 ALE_NUM_CONTROLS,
68};
69
70enum cpsw_ale_port_state {
71 ALE_PORT_STATE_DISABLE = 0x00,
72 ALE_PORT_STATE_BLOCK = 0x01,
73 ALE_PORT_STATE_LEARN = 0x02,
74 ALE_PORT_STATE_FORWARD = 0x03,
75};
76
77/* ALE unicast entry flags - passed into cpsw_ale_add_ucast() */
Mugunthan V Ne11b2202013-02-05 08:26:47 +0000[diff] [blame]78#define ALE_SECURE BIT(0)
79#define ALE_BLOCKED BIT(1)
80#define ALE_SUPER BIT(2)
81#define ALE_VLAN BIT(3)
Mugunthan V Ndb821732012-03-18 20:17:53 +0000[diff] [blame]82
Mugunthan V N3b72c2f2013-02-05 08:26:48 +0000[diff] [blame]83#define ALE_PORT_HOST BIT(0)
84#define ALE_PORT_1 BIT(1)
85#define ALE_PORT_2 BIT(2)
86
Mugunthan V Ndb821732012-03-18 20:17:53 +0000[diff] [blame]87#define ALE_MCAST_FWD 0
88#define ALE_MCAST_BLOCK_LEARN_FWD 1
89#define ALE_MCAST_FWD_LEARN 2
90#define ALE_MCAST_FWD_2 3
91
Mugunthan V N52c4f0e2014-07-22 23:25:07 +0530[diff] [blame]92#define ALE_ENTRY_BITS 68
93#define ALE_ENTRY_WORDS DIV_ROUND_UP(ALE_ENTRY_BITS, 32)
94
Mugunthan V Ndb821732012-03-18 20:17:53 +0000[diff] [blame]95struct cpsw_ale *cpsw_ale_create(struct cpsw_ale_params *params);
Mugunthan V Ndb821732012-03-18 20:17:53 +0000[diff] [blame]96
97void cpsw_ale_start(struct cpsw_ale *ale);
98void cpsw_ale_stop(struct cpsw_ale *ale);
99
Mugunthan V N25906052015-01-13 17:35:49 +0530[diff] [blame]100int cpsw_ale_flush_multicast(struct cpsw_ale *ale, int port_mask, int vid);
Ivan Khoronzhuk58bdeac2018-10-12 18:28:14 +0300[diff] [blame]101int cpsw_ale_add_ucast(struct cpsw_ale *ale, const u8 *addr, int port,
Mugunthan V Ne11b2202013-02-05 08:26:47 +0000[diff] [blame]102 int flags, u16 vid);
Ivan Khoronzhuk58bdeac2018-10-12 18:28:14 +0300[diff] [blame]103int cpsw_ale_del_ucast(struct cpsw_ale *ale, const u8 *addr, int port,
Mugunthan V Ne11b2202013-02-05 08:26:47 +0000[diff] [blame]104 int flags, u16 vid);
Ivan Khoronzhuk58bdeac2018-10-12 18:28:14 +0300[diff] [blame]105int cpsw_ale_add_mcast(struct cpsw_ale *ale, const u8 *addr, int port_mask,
Mugunthan V Ne11b2202013-02-05 08:26:47 +0000[diff] [blame]106 int flags, u16 vid, int mcast_state);
Ivan Khoronzhuk58bdeac2018-10-12 18:28:14 +0300[diff] [blame]107int cpsw_ale_del_mcast(struct cpsw_ale *ale, const u8 *addr, int port_mask,
Mugunthan V Ne11b2202013-02-05 08:26:47 +0000[diff] [blame]108 int flags, u16 vid);
109int cpsw_ale_add_vlan(struct cpsw_ale *ale, u16 vid, int port, int untag,
110 int reg_mcast, int unreg_mcast);
111int cpsw_ale_del_vlan(struct cpsw_ale *ale, u16 vid, int port);
Lennart Sorensen1e5c4bc2014-10-31 13:38:52 -0400[diff] [blame]112void cpsw_ale_set_allmulti(struct cpsw_ale *ale, int allmulti);
Mugunthan V Ndb821732012-03-18 20:17:53 +0000[diff] [blame]113
114int cpsw_ale_control_get(struct cpsw_ale *ale, int port, int control);
115int cpsw_ale_control_set(struct cpsw_ale *ale, int port,
116 int control, int value);
Mugunthan V N52c4f0e2014-07-22 23:25:07 +0530[diff] [blame]117void cpsw_ale_dump(struct cpsw_ale *ale, u32 *data);
Mugunthan V Ndb821732012-03-18 20:17:53 +0000[diff] [blame]118
119#endif