blob: 9a6036ab0f90d63e179a490ed7a2d8f92a8f844b [file] [log] [blame]
Jani Nikula696173b2019-04-05 14:00:15 +03001/* SPDX-License-Identifier: MIT */
2/*
3 * Copyright © 2019 Intel Corporation
4 */
5
6#ifndef __INTEL_PM_H__
7#define __INTEL_PM_H__
8
9#include <linux/types.h>
10
Jani Nikulaecbb5fb2019-04-29 15:29:37 +030011#include "i915_reg.h"
12
Jani Nikula696173b2019-04-05 14:00:15 +030013struct drm_device;
14struct drm_i915_private;
15struct i915_request;
Maarten Lankhorst855e0d62019-06-28 10:55:13 +020016struct intel_atomic_state;
Jani Nikula696173b2019-04-05 14:00:15 +030017struct intel_crtc;
18struct intel_crtc_state;
19struct intel_plane;
Jani Nikula696173b2019-04-05 14:00:15 +030020struct skl_ddb_entry;
21struct skl_pipe_wm;
22struct skl_wm_level;
23
24void intel_init_clock_gating(struct drm_i915_private *dev_priv);
25void intel_suspend_hw(struct drm_i915_private *dev_priv);
26int ilk_wm_max_level(const struct drm_i915_private *dev_priv);
27void intel_update_watermarks(struct intel_crtc *crtc);
28void intel_init_pm(struct drm_i915_private *dev_priv);
29void intel_init_clock_gating_hooks(struct drm_i915_private *dev_priv);
30void intel_pm_setup(struct drm_i915_private *dev_priv);
Jani Nikula696173b2019-04-05 14:00:15 +030031void g4x_wm_get_hw_state(struct drm_i915_private *dev_priv);
32void vlv_wm_get_hw_state(struct drm_i915_private *dev_priv);
33void ilk_wm_get_hw_state(struct drm_i915_private *dev_priv);
34void skl_wm_get_hw_state(struct drm_i915_private *dev_priv);
Stanislav Lisovskiy0f0f9ae2020-02-03 01:06:29 +020035u8 intel_enabled_dbuf_slices_mask(struct drm_i915_private *dev_priv);
Jani Nikula696173b2019-04-05 14:00:15 +030036void skl_pipe_ddb_get_hw_state(struct intel_crtc *crtc,
37 struct skl_ddb_entry *ddb_y,
38 struct skl_ddb_entry *ddb_uv);
Stanislav Lisovskiy072fcc32020-02-03 01:06:25 +020039void skl_ddb_get_hw_state(struct drm_i915_private *dev_priv);
Jani Nikula696173b2019-04-05 14:00:15 +030040void skl_pipe_wm_get_hw_state(struct intel_crtc *crtc,
41 struct skl_pipe_wm *out);
42void g4x_wm_sanitize(struct drm_i915_private *dev_priv);
43void vlv_wm_sanitize(struct drm_i915_private *dev_priv);
Maarten Lankhorst855e0d62019-06-28 10:55:13 +020044bool intel_can_enable_sagv(struct intel_atomic_state *state);
Jani Nikula696173b2019-04-05 14:00:15 +030045int intel_enable_sagv(struct drm_i915_private *dev_priv);
46int intel_disable_sagv(struct drm_i915_private *dev_priv);
Stanislav Lisovskiy680e1af2020-04-15 17:39:04 +030047void intel_sagv_pre_plane_update(struct intel_atomic_state *state);
48void intel_sagv_post_plane_update(struct intel_atomic_state *state);
Jani Nikula696173b2019-04-05 14:00:15 +030049bool skl_wm_level_equals(const struct skl_wm_level *l1,
50 const struct skl_wm_level *l2);
51bool skl_ddb_allocation_overlaps(const struct skl_ddb_entry *ddb,
52 const struct skl_ddb_entry *entries,
53 int num_entries, int ignore_idx);
54void skl_write_plane_wm(struct intel_plane *plane,
55 const struct intel_crtc_state *crtc_state);
56void skl_write_cursor_wm(struct intel_plane *plane,
57 const struct intel_crtc_state *crtc_state);
Ville Syrjälä60aca572019-11-27 21:05:51 +020058bool ilk_disable_lp_wm(struct drm_i915_private *dev_priv);
Jani Nikula696173b2019-04-05 14:00:15 +030059void intel_init_ipc(struct drm_i915_private *dev_priv);
60void intel_enable_ipc(struct drm_i915_private *dev_priv);
61
Jani Nikulad13616d2019-06-06 15:22:00 +030062bool intel_set_memory_cxsr(struct drm_i915_private *dev_priv, bool enable);
Jani Nikulaecbb5fb2019-04-29 15:29:37 +030063
Jani Nikula696173b2019-04-05 14:00:15 +030064#endif /* __INTEL_PM_H__ */