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Simon Guinot0ac73f72015-10-06 16:13:43 +02001/*
2 * Device Tree common file for the Seagate Personal Cloud NAS 1 and 2-Bay
3 * (Armada 370 SoC).
4 *
5 * Copyright (C) 2015 Seagate
6 *
7 * Author: Simon Guinot <simon.guinot@sequanux.org>
8 *
9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without any
11 * warranty of any kind, whether express or implied.
12 */
13
14/*
15 * TODO: add support for the white SATA LED.
16 */
17
18#include "armada-370.dtsi"
19#include <dt-bindings/gpio/gpio.h>
20#include <dt-bindings/input/input.h>
21
22/ {
23 chosen {
24 stdout-path = "serial0:115200n8";
25 };
26
Gregory CLEMENT6f477f42016-11-06 09:29:35 +010027 memory@0 {
Simon Guinot0ac73f72015-10-06 16:13:43 +020028 device_type = "memory";
29 reg = <0x00000000 0x20000000>; /* 512 MB */
30 };
31
32 soc {
33 ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000
34 MBUS_ID(0x01, 0xe0) 0 0xfff00000 0x100000>;
35
Simon Guinot0ac73f72015-10-06 16:13:43 +020036 internal-regs {
37 coherency-fabric@20200 {
38 broken-idle;
39 };
40
41 serial@12000 {
42 status = "okay";
43 };
44
Simon Guinot0ac73f72015-10-06 16:13:43 +020045 ethernet@74000 {
46 status = "okay";
47 pinctrl-0 = <&ge1_rgmii_pins>;
48 pinctrl-names = "default";
49 phy = <&phy0>;
50 phy-mode = "rgmii-id";
51 };
52
Simon Guinot0ac73f72015-10-06 16:13:43 +020053 usb@50000 {
54 status = "okay";
55 };
56 };
57 };
58
59 regulators {
60 compatible = "simple-bus";
61 #address-cells = <1>;
62 #size-cells = <0>;
63
64 regulator@0 {
65 compatible = "regulator-fixed";
66 reg = <0>;
67 regulator-name = "USB Power";
68 regulator-min-microvolt = <5000000>;
69 regulator-max-microvolt = <5000000>;
70 regulator-always-on;
71 regulator-boot-on;
72 gpio = <&gpio1 27 GPIO_ACTIVE_LOW>;
73 };
74 regulator@1 {
75 compatible = "regulator-fixed";
76 reg = <1>;
77 regulator-name = "SATA0 power";
78 regulator-min-microvolt = <5000000>;
79 regulator-max-microvolt = <5000000>;
80 enable-active-high;
81 regulator-always-on;
82 regulator-boot-on;
83 gpio = <&gpio1 18 GPIO_ACTIVE_HIGH>;
84 };
85 };
86
87 gpio-keys {
88 compatible = "gpio-keys";
89 #address-cells = <1>;
90 #size-cells = <0>;
91
Gregory CLEMENT9e622af2016-11-06 10:59:19 +010092 power {
Simon Guinot0ac73f72015-10-06 16:13:43 +020093 label = "Power button";
94 linux,code = <KEY_POWER>;
95 gpios = <&gpio1 19 GPIO_ACTIVE_HIGH>;
96 debounce-interval = <100>;
97 };
Gregory CLEMENT9e622af2016-11-06 10:59:19 +010098 reset {
Simon Guinot0ac73f72015-10-06 16:13:43 +020099 label = "Reset Button";
100 linux,code = <KEY_RESTART>;
101 gpios = <&gpio1 23 GPIO_ACTIVE_LOW>;
102 debounce-interval = <100>;
103 };
Gregory CLEMENT9e622af2016-11-06 10:59:19 +0100104 button {
Simon Guinot0ac73f72015-10-06 16:13:43 +0200105 label = "USB VBUS error";
106 linux,code = <KEY_UNKNOWN>;
107 gpios = <&gpio1 21 GPIO_ACTIVE_LOW>;
108 debounce-interval = <100>;
109 };
110 };
111
112 gpio-leds {
113 compatible = "gpio-leds";
114
115 red-sata0 {
116 label = "cumulus:red:sata0";
117 gpios = <&gpio1 26 GPIO_ACTIVE_HIGH>;
118 default-state = "off";
119 };
120 };
121
122 gpio_poweroff {
123 compatible = "gpio-poweroff";
124 gpios = <&gpio1 25 GPIO_ACTIVE_HIGH>;
125 };
126};
127
Gregory CLEMENT8d977092016-11-05 19:20:09 +0100128&pciec {
129 status = "okay";
130
131 /* USB 3.0 Bridge ASM1042A */
132 pcie@1,0 {
133 status = "okay";
134 };
135};
136
Gregory CLEMENT1fc21292016-11-04 17:54:54 +0100137&mdio {
138 pinctrl-0 = <&mdio_pins>;
139 pinctrl-names = "default";
140
141 phy0: ethernet-phy@0 {
142 reg = <0>;
143 };
144};
145
Simon Guinot0ac73f72015-10-06 16:13:43 +0200146&pinctrl {
147 pinctrl-0 = <&sata_led_pin>;
148 pinctrl-names = "default";
149
150 sata_led_pin: sata-led-pin {
151 marvell,pins = "mpp60";
152 marvell,function = "sata0";
153 };
154 gpio_led_pin: gpio-led-pin {
155 marvell,pins = "mpp60";
156 marvell,function = "gpio";
157 };
158};
Stefan Roese0160a4b2016-07-13 11:55:18 +0200159
160&spi0 {
161 status = "okay";
162 pinctrl-0 = <&spi0_pins2>;
163 pinctrl-names = "default";
164
165 spi-flash@0 {
166 #address-cells = <1>;
167 #size-cells = <1>;
168 /* MX25L8006E */
169 compatible = "mxicy,mx25l8005", "jedec,spi-nor";
170 reg = <0>; /* Chip select 0 */
171 spi-max-frequency = <50000000>;
172
173 partition@0 {
174 label = "u-boot";
175 reg = <0x0 0x100000>;
176 };
177 };
178};