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Pierre-Louis Bossarte149ca22020-05-01 09:58:50 -05001/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) */
Liam Girdwood53e0c722019-04-12 11:05:09 -05002/*
3 * This file is provided under a dual BSD/GPLv2 license. When using or
4 * redistributing this file, you may do so under either license.
5 *
6 * Copyright(c) 2018 Intel Corporation. All rights reserved.
7 */
8
9#ifndef __INCLUDE_SOUND_SOF_DAI_H__
10#define __INCLUDE_SOUND_SOF_DAI_H__
11
12#include <sound/sof/header.h>
13#include <sound/sof/dai-intel.h>
Daniel Balutab4be4272019-10-08 11:44:39 -050014#include <sound/sof/dai-imx.h>
Liam Girdwood53e0c722019-04-12 11:05:09 -050015
16/*
17 * DAI Configuration.
18 *
19 * Each different DAI type will have it's own structure and IPC cmd.
20 */
21
22#define SOF_DAI_FMT_I2S 1 /**< I2S mode */
23#define SOF_DAI_FMT_RIGHT_J 2 /**< Right Justified mode */
24#define SOF_DAI_FMT_LEFT_J 3 /**< Left Justified mode */
25#define SOF_DAI_FMT_DSP_A 4 /**< L data MSB after FRM LRC */
26#define SOF_DAI_FMT_DSP_B 5 /**< L data MSB during FRM LRC */
27#define SOF_DAI_FMT_PDM 6 /**< Pulse density modulation */
28
29#define SOF_DAI_FMT_CONT (1 << 4) /**< continuous clock */
30#define SOF_DAI_FMT_GATED (0 << 4) /**< clock is gated */
31
32#define SOF_DAI_FMT_NB_NF (0 << 8) /**< normal bit clock + frame */
33#define SOF_DAI_FMT_NB_IF (2 << 8) /**< normal BCLK + inv FRM */
34#define SOF_DAI_FMT_IB_NF (3 << 8) /**< invert BCLK + nor FRM */
35#define SOF_DAI_FMT_IB_IF (4 << 8) /**< invert BCLK + FRM */
36
Pierre-Louis Bossartdf132fa2020-11-12 10:30:58 -060037#define SOF_DAI_FMT_CBP_CFP (0 << 12) /**< codec bclk provider & frame provider */
38#define SOF_DAI_FMT_CBC_CFP (2 << 12) /**< codec bclk consumer & frame provider */
39#define SOF_DAI_FMT_CBP_CFC (3 << 12) /**< codec bclk provider & frame consumer */
40#define SOF_DAI_FMT_CBC_CFC (4 << 12) /**< codec bclk consumer & frame consumer */
41
42/* keep old definitions for backwards compatibility */
43#define SOF_DAI_FMT_CBM_CFM SOF_DAI_FMT_CBP_CFP
44#define SOF_DAI_FMT_CBS_CFM SOF_DAI_FMT_CBC_CFP
45#define SOF_DAI_FMT_CBM_CFS SOF_DAI_FMT_CBP_CFC
46#define SOF_DAI_FMT_CBS_CFS SOF_DAI_FMT_CBC_CFC
Liam Girdwood53e0c722019-04-12 11:05:09 -050047
48#define SOF_DAI_FMT_FORMAT_MASK 0x000f
49#define SOF_DAI_FMT_CLOCK_MASK 0x00f0
50#define SOF_DAI_FMT_INV_MASK 0x0f00
Pierre-Louis Bossartdf132fa2020-11-12 10:30:58 -060051#define SOF_DAI_FMT_CLOCK_PROVIDER_MASK 0xf000
Liam Girdwood53e0c722019-04-12 11:05:09 -050052
53/** \brief Types of DAI */
54enum sof_ipc_dai_type {
55 SOF_DAI_INTEL_NONE = 0, /**< None */
56 SOF_DAI_INTEL_SSP, /**< Intel SSP */
57 SOF_DAI_INTEL_DMIC, /**< Intel DMIC */
58 SOF_DAI_INTEL_HDA, /**< Intel HD/A */
Bard liao8207a1c2019-08-15 14:20:16 -050059 SOF_DAI_INTEL_ALH, /**< Intel ALH */
Daniel Balutaf59b16e2019-08-15 14:20:15 -050060 SOF_DAI_IMX_SAI, /**< i.MX SAI */
61 SOF_DAI_IMX_ESAI, /**< i.MX ESAI */
Liam Girdwood53e0c722019-04-12 11:05:09 -050062};
63
64/* general purpose DAI configuration */
65struct sof_ipc_dai_config {
66 struct sof_ipc_cmd_hdr hdr;
67 uint32_t type; /**< DAI type - enum sof_ipc_dai_type */
68 uint32_t dai_index; /**< index of this type dai */
69
70 /* physical protocol and clocking */
71 uint16_t format; /**< SOF_DAI_FMT_ */
Pierre-Louis Bossart66374232021-10-04 12:14:26 -050072 uint8_t group_id; /**< group ID, 0 means no group (ABI 3.17) */
73 uint8_t reserved8; /**< alignment */
Liam Girdwood53e0c722019-04-12 11:05:09 -050074
75 /* reserved for future use */
76 uint32_t reserved[8];
77
78 /* HW specific data */
79 union {
80 struct sof_ipc_dai_ssp_params ssp;
81 struct sof_ipc_dai_dmic_params dmic;
82 struct sof_ipc_dai_hda_params hda;
Pierre-Louis Bossart3a9477a2019-08-15 10:50:30 -050083 struct sof_ipc_dai_alh_params alh;
Daniel Balutab4be4272019-10-08 11:44:39 -050084 struct sof_ipc_dai_esai_params esai;
Guido Roncarolo9c1d4cf2019-12-17 18:26:15 -060085 struct sof_ipc_dai_sai_params sai;
Liam Girdwood53e0c722019-04-12 11:05:09 -050086 };
87} __packed;
88
89#endif