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Stefan Agnere1bf86a2014-11-02 21:36:47 +01001/*
2 * Copyright 2014 Toradex AG
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
8 */
9
10/ {
11 bl: backlight {
12 compatible = "pwm-backlight";
13 pwms = <&pwm0 0 5000000 0>;
14 status = "disabled";
15 };
16};
17
18&adc0 {
19 status = "okay";
20};
21
22&adc1 {
23 status = "okay";
24};
25
Bhuvanchandra DV9fca0152015-01-29 21:57:45 +053026&dspi1 {
27 bus-num = <1>;
28 pinctrl-names = "default";
29 pinctrl-0 = <&pinctrl_dspi1>;
30};
31
Stefan Agnere1bf86a2014-11-02 21:36:47 +010032&edma0 {
33 status = "okay";
34};
35
36&esdhc1 {
37 pinctrl-names = "default";
38 pinctrl-0 = <&pinctrl_esdhc1>;
39 bus-width = <4>;
Stefan Agner76713952015-01-16 18:06:15 +010040 cd-gpios = <&gpio1 10 GPIO_ACTIVE_LOW>;
Stefan Agnere1bf86a2014-11-02 21:36:47 +010041};
42
43&fec1 {
44 phy-mode = "rmii";
45 pinctrl-names = "default";
46 pinctrl-0 = <&pinctrl_fec1>;
47};
48
Bhuvanchandra DV1ddeb482014-11-13 10:05:31 +053049&i2c0 {
50 clock-frequency = <400000>;
51 pinctrl-names = "default";
52 pinctrl-0 = <&pinctrl_i2c0>;
53};
54
Stefan Agner65425262015-10-07 16:58:36 -070055&nfc {
56 assigned-clocks = <&clks VF610_CLK_NFC>;
57 assigned-clock-rates = <33000000>;
58 pinctrl-names = "default";
59 pinctrl-0 = <&pinctrl_nfc>;
60 status = "okay";
61
62 nand@0 {
63 compatible = "fsl,vf610-nfc-nandcs";
64 reg = <0>;
65 #address-cells = <1>;
66 #size-cells = <1>;
67 nand-bus-width = <8>;
68 nand-ecc-mode = "hw";
69 nand-ecc-strength = <32>;
70 nand-ecc-step-size = <2048>;
71 nand-on-flash-bbt;
72 };
73};
74
Stefan Agnere1bf86a2014-11-02 21:36:47 +010075&pwm0 {
76 pinctrl-names = "default";
77 pinctrl-0 = <&pinctrl_pwm0>;
78};
79
80&pwm1 {
81 pinctrl-names = "default";
82 pinctrl-0 = <&pinctrl_pwm1>;
83};
84
85&uart0 {
86 pinctrl-names = "default";
87 pinctrl-0 = <&pinctrl_uart0>;
88};
89
90&uart1 {
91 pinctrl-names = "default";
92 pinctrl-0 = <&pinctrl_uart1>;
93};
94
95&uart2 {
96 pinctrl-names = "default";
97 pinctrl-0 = <&pinctrl_uart2>;
98};
99
100&usbdev0 {
101 disable-over-current;
102 status = "okay";
103};
104
105&usbh1 {
106 disable-over-current;
107 status = "okay";
108};
109
Stefan Agnerac039cd2014-11-04 14:07:09 +0100110&usbmisc0 {
111 status = "okay";
112};
113
114&usbmisc1 {
115 status = "okay";
116};
117
118&usbphy0 {
119 status = "okay";
120};
121
122&usbphy1 {
123 status = "okay";
124};
125
Stefan Agnere1bf86a2014-11-02 21:36:47 +0100126&iomuxc {
127 vf610-colibri {
Stefan Agner2b36bda2014-11-04 14:07:08 +0100128 pinctrl_gpio_ext: gpio_ext {
129 fsl,pins = <
130 VF610_PAD_PTD10__GPIO_89 0x22ed /* EXT_IO_0 */
131 VF610_PAD_PTD9__GPIO_88 0x22ed /* EXT_IO_1 */
132 VF610_PAD_PTD26__GPIO_68 0x22ed /* EXT_IO_2 */
133 >;
134 };
135
Bhuvanchandra DV9fca0152015-01-29 21:57:45 +0530136 pinctrl_dspi1: dspi1grp {
137 fsl,pins = <
138 VF610_PAD_PTD5__DSPI1_CS0 0x33e2
139 VF610_PAD_PTD6__DSPI1_SIN 0x33e1
140 VF610_PAD_PTD7__DSPI1_SOUT 0x33e2
141 VF610_PAD_PTD8__DSPI1_SCK 0x33e2
142 >;
143 };
144
Stefan Agnere1bf86a2014-11-02 21:36:47 +0100145 pinctrl_esdhc1: esdhc1grp {
146 fsl,pins = <
147 VF610_PAD_PTA24__ESDHC1_CLK 0x31ef
148 VF610_PAD_PTA25__ESDHC1_CMD 0x31ef
149 VF610_PAD_PTA26__ESDHC1_DAT0 0x31ef
150 VF610_PAD_PTA27__ESDHC1_DAT1 0x31ef
151 VF610_PAD_PTA28__ESDHC1_DATA2 0x31ef
152 VF610_PAD_PTA29__ESDHC1_DAT3 0x31ef
153 VF610_PAD_PTB20__GPIO_42 0x219d
154 >;
155 };
156
157 pinctrl_fec1: fec1grp {
158 fsl,pins = <
Stefan Agnereddb00f2014-11-28 00:40:06 +0100159 VF610_PAD_PTA6__RMII_CLKOUT 0x30d2
Stefan Agnere1bf86a2014-11-02 21:36:47 +0100160 VF610_PAD_PTC9__ENET_RMII1_MDC 0x30d2
161 VF610_PAD_PTC10__ENET_RMII1_MDIO 0x30d3
162 VF610_PAD_PTC11__ENET_RMII1_CRS 0x30d1
Cory Tusaraa5fec22015-05-13 23:11:38 -0400163 VF610_PAD_PTC12__ENET_RMII1_RXD1 0x30d1
Stefan Agnere1bf86a2014-11-02 21:36:47 +0100164 VF610_PAD_PTC13__ENET_RMII1_RXD0 0x30d1
165 VF610_PAD_PTC14__ENET_RMII1_RXER 0x30d1
166 VF610_PAD_PTC15__ENET_RMII1_TXD1 0x30d2
167 VF610_PAD_PTC16__ENET_RMII1_TXD0 0x30d2
168 VF610_PAD_PTC17__ENET_RMII1_TXEN 0x30d2
169 >;
170 };
171
Bhuvanchandra DV1ddeb482014-11-13 10:05:31 +0530172 pinctrl_i2c0: i2c0grp {
173 fsl,pins = <
174 VF610_PAD_PTB14__I2C0_SCL 0x37ff
175 VF610_PAD_PTB15__I2C0_SDA 0x37ff
176 >;
177 };
178
Stefan Agner65425262015-10-07 16:58:36 -0700179 pinctrl_nfc: nfcgrp {
180 fsl,pins = <
181 VF610_PAD_PTD23__NF_IO7 0x28df
182 VF610_PAD_PTD22__NF_IO6 0x28df
183 VF610_PAD_PTD21__NF_IO5 0x28df
184 VF610_PAD_PTD20__NF_IO4 0x28df
185 VF610_PAD_PTD19__NF_IO3 0x28df
186 VF610_PAD_PTD18__NF_IO2 0x28df
187 VF610_PAD_PTD17__NF_IO1 0x28df
188 VF610_PAD_PTD16__NF_IO0 0x28df
189 VF610_PAD_PTB24__NF_WE_B 0x28c2
190 VF610_PAD_PTB25__NF_CE0_B 0x28c2
191 VF610_PAD_PTB27__NF_RE_B 0x28c2
192 VF610_PAD_PTC26__NF_RB_B 0x283d
193 VF610_PAD_PTC27__NF_ALE 0x28c2
194 VF610_PAD_PTC28__NF_CLE 0x28c2
195 >;
196 };
197
Stefan Agnere1bf86a2014-11-02 21:36:47 +0100198 pinctrl_pwm0: pwm0grp {
199 fsl,pins = <
200 VF610_PAD_PTB0__FTM0_CH0 0x1182
201 VF610_PAD_PTB1__FTM0_CH1 0x1182
202 >;
203 };
204
205 pinctrl_pwm1: pwm1grp {
206 fsl,pins = <
207 VF610_PAD_PTB8__FTM1_CH0 0x1182
208 VF610_PAD_PTB9__FTM1_CH1 0x1182
209 >;
210 };
211
212 pinctrl_uart0: uart0grp {
213 fsl,pins = <
214 VF610_PAD_PTB10__UART0_TX 0x21a2
215 VF610_PAD_PTB11__UART0_RX 0x21a1
216 >;
217 };
218
219 pinctrl_uart1: uart1grp {
220 fsl,pins = <
221 VF610_PAD_PTB4__UART1_TX 0x21a2
222 VF610_PAD_PTB5__UART1_RX 0x21a1
223 >;
224 };
225
226 pinctrl_uart2: uart2grp {
227 fsl,pins = <
228 VF610_PAD_PTD0__UART2_TX 0x21a2
229 VF610_PAD_PTD1__UART2_RX 0x21a1
230 VF610_PAD_PTD2__UART2_RTS 0x21a2
231 VF610_PAD_PTD3__UART2_CTS 0x21a1
232 >;
233 };
Stefan Agner505251e2014-11-16 19:00:28 +0100234
235 pinctrl_usbh1_reg: gpio_usb_vbus {
236 fsl,pins = <
237 VF610_PAD_PTD4__GPIO_83 0x22ed
238 >;
239 };
Stefan Agnere1bf86a2014-11-02 21:36:47 +0100240 };
241};